| @@ -1264,12 +1264,8 @@ public: | |||
| } | |||
| void inline transfer(void *buf, size_t count) {transfer(buf, buf, count);} | |||
| void inline transfer16(void *buf, size_t count) {transfer16(buf, buf, count);} | |||
| void inline transfer32(void *buf, size_t count) {transfer32(buf, buf, count);} | |||
| void setTransferWriteFill(uint8_t ch ) {_transferWriteFill = ch;} | |||
| void transfer(const void * buf, void * retbuf, size_t count); | |||
| void transfer16(const void * buf, void * retbuf, size_t count); | |||
| void transfer32(const void * buf, void * retbuf, size_t count); | |||
| // Asynch support (DMA ) | |||
| #ifdef SPI_HAS_TRANSFER_ASYNC | |||
| @@ -1392,6 +1388,12 @@ private: | |||
| DMAChannel *_dmaRX = nullptr; | |||
| EventResponder *_dma_event_responder = nullptr; | |||
| #endif | |||
| // Optimized buffer transfer | |||
| void inline transfer16(void *buf, size_t count) {transfer16(buf, buf, count);} | |||
| void inline transfer32(void *buf, size_t count) {transfer32(buf, buf, count);} | |||
| void transfer16(const void * buf, void * retbuf, size_t count); | |||
| void transfer32(const void * buf, void * retbuf, size_t count); | |||
| }; | |||