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*(portConfigRegister(hardware().mosi_pin [mosi_pin_index])) = hardware().mosi_mux[mosi_pin_index]; |
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*(portConfigRegister(hardware().mosi_pin [mosi_pin_index])) = hardware().mosi_mux[mosi_pin_index]; |
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*(portConfigRegister(hardware().sck_pin [sck_pin_index])) = hardware().sck_mux[sck_pin_index]; |
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*(portConfigRegister(hardware().sck_pin [sck_pin_index])) = hardware().sck_mux[sck_pin_index]; |
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// Set the Mux pins |
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//Serial.println("SPI: Set Input select registers"); |
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hardware().sck_select_input_register = hardware().sck_select_val; |
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hardware().sdi_select_input_register = hardware().sdi_select_val; |
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hardware().sdo_select_input_register = hardware().sdo_select_val; |
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//digitalWriteFast(10, HIGH); |
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//digitalWriteFast(10, HIGH); |
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//pinMode(10, OUTPUT); |
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//pinMode(10, OUTPUT); |
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//digitalWriteFast(10, HIGH); |
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//digitalWriteFast(10, HIGH); |
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3 | 0x10, |
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3 | 0x10, |
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10, |
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10, |
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3 | 0x10, |
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3 | 0x10, |
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IOMUXC_LPSPI4_SCK_SELECT_INPUT, IOMUXC_LPSPI4_SDI_SELECT_INPUT, IOMUXC_LPSPI4_SDO_SELECT_INPUT, IOMUXC_LPSPI4_PCS0_SELECT_INPUT, |
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0, 0, 0, 0 |
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}; |
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}; |
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SPIClass SPI((uintptr_t)&IMXRT_LPSPI4_S, (uintptr_t)&SPIClass::spiclass_lpspi4_hardware); |
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SPIClass SPI((uintptr_t)&IMXRT_LPSPI4_S, (uintptr_t)&SPIClass::spiclass_lpspi4_hardware); |
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#if defined(__IMXRT1062__) |
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// T4 has two other possible SPI objects... |
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void _spi_dma_rxISR1(void) {SPI1.dma_rxisr();} |
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const SPIClass::SPI_Hardware_t SPIClass::spiclass_lpspi3_hardware = { |
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CCM_CCGR1, CCM_CCGR1_LPSPI3(CCM_CCGR_ON), |
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DMAMUX_SOURCE_LPSPI3_TX, DMAMUX_SOURCE_LPSPI3_RX, _spi_dma_rxISR1, |
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1, |
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7 | 0x10, |
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26, |
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7 | 0x10, |
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27, |
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7 | 0x10, |
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0, |
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7 | 0x10, |
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IOMUXC_LPSPI3_SCK_SELECT_INPUT, IOMUXC_LPSPI3_SDI_SELECT_INPUT, IOMUXC_LPSPI3_SDO_SELECT_INPUT, IOMUXC_LPSPI3_PCS0_SELECT_INPUT, |
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1, 1, 0, 0 |
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}; |
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SPIClass SPI1((uintptr_t)&IMXRT_LPSPI3_S, (uintptr_t)&SPIClass::spiclass_lpspi3_hardware); |
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void _spi_dma_rxISR2(void) {SPI2.dma_rxisr();} |
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const SPIClass::SPI_Hardware_t SPIClass::spiclass_lpspi1_hardware = { |
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CCM_CCGR1, CCM_CCGR1_LPSPI1(CCM_CCGR_ON), |
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DMAMUX_SOURCE_LPSPI1_TX, DMAMUX_SOURCE_LPSPI1_RX, _spi_dma_rxISR1, |
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34, |
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4 | 0x10, |
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35, |
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4 | 0x10, |
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37, |
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4 | 0x10, |
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36, |
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4 | 0x10, |
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IOMUXC_LPSPI1_SCK_SELECT_INPUT, IOMUXC_LPSPI1_SDI_SELECT_INPUT, IOMUXC_LPSPI1_SDO_SELECT_INPUT, IOMUXC_LPSPI1_PCS0_SELECT_INPUT, |
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1, 1, 1, 0 |
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}; |
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SPIClass SPI2((uintptr_t)&IMXRT_LPSPI1_S, (uintptr_t)&SPIClass::spiclass_lpspi1_hardware); |
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#endif |
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//SPIClass SPI(&IMXRT_LPSPI4_S, &spiclass_lpspi4_hardware); |
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//SPIClass SPI(&IMXRT_LPSPI4_S, &spiclass_lpspi4_hardware); |
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void SPIClass::usingInterrupt(IRQ_NUMBER_t interruptName) |
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void SPIClass::usingInterrupt(IRQ_NUMBER_t interruptName) |