| const SPIClass::SPI_Hardware_t SPIClass::spiclass_lpspi1_hardware = { | const SPIClass::SPI_Hardware_t SPIClass::spiclass_lpspi1_hardware = { | ||||
| CCM_CCGR1, CCM_CCGR1_LPSPI1(CCM_CCGR_ON), | CCM_CCGR1, CCM_CCGR1_LPSPI1(CCM_CCGR_ON), | ||||
| DMAMUX_SOURCE_LPSPI1_TX, DMAMUX_SOURCE_LPSPI1_RX, _spi_dma_rxISR1, | DMAMUX_SOURCE_LPSPI1_TX, DMAMUX_SOURCE_LPSPI1_RX, _spi_dma_rxISR1, | ||||
| #if defined(ARDUINO_TEENSY41) | |||||
| 42, | |||||
| 4 | 0x10, | |||||
| 43, | |||||
| 4 | 0x10, | |||||
| 45, | |||||
| 4 | 0x10, | |||||
| 44, | |||||
| 4 | 0x10, | |||||
| #else | |||||
| 34, | 34, | ||||
| 4 | 0x10, | 4 | 0x10, | ||||
| 35, | 35, | ||||
| 4 | 0x10, | 4 | 0x10, | ||||
| 36, | 36, | ||||
| 4 | 0x10, | 4 | 0x10, | ||||
| #endif | |||||
| IOMUXC_LPSPI1_SCK_SELECT_INPUT, IOMUXC_LPSPI1_SDI_SELECT_INPUT, IOMUXC_LPSPI1_SDO_SELECT_INPUT, IOMUXC_LPSPI1_PCS0_SELECT_INPUT, | IOMUXC_LPSPI1_SCK_SELECT_INPUT, IOMUXC_LPSPI1_SDI_SELECT_INPUT, IOMUXC_LPSPI1_SDO_SELECT_INPUT, IOMUXC_LPSPI1_PCS0_SELECT_INPUT, | ||||
| 1, 1, 1, 0 | 1, 1, 1, 0 | ||||
| }; | }; |