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SPISettings for IMXRT (thanks Manitou)

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PaulStoffregen 5 years ago
parent
commit
c6e55a961a
1 changed files with 17 additions and 6 deletions
  1. +17
    -6
      SPI.h

+ 17
- 6
SPI.h View File

void init_AlwaysInline(uint32_t clock, uint8_t bitOrder, uint8_t dataMode) void init_AlwaysInline(uint32_t clock, uint8_t bitOrder, uint8_t dataMode)
__attribute__((__always_inline__)) { __attribute__((__always_inline__)) {
// TODO: make these implement settings - for now, just fixed config // TODO: make these implement settings - for now, just fixed config
ccr = LPSPI_CCR_SCKDIV(2);
tcr = LPSPI_TCR_FRAMESZ(7);

uint32_t d, div, clkhz = 528000000/7; // LPSPI peripheral clock
if (clock == 0) clock =1;
d= clkhz/clock;
if (d && clkhz/d > clock) d++;
if (d > 257) d= 257; // max div
if (d > 2) {
div = d-2;
} else {
div =0;
}
ccr = LPSPI_CCR_SCKDIV(div);
tcr = LPSPI_TCR_FRAMESZ(7); // TCR has polarity and bit order too
} }
uint32_t ccr; // clock config, pg 2660 (RT1050 ref, rev 2) uint32_t ccr; // clock config, pg 2660 (RT1050 ref, rev 2)
uint32_t tcr; // transmit command, pg 2664 (RT1050 ref, rev 2) uint32_t tcr; // transmit command, pg 2664 (RT1050 ref, rev 2)
//printf("trans\n"); //printf("trans\n");
LPSPI4_CR = 0; LPSPI4_CR = 0;
LPSPI4_CFGR1 = LPSPI_CFGR1_MASTER | LPSPI_CFGR1_SAMPLE; LPSPI4_CFGR1 = LPSPI_CFGR1_MASTER | LPSPI_CFGR1_SAMPLE;
//LPSPI4_CCR = settings.ccr;
//LPSPI4_TCR = settings.tcr;
LPSPI4_CCR = LPSPI_CCR_SCKDIV(4);
LPSPI4_TCR = LPSPI_TCR_FRAMESZ(7);
LPSPI4_CCR = settings.ccr;
LPSPI4_TCR = settings.tcr;
//LPSPI4_CCR = LPSPI_CCR_SCKDIV(4);
//LPSPI4_TCR = LPSPI_TCR_FRAMESZ(7);
LPSPI4_CR = LPSPI_CR_MEN; LPSPI4_CR = LPSPI_CR_MEN;
} }



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