Merge pull request #62 from vjmuzik/master

Add more transfer functions for Teensy 4.x

SPI.cpp

@@ -1715,6 +1715,87 @@ void SPIClass::transfer(const void * buf, void * retbuf, size_t count)
 	}
 }
 
+void SPIClass::transfer16(const void * buf, void * retbuf, size_t count)
+{
+    if (count == 0) return;
+    uint16_t *p_write = (uint16_t*)buf;
+    uint16_t *p_read = (uint16_t*)retbuf;
+    size_t count_read = count;
+    
+    uint32_t tcr = port().TCR;
+    port().TCR = (tcr & 0xfffff000) | LPSPI_TCR_FRAMESZ(15);  // turn on 16 bit mode
+
+    // Lets clear the reader queue
+    port().CR = LPSPI_CR_RRF | LPSPI_CR_MEN;    // clear the queue and make sure still enabled.
+
+    while (count > 0) {
+        // Push out the next byte;
+        port().TDR = p_write? *p_write++ : _transferWriteFill;
+        count--; // how many bytes left to output.
+        // Make sure queue is not full before pushing next byte out
+        do {
+            if ((port().RSR & LPSPI_RSR_RXEMPTY) == 0)  {
+                uint16_t b = port().RDR;  // Read any pending RX bytes in
+                if (p_read) *p_read++ = b;
+                count_read--;
+            }
+        } while ((port().SR & LPSPI_SR_TDF) == 0) ;
+
+    }
+
+    // now lets wait for all of the read bytes to be returned...
+    while (count_read) {
+        if ((port().RSR & LPSPI_RSR_RXEMPTY) == 0)  {
+            uint16_t b = port().RDR;  // Read any pending RX bytes in
+            if (p_read) *p_read++ = b;
+            count_read--;
+        }
+    }
+    
+    port().TCR = tcr;    // restore back
+}
+
+void SPIClass::transfer32(const void * buf, void * retbuf, size_t count)
+{
+    if (count == 0) return;
+    uint32_t *p_write = (uint32_t*)buf;
+    uint32_t *p_read = (uint32_t*)retbuf;
+    size_t count_read = count;
+    
+    uint32_t tcr = port().TCR;
+    port().TCR = (tcr & 0xfffff000) | LPSPI_TCR_FRAMESZ(31);  // turn on 32 bit mode
+
+    // Lets clear the reader queue
+    port().CR = LPSPI_CR_RRF | LPSPI_CR_MEN;    // clear the queue and make sure still enabled.
+
+    while (count > 0) {
+        // Push out the next byte;
+        port().TDR = p_write? ((*p_write) << 16) | ((*p_write) >> 16) : _transferWriteFill;
+        p_write++;
+        count--; // how many bytes left to output.
+        // Make sure queue is not full before pushing next byte out
+        do {
+            if ((port().RSR & LPSPI_RSR_RXEMPTY) == 0)  {
+                uint32_t b = port().RDR;  // Read any pending RX bytes in
+                if (p_read) *p_read++ = b;
+                count_read--;
+            }
+        } while ((port().SR & LPSPI_SR_TDF) == 0) ;
+
+    }
+
+    // now lets wait for all of the read bytes to be returned...
+    while (count_read) {
+        if ((port().RSR & LPSPI_RSR_RXEMPTY) == 0)  {
+            uint32_t b = port().RDR;  // Read any pending RX bytes in
+            if (p_read) *p_read++ = b;
+            count_read--;
+        }
+    }
+    
+    port().TCR = tcr;    // restore back
+}
+
 
 void SPIClass::end() {
 	// only do something if we have begun

SPI.h

@@ -1254,10 +1254,22 @@ public:
 		port().TCR = tcr;	// restore back
 		return port().RDR;
 	}
+    uint32_t transfer32(uint32_t data) {
+        uint32_t tcr = port().TCR;
+        port().TCR = (tcr & 0xfffff000) | LPSPI_TCR_FRAMESZ(31);  // turn on 32 bit mode
+        port().TDR = data;        // output 32 bit data.
+        while ((port().RSR & LPSPI_RSR_RXEMPTY)) ;    // wait while the RSR fifo is empty...
+        port().TCR = tcr;    // restore back
+        return port().RDR;
+    }
 
 	void inline transfer(void *buf, size_t count) {transfer(buf, buf, count);}
+    void inline transfer16(void *buf, size_t count) {transfer16(buf, buf, count);}
+    void inline transfer32(void *buf, size_t count) {transfer32(buf, buf, count);}
 	void setTransferWriteFill(uint8_t ch ) {_transferWriteFill = ch;}
 	void transfer(const void * buf, void * retbuf, size_t count);
+    void transfer16(const void * buf, void * retbuf, size_t count);
+    void transfer32(const void * buf, void * retbuf, size_t count);
 
 	// Asynch support (DMA )
 #ifdef SPI_HAS_TRANSFER_ASYNC