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  1. /*
  2. * Copyright (c) 2010 by Cristian Maglie <c.maglie@bug.st>
  3. * Copyright (c) 2014 by Paul Stoffregen <paul@pjrc.com> (Transaction API)
  4. * Copyright (c) 2014 by Matthijs Kooijman <matthijs@stdin.nl> (SPISettings AVR)
  5. * SPI Master library for arduino.
  6. *
  7. * This file is free software; you can redistribute it and/or modify
  8. * it under the terms of either the GNU General Public License version 2
  9. * or the GNU Lesser General Public License version 2.1, both as
  10. * published by the Free Software Foundation.
  11. */
  12. #ifndef _SPI_H_INCLUDED
  13. #define _SPI_H_INCLUDED
  14. #include <Arduino.h>
  15. // SPI_HAS_TRANSACTION means SPI has beginTransaction(), endTransaction(),
  16. // usingInterrupt(), and SPISetting(clock, bitOrder, dataMode)
  17. #define SPI_HAS_TRANSACTION 1
  18. // Uncomment this line to add detection of mismatched begin/end transactions.
  19. // A mismatch occurs if other libraries fail to use SPI.endTransaction() for
  20. // each SPI.beginTransaction(). Connect a LED to this pin. The LED will turn
  21. // on if any mismatch is ever detected.
  22. //#define SPI_TRANSACTION_MISMATCH_LED 5
  23. #ifndef __SAM3X8E__
  24. #ifndef LSBFIRST
  25. #define LSBFIRST 0
  26. #endif
  27. #ifndef MSBFIRST
  28. #define MSBFIRST 1
  29. #endif
  30. #endif
  31. #define SPI_MODE0 0x00
  32. #define SPI_MODE1 0x04
  33. #define SPI_MODE2 0x08
  34. #define SPI_MODE3 0x0C
  35. #define SPI_CLOCK_DIV4 0x00
  36. #define SPI_CLOCK_DIV16 0x01
  37. #define SPI_CLOCK_DIV64 0x02
  38. #define SPI_CLOCK_DIV128 0x03
  39. #define SPI_CLOCK_DIV2 0x04
  40. #define SPI_CLOCK_DIV8 0x05
  41. #define SPI_CLOCK_DIV32 0x06
  42. #define SPI_MODE_MASK 0x0C // CPOL = bit 3, CPHA = bit 2 on SPCR
  43. #define SPI_CLOCK_MASK 0x03 // SPR1 = bit 1, SPR0 = bit 0 on SPCR
  44. #define SPI_2XCLOCK_MASK 0x01 // SPI2X = bit 0 on SPSR
  45. /**********************************************************/
  46. /* 8 bit AVR-based boards */
  47. /**********************************************************/
  48. #if defined(__AVR__)
  49. // define SPI_AVR_EIMSK for AVR boards with external interrupt pins
  50. #if defined(EIMSK)
  51. #define SPI_AVR_EIMSK EIMSK
  52. #elif defined(GICR)
  53. #define SPI_AVR_EIMSK GICR
  54. #elif defined(GIMSK)
  55. #define SPI_AVR_EIMSK GIMSK
  56. #endif
  57. class SPISettings {
  58. public:
  59. SPISettings(uint32_t clock, uint8_t bitOrder, uint8_t dataMode) {
  60. if (__builtin_constant_p(clock)) {
  61. init_AlwaysInline(clock, bitOrder, dataMode);
  62. } else {
  63. init_MightInline(clock, bitOrder, dataMode);
  64. }
  65. }
  66. SPISettings() {
  67. init_AlwaysInline(4000000, MSBFIRST, SPI_MODE0);
  68. }
  69. private:
  70. void init_MightInline(uint32_t clock, uint8_t bitOrder, uint8_t dataMode) {
  71. init_AlwaysInline(clock, bitOrder, dataMode);
  72. }
  73. void init_AlwaysInline(uint32_t clock, uint8_t bitOrder, uint8_t dataMode)
  74. __attribute__((__always_inline__)) {
  75. // Clock settings are defined as follows. Note that this shows SPI2X
  76. // inverted, so the bits form increasing numbers. Also note that
  77. // fosc/64 appears twice
  78. // SPR1 SPR0 ~SPI2X Freq
  79. // 0 0 0 fosc/2
  80. // 0 0 1 fosc/4
  81. // 0 1 0 fosc/8
  82. // 0 1 1 fosc/16
  83. // 1 0 0 fosc/32
  84. // 1 0 1 fosc/64
  85. // 1 1 0 fosc/64
  86. // 1 1 1 fosc/128
  87. // We find the fastest clock that is less than or equal to the
  88. // given clock rate. The clock divider that results in clock_setting
  89. // is 2 ^^ (clock_div + 1). If nothing is slow enough, we'll use the
  90. // slowest (128 == 2 ^^ 7, so clock_div = 6).
  91. uint8_t clockDiv;
  92. // When the clock is known at compiletime, use this if-then-else
  93. // cascade, which the compiler knows how to completely optimize
  94. // away. When clock is not known, use a loop instead, which generates
  95. // shorter code.
  96. if (__builtin_constant_p(clock)) {
  97. if (clock >= F_CPU / 2) {
  98. clockDiv = 0;
  99. } else if (clock >= F_CPU / 4) {
  100. clockDiv = 1;
  101. } else if (clock >= F_CPU / 8) {
  102. clockDiv = 2;
  103. } else if (clock >= F_CPU / 16) {
  104. clockDiv = 3;
  105. } else if (clock >= F_CPU / 32) {
  106. clockDiv = 4;
  107. } else if (clock >= F_CPU / 64) {
  108. clockDiv = 5;
  109. } else {
  110. clockDiv = 6;
  111. }
  112. } else {
  113. uint32_t clockSetting = F_CPU / 2;
  114. clockDiv = 0;
  115. while (clockDiv < 6 && clock < clockSetting) {
  116. clockSetting /= 2;
  117. clockDiv++;
  118. }
  119. }
  120. // Compensate for the duplicate fosc/64
  121. if (clockDiv == 6)
  122. clockDiv = 7;
  123. // Invert the SPI2X bit
  124. clockDiv ^= 0x1;
  125. // Pack into the SPISettings class
  126. spcr = _BV(SPE) | _BV(MSTR) | ((bitOrder == LSBFIRST) ? _BV(DORD) : 0) |
  127. (dataMode & SPI_MODE_MASK) | ((clockDiv >> 1) & SPI_CLOCK_MASK);
  128. spsr = clockDiv & SPI_2XCLOCK_MASK;
  129. }
  130. uint8_t spcr;
  131. uint8_t spsr;
  132. friend class SPIClass;
  133. };
  134. class SPIClass {
  135. public:
  136. // Initialize the SPI library
  137. static void begin();
  138. // If SPI is used from within an interrupt, this function registers
  139. // that interrupt with the SPI library, so beginTransaction() can
  140. // prevent conflicts. The input interruptNumber is the number used
  141. // with attachInterrupt. If SPI is used from a different interrupt
  142. // (eg, a timer), interruptNumber should be 255.
  143. static void usingInterrupt(uint8_t interruptNumber);
  144. // Before using SPI.transfer() or asserting chip select pins,
  145. // this function is used to gain exclusive access to the SPI bus
  146. // and configure the correct settings.
  147. inline static void beginTransaction(SPISettings settings) {
  148. if (interruptMode > 0) {
  149. #ifdef SPI_AVR_EIMSK
  150. if (interruptMode == 1) {
  151. interruptSave = SPI_AVR_EIMSK;
  152. SPI_AVR_EIMSK &= ~interruptMask;
  153. } else
  154. #endif
  155. {
  156. uint8_t tmp = SREG;
  157. cli();
  158. interruptSave = tmp;
  159. }
  160. }
  161. #ifdef SPI_TRANSACTION_MISMATCH_LED
  162. if (inTransactionFlag) {
  163. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  164. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  165. }
  166. inTransactionFlag = 1;
  167. #endif
  168. SPCR = settings.spcr;
  169. SPSR = settings.spsr;
  170. }
  171. // Write to the SPI bus (MOSI pin) and also receive (MISO pin)
  172. inline static uint8_t transfer(uint8_t data) {
  173. SPDR = data;
  174. asm volatile("nop");
  175. while (!(SPSR & _BV(SPIF))) ; // wait
  176. return SPDR;
  177. }
  178. inline static uint16_t transfer16(uint16_t data) {
  179. union { uint16_t val; struct { uint8_t lsb; uint8_t msb; }; } in, out;
  180. in.val = data;
  181. if ((SPCR & _BV(DORD))) {
  182. SPDR = in.lsb;
  183. asm volatile("nop");
  184. while (!(SPSR & _BV(SPIF))) ;
  185. out.lsb = SPDR;
  186. SPDR = in.msb;
  187. asm volatile("nop");
  188. while (!(SPSR & _BV(SPIF))) ;
  189. out.msb = SPDR;
  190. } else {
  191. SPDR = in.msb;
  192. asm volatile("nop");
  193. while (!(SPSR & _BV(SPIF))) ;
  194. out.msb = SPDR;
  195. SPDR = in.lsb;
  196. asm volatile("nop");
  197. while (!(SPSR & _BV(SPIF))) ;
  198. out.lsb = SPDR;
  199. }
  200. return out.val;
  201. }
  202. inline static void transfer(void *buf, size_t count) {
  203. if (count == 0) return;
  204. uint8_t *p = (uint8_t *)buf;
  205. SPDR = *p;
  206. while (--count > 0) {
  207. uint8_t out = *(p + 1);
  208. while (!(SPSR & _BV(SPIF))) ;
  209. uint8_t in = SPDR;
  210. SPDR = out;
  211. *p++ = in;
  212. }
  213. while (!(SPSR & _BV(SPIF))) ;
  214. *p = SPDR;
  215. }
  216. // After performing a group of transfers and releasing the chip select
  217. // signal, this function allows others to access the SPI bus
  218. inline static void endTransaction(void) {
  219. #ifdef SPI_TRANSACTION_MISMATCH_LED
  220. if (!inTransactionFlag) {
  221. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  222. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  223. }
  224. inTransactionFlag = 0;
  225. #endif
  226. if (interruptMode > 0) {
  227. #ifdef SPI_AVR_EIMSK
  228. if (interruptMode == 1) {
  229. SPI_AVR_EIMSK = interruptSave;
  230. } else
  231. #endif
  232. {
  233. SREG = interruptSave;
  234. }
  235. }
  236. }
  237. // Disable the SPI bus
  238. static void end();
  239. // This function is deprecated. New applications should use
  240. // beginTransaction() to configure SPI settings.
  241. inline static void setBitOrder(uint8_t bitOrder) {
  242. if (bitOrder == LSBFIRST) SPCR |= _BV(DORD);
  243. else SPCR &= ~(_BV(DORD));
  244. }
  245. // This function is deprecated. New applications should use
  246. // beginTransaction() to configure SPI settings.
  247. inline static void setDataMode(uint8_t dataMode) {
  248. SPCR = (SPCR & ~SPI_MODE_MASK) | dataMode;
  249. }
  250. // This function is deprecated. New applications should use
  251. // beginTransaction() to configure SPI settings.
  252. inline static void setClockDivider(uint8_t clockDiv) {
  253. SPCR = (SPCR & ~SPI_CLOCK_MASK) | (clockDiv & SPI_CLOCK_MASK);
  254. SPSR = (SPSR & ~SPI_2XCLOCK_MASK) | ((clockDiv >> 2) & SPI_2XCLOCK_MASK);
  255. }
  256. // These undocumented functions should not be used. SPI.transfer()
  257. // polls the hardware flag which is automatically cleared as the
  258. // AVR responds to SPI's interrupt
  259. inline static void attachInterrupt() { SPCR |= _BV(SPIE); }
  260. inline static void detachInterrupt() { SPCR &= ~_BV(SPIE); }
  261. private:
  262. static uint8_t interruptMode; // 0=none, 1=mask, 2=global
  263. static uint8_t interruptMask; // which interrupts to mask
  264. static uint8_t interruptSave; // temp storage, to restore state
  265. #ifdef SPI_TRANSACTION_MISMATCH_LED
  266. static uint8_t inTransactionFlag;
  267. #endif
  268. };
  269. /**********************************************************/
  270. /* 32 bit Teensy 3.0 and 3.1 */
  271. /**********************************************************/
  272. #elif defined(__arm__) && defined(TEENSYDUINO) && defined(KINETISK)
  273. #define SPI_HAS_NOTUSINGINTERRUPT 1
  274. class SPISettings {
  275. public:
  276. SPISettings(uint32_t clock, uint8_t bitOrder, uint8_t dataMode) {
  277. if (__builtin_constant_p(clock)) {
  278. init_AlwaysInline(clock, bitOrder, dataMode);
  279. } else {
  280. init_MightInline(clock, bitOrder, dataMode);
  281. }
  282. }
  283. SPISettings() {
  284. init_AlwaysInline(4000000, MSBFIRST, SPI_MODE0);
  285. }
  286. private:
  287. void init_MightInline(uint32_t clock, uint8_t bitOrder, uint8_t dataMode) {
  288. init_AlwaysInline(clock, bitOrder, dataMode);
  289. }
  290. void init_AlwaysInline(uint32_t clock, uint8_t bitOrder, uint8_t dataMode)
  291. __attribute__((__always_inline__)) {
  292. uint32_t t, c = SPI_CTAR_FMSZ(7);
  293. if (bitOrder == LSBFIRST) c |= SPI_CTAR_LSBFE;
  294. if (__builtin_constant_p(clock)) {
  295. if (clock >= F_BUS / 2) {
  296. t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(0) | SPI_CTAR_DBR
  297. | SPI_CTAR_CSSCK(0);
  298. } else if (clock >= F_BUS / 3) {
  299. t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(0) | SPI_CTAR_DBR
  300. | SPI_CTAR_CSSCK(0);
  301. } else if (clock >= F_BUS / 4) {
  302. t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(0) | SPI_CTAR_CSSCK(0);
  303. } else if (clock >= F_BUS / 5) {
  304. t = SPI_CTAR_PBR(2) | SPI_CTAR_BR(0) | SPI_CTAR_DBR
  305. | SPI_CTAR_CSSCK(0);
  306. } else if (clock >= F_BUS / 6) {
  307. t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(0) | SPI_CTAR_CSSCK(0);
  308. } else if (clock >= F_BUS / 8) {
  309. t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(1) | SPI_CTAR_CSSCK(1);
  310. } else if (clock >= F_BUS / 10) {
  311. t = SPI_CTAR_PBR(2) | SPI_CTAR_BR(0) | SPI_CTAR_CSSCK(0);
  312. } else if (clock >= F_BUS / 12) {
  313. t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(1) | SPI_CTAR_CSSCK(1);
  314. } else if (clock >= F_BUS / 16) {
  315. t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(3) | SPI_CTAR_CSSCK(2);
  316. } else if (clock >= F_BUS / 20) {
  317. t = SPI_CTAR_PBR(2) | SPI_CTAR_BR(1) | SPI_CTAR_CSSCK(0);
  318. } else if (clock >= F_BUS / 24) {
  319. t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(3) | SPI_CTAR_CSSCK(2);
  320. } else if (clock >= F_BUS / 32) {
  321. t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(4) | SPI_CTAR_CSSCK(3);
  322. } else if (clock >= F_BUS / 40) {
  323. t = SPI_CTAR_PBR(2) | SPI_CTAR_BR(3) | SPI_CTAR_CSSCK(2);
  324. } else if (clock >= F_BUS / 56) {
  325. t = SPI_CTAR_PBR(3) | SPI_CTAR_BR(3) | SPI_CTAR_CSSCK(2);
  326. } else if (clock >= F_BUS / 64) {
  327. t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(5) | SPI_CTAR_CSSCK(4);
  328. } else if (clock >= F_BUS / 96) {
  329. t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(5) | SPI_CTAR_CSSCK(4);
  330. } else if (clock >= F_BUS / 128) {
  331. t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(6) | SPI_CTAR_CSSCK(5);
  332. } else if (clock >= F_BUS / 192) {
  333. t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(6) | SPI_CTAR_CSSCK(5);
  334. } else if (clock >= F_BUS / 256) {
  335. t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(7) | SPI_CTAR_CSSCK(6);
  336. } else if (clock >= F_BUS / 384) {
  337. t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(7) | SPI_CTAR_CSSCK(6);
  338. } else if (clock >= F_BUS / 512) {
  339. t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(8) | SPI_CTAR_CSSCK(7);
  340. } else if (clock >= F_BUS / 640) {
  341. t = SPI_CTAR_PBR(2) | SPI_CTAR_BR(7) | SPI_CTAR_CSSCK(6);
  342. } else { /* F_BUS / 768 */
  343. t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(8) | SPI_CTAR_CSSCK(7);
  344. }
  345. } else {
  346. for (uint32_t i=0; i<23; i++) {
  347. t = ctar_clock_table[i];
  348. if (clock >= F_BUS / ctar_div_table[i]) break;
  349. }
  350. }
  351. if (dataMode & 0x08) {
  352. c |= SPI_CTAR_CPOL;
  353. }
  354. if (dataMode & 0x04) {
  355. c |= SPI_CTAR_CPHA;
  356. t = (t & 0xFFFF0FFF) | ((t & 0xF000) >> 4);
  357. }
  358. ctar = c | t;
  359. }
  360. static const uint16_t ctar_div_table[23];
  361. static const uint32_t ctar_clock_table[23];
  362. uint32_t ctar;
  363. friend class SPIClass;
  364. };
  365. class SPIClass {
  366. public:
  367. // Initialize the SPI library
  368. static void begin();
  369. // If SPI is to used from within an interrupt, this function registers
  370. // that interrupt with the SPI library, so beginTransaction() can
  371. // prevent conflicts. The input interruptNumber is the number used
  372. // with attachInterrupt. If SPI is used from a different interrupt
  373. // (eg, a timer), interruptNumber should be 255.
  374. static void usingInterrupt(uint8_t n) {
  375. if (n == 3 || n == 4 || n == 24 || n == 33) {
  376. usingInterrupt(IRQ_PORTA);
  377. } else if (n == 0 || n == 1 || (n >= 16 && n <= 19) || n == 25 || n == 32) {
  378. usingInterrupt(IRQ_PORTB);
  379. } else if ((n >= 9 && n <= 13) || n == 15 || n == 22 || n == 23
  380. || (n >= 27 && n <= 30)) {
  381. usingInterrupt(IRQ_PORTC);
  382. } else if (n == 2 || (n >= 5 && n <= 8) || n == 14 || n == 20 || n == 21) {
  383. usingInterrupt(IRQ_PORTD);
  384. } else if (n == 26 || n == 31) {
  385. usingInterrupt(IRQ_PORTE);
  386. }
  387. }
  388. static void usingInterrupt(IRQ_NUMBER_t interruptName);
  389. static void notUsingInterrupt(IRQ_NUMBER_t interruptName);
  390. // Before using SPI.transfer() or asserting chip select pins,
  391. // this function is used to gain exclusive access to the SPI bus
  392. // and configure the correct settings.
  393. inline static void beginTransaction(SPISettings settings) {
  394. if (interruptMasksUsed) {
  395. __disable_irq();
  396. if (interruptMasksUsed & 0x01) {
  397. interruptSave[0] = NVIC_ICER0 & interruptMask[0];
  398. NVIC_ICER0 = interruptSave[0];
  399. }
  400. #if NVIC_NUM_INTERRUPTS > 32
  401. if (interruptMasksUsed & 0x02) {
  402. interruptSave[1] = NVIC_ICER1 & interruptMask[1];
  403. NVIC_ICER1 = interruptSave[1];
  404. }
  405. #endif
  406. #if NVIC_NUM_INTERRUPTS > 64 && defined(NVIC_ISER2)
  407. if (interruptMasksUsed & 0x04) {
  408. interruptSave[2] = NVIC_ICER2 & interruptMask[2];
  409. NVIC_ICER2 = interruptSave[2];
  410. }
  411. #endif
  412. #if NVIC_NUM_INTERRUPTS > 96 && defined(NVIC_ISER3)
  413. if (interruptMasksUsed & 0x08) {
  414. interruptSave[3] = NVIC_ICER3 & interruptMask[3];
  415. NVIC_ICER3 = interruptSave[3];
  416. }
  417. #endif
  418. __enable_irq();
  419. }
  420. #ifdef SPI_TRANSACTION_MISMATCH_LED
  421. if (inTransactionFlag) {
  422. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  423. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  424. }
  425. inTransactionFlag = 1;
  426. #endif
  427. if (SPI0_CTAR0 != settings.ctar) {
  428. SPI0_MCR = SPI_MCR_MDIS | SPI_MCR_HALT | SPI_MCR_PCSIS(0x1F);
  429. SPI0_CTAR0 = settings.ctar;
  430. SPI0_CTAR1 = settings.ctar| SPI_CTAR_FMSZ(8);
  431. SPI0_MCR = SPI_MCR_MSTR | SPI_MCR_PCSIS(0x1F);
  432. }
  433. }
  434. // Write to the SPI bus (MOSI pin) and also receive (MISO pin)
  435. inline static uint8_t transfer(uint8_t data) {
  436. SPI0_SR = SPI_SR_TCF;
  437. SPI0_PUSHR = data;
  438. while (!(SPI0_SR & SPI_SR_TCF)) ; // wait
  439. return SPI0_POPR;
  440. }
  441. inline static uint8_t transfer16(uint16_t data) {
  442. SPI0_SR = SPI_SR_TCF;
  443. SPI0_PUSHR = data | SPI_PUSHR_CTAS(1);
  444. while (!(SPI0_SR & SPI_SR_TCF)) ; // wait
  445. return SPI0_POPR;
  446. }
  447. inline static void transfer(void *buf, size_t count) {
  448. if (count == 0) return;
  449. uint8_t *p = (uint8_t *)buf;
  450. SPDR = *p;
  451. while (--count > 0) {
  452. uint8_t out = *(p + 1);
  453. while (!(SPSR & _BV(SPIF))) ;
  454. uint8_t in = SPDR;
  455. SPDR = out;
  456. *p++ = in;
  457. }
  458. while (!(SPSR & _BV(SPIF))) ;
  459. *p = SPDR;
  460. }
  461. // After performing a group of transfers and releasing the chip select
  462. // signal, this function allows others to access the SPI bus
  463. inline static void endTransaction(void) {
  464. #ifdef SPI_TRANSACTION_MISMATCH_LED
  465. if (!inTransactionFlag) {
  466. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  467. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  468. }
  469. inTransactionFlag = 0;
  470. #endif
  471. if (interruptMasksUsed) {
  472. if (interruptMasksUsed & 0x01) {
  473. NVIC_ISER0 = interruptSave[0];
  474. }
  475. #if NVIC_NUM_INTERRUPTS > 32
  476. if (interruptMasksUsed & 0x02) {
  477. NVIC_ISER1 = interruptSave[1];
  478. }
  479. #endif
  480. #if NVIC_NUM_INTERRUPTS > 64 && defined(NVIC_ISER2)
  481. if (interruptMasksUsed & 0x04) {
  482. NVIC_ISER2 = interruptSave[2];
  483. }
  484. #endif
  485. #if NVIC_NUM_INTERRUPTS > 96 && defined(NVIC_ISER3)
  486. if (interruptMasksUsed & 0x08) {
  487. NVIC_ISER3 = interruptSave[3];
  488. }
  489. #endif
  490. }
  491. }
  492. // Disable the SPI bus
  493. static void end();
  494. // This function is deprecated. New applications should use
  495. // beginTransaction() to configure SPI settings.
  496. static void setBitOrder(uint8_t bitOrder);
  497. // This function is deprecated. New applications should use
  498. // beginTransaction() to configure SPI settings.
  499. static void setDataMode(uint8_t dataMode);
  500. // This function is deprecated. New applications should use
  501. // beginTransaction() to configure SPI settings.
  502. inline static void setClockDivider(uint8_t clockDiv) {
  503. if (clockDiv == SPI_CLOCK_DIV2) {
  504. setClockDivider_noInline(SPISettings(8000000, MSBFIRST, SPI_MODE0).ctar);
  505. } else if (clockDiv == SPI_CLOCK_DIV4) {
  506. setClockDivider_noInline(SPISettings(4000000, MSBFIRST, SPI_MODE0).ctar);
  507. } else if (clockDiv == SPI_CLOCK_DIV8) {
  508. setClockDivider_noInline(SPISettings(2000000, MSBFIRST, SPI_MODE0).ctar);
  509. } else if (clockDiv == SPI_CLOCK_DIV16) {
  510. setClockDivider_noInline(SPISettings(1000000, MSBFIRST, SPI_MODE0).ctar);
  511. } else if (clockDiv == SPI_CLOCK_DIV32) {
  512. setClockDivider_noInline(SPISettings(500000, MSBFIRST, SPI_MODE0).ctar);
  513. } else if (clockDiv == SPI_CLOCK_DIV64) {
  514. setClockDivider_noInline(SPISettings(250000, MSBFIRST, SPI_MODE0).ctar);
  515. } else { /* clockDiv == SPI_CLOCK_DIV128 */
  516. setClockDivider_noInline(SPISettings(125000, MSBFIRST, SPI_MODE0).ctar);
  517. }
  518. }
  519. static void setClockDivider_noInline(uint32_t clk);
  520. // These undocumented functions should not be used. SPI.transfer()
  521. // polls the hardware flag which is automatically cleared as the
  522. // AVR responds to SPI's interrupt
  523. inline static void attachInterrupt() { }
  524. inline static void detachInterrupt() { }
  525. // Teensy 3.x can use alternate pins for these 3 SPI signals.
  526. inline static void setMOSI(uint8_t pin) __attribute__((always_inline)) {
  527. SPCR.setMOSI(pin);
  528. }
  529. inline static void setMISO(uint8_t pin) __attribute__((always_inline)) {
  530. SPCR.setMISO(pin);
  531. }
  532. inline static void setSCK(uint8_t pin) __attribute__((always_inline)) {
  533. SPCR.setSCK(pin);
  534. }
  535. // return true if "pin" has special chip select capability
  536. static bool pinIsChipSelect(uint8_t pin);
  537. // return true if both pin1 and pin2 have independent chip select capability
  538. static bool pinIsChipSelect(uint8_t pin1, uint8_t pin2);
  539. // configure a pin for chip select and return its SPI_MCR_PCSIS bitmask
  540. static uint8_t setCS(uint8_t pin);
  541. private:
  542. static uint8_t interruptMasksUsed;
  543. static uint32_t interruptMask[(NVIC_NUM_INTERRUPTS+31)/32];
  544. static uint32_t interruptSave[(NVIC_NUM_INTERRUPTS+31)/32];
  545. #ifdef SPI_TRANSACTION_MISMATCH_LED
  546. static uint8_t inTransactionFlag;
  547. #endif
  548. };
  549. /**********************************************************/
  550. /* 32 bit Teensy-LC */
  551. /**********************************************************/
  552. #elif defined(__arm__) && defined(TEENSYDUINO) && defined(KINETISL)
  553. class SPISettings {
  554. public:
  555. SPISettings(uint32_t clock, uint8_t bitOrder, uint8_t dataMode) {
  556. if (__builtin_constant_p(clock)) {
  557. init_AlwaysInline(clock, bitOrder, dataMode);
  558. } else {
  559. init_MightInline(clock, bitOrder, dataMode);
  560. }
  561. }
  562. SPISettings() {
  563. init_AlwaysInline(4000000, MSBFIRST, SPI_MODE0);
  564. }
  565. private:
  566. void init_MightInline(uint32_t clock, uint8_t bitOrder, uint8_t dataMode) {
  567. init_AlwaysInline(clock, bitOrder, dataMode);
  568. }
  569. void init_AlwaysInline(uint32_t clock, uint8_t bitOrder, uint8_t dataMode)
  570. __attribute__((__always_inline__)) {
  571. uint8_t c = SPI_C1_MSTR | SPI_C1_SPE;
  572. if (dataMode & 0x04) c |= SPI_C1_CPHA;
  573. if (dataMode & 0x08) c |= SPI_C1_CPOL;
  574. if (bitOrder == LSBFIRST) c |= SPI_C1_LSBFE;
  575. c1 = c;
  576. if (__builtin_constant_p(clock)) {
  577. if (clock >= F_BUS / 2) { c = SPI_BR_SPPR(0) | SPI_BR_SPR(0);
  578. } else if (clock >= F_BUS / 4) { c = SPI_BR_SPPR(1) | SPI_BR_SPR(0);
  579. } else if (clock >= F_BUS / 6) { c = SPI_BR_SPPR(2) | SPI_BR_SPR(0);
  580. } else if (clock >= F_BUS / 8) { c = SPI_BR_SPPR(3) | SPI_BR_SPR(0);
  581. } else if (clock >= F_BUS / 10) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(0);
  582. } else if (clock >= F_BUS / 12) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(0);
  583. } else if (clock >= F_BUS / 14) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(0);
  584. } else if (clock >= F_BUS / 16) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(0);
  585. } else if (clock >= F_BUS / 20) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(1);
  586. } else if (clock >= F_BUS / 24) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(1);
  587. } else if (clock >= F_BUS / 28) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(1);
  588. } else if (clock >= F_BUS / 32) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(1);
  589. } else if (clock >= F_BUS / 40) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(2);
  590. } else if (clock >= F_BUS / 48) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(2);
  591. } else if (clock >= F_BUS / 56) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(2);
  592. } else if (clock >= F_BUS / 64) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(2);
  593. } else if (clock >= F_BUS / 80) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(3);
  594. } else if (clock >= F_BUS / 96) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(3);
  595. } else if (clock >= F_BUS / 112) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(3);
  596. } else if (clock >= F_BUS / 128) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(3);
  597. } else if (clock >= F_BUS / 160) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(4);
  598. } else if (clock >= F_BUS / 192) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(4);
  599. } else if (clock >= F_BUS / 224) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(4);
  600. } else if (clock >= F_BUS / 256) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(4);
  601. } else if (clock >= F_BUS / 320) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(5);
  602. } else if (clock >= F_BUS / 384) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(5);
  603. } else if (clock >= F_BUS / 448) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(5);
  604. } else if (clock >= F_BUS / 512) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(5);
  605. } else if (clock >= F_BUS / 640) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(6);
  606. } else /* F_BUS / 768 */ { c = SPI_BR_SPPR(5) | SPI_BR_SPR(6);
  607. }
  608. } else {
  609. for (uint32_t i=0; i<30; i++) {
  610. c = br_clock_table[i];
  611. if (clock >= F_BUS / br_div_table[i]) break;
  612. }
  613. }
  614. br0 = c;
  615. if (__builtin_constant_p(clock)) {
  616. if (clock >= (F_PLL/2) / 2) { c = SPI_BR_SPPR(0) | SPI_BR_SPR(0);
  617. } else if (clock >= (F_PLL/2) / 4) { c = SPI_BR_SPPR(1) | SPI_BR_SPR(0);
  618. } else if (clock >= (F_PLL/2) / 6) { c = SPI_BR_SPPR(2) | SPI_BR_SPR(0);
  619. } else if (clock >= (F_PLL/2) / 8) { c = SPI_BR_SPPR(3) | SPI_BR_SPR(0);
  620. } else if (clock >= (F_PLL/2) / 10) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(0);
  621. } else if (clock >= (F_PLL/2) / 12) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(0);
  622. } else if (clock >= (F_PLL/2) / 14) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(0);
  623. } else if (clock >= (F_PLL/2) / 16) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(0);
  624. } else if (clock >= (F_PLL/2) / 20) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(1);
  625. } else if (clock >= (F_PLL/2) / 24) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(1);
  626. } else if (clock >= (F_PLL/2) / 28) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(1);
  627. } else if (clock >= (F_PLL/2) / 32) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(1);
  628. } else if (clock >= (F_PLL/2) / 40) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(2);
  629. } else if (clock >= (F_PLL/2) / 48) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(2);
  630. } else if (clock >= (F_PLL/2) / 56) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(2);
  631. } else if (clock >= (F_PLL/2) / 64) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(2);
  632. } else if (clock >= (F_PLL/2) / 80) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(3);
  633. } else if (clock >= (F_PLL/2) / 96) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(3);
  634. } else if (clock >= (F_PLL/2) / 112) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(3);
  635. } else if (clock >= (F_PLL/2) / 128) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(3);
  636. } else if (clock >= (F_PLL/2) / 160) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(4);
  637. } else if (clock >= (F_PLL/2) / 192) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(4);
  638. } else if (clock >= (F_PLL/2) / 224) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(4);
  639. } else if (clock >= (F_PLL/2) / 256) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(4);
  640. } else if (clock >= (F_PLL/2) / 320) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(5);
  641. } else if (clock >= (F_PLL/2) / 384) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(5);
  642. } else if (clock >= (F_PLL/2) / 448) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(5);
  643. } else if (clock >= (F_PLL/2) / 512) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(5);
  644. } else if (clock >= (F_PLL/2) / 640) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(6);
  645. } else /* (F_PLL/2) / 768 */ { c = SPI_BR_SPPR(5) | SPI_BR_SPR(6);
  646. }
  647. } else {
  648. for (uint32_t i=0; i<30; i++) {
  649. c = br_clock_table[i];
  650. if (clock >= (F_PLL/2) / br_div_table[i]) break;
  651. }
  652. }
  653. br1 = c;
  654. }
  655. static const uint8_t br_clock_table[30];
  656. static const uint16_t br_div_table[30];
  657. uint8_t c1, br0, br1;
  658. friend class SPIClass;
  659. friend class SPI1Class;
  660. };
  661. class SPIClass {
  662. public:
  663. // Initialize the SPI library
  664. static void begin();
  665. // If SPI is to used from within an interrupt, this function registers
  666. // that interrupt with the SPI library, so beginTransaction() can
  667. // prevent conflicts. The input interruptNumber is the number used
  668. // with attachInterrupt. If SPI is used from a different interrupt
  669. // (eg, a timer), interruptNumber should be 255.
  670. static void usingInterrupt(uint8_t n) {
  671. if (n == 3 || n == 4) {
  672. usingInterrupt(IRQ_PORTA);
  673. } else if ((n >= 2 && n <= 15) || (n >= 20 && n <= 23)) {
  674. usingInterrupt(IRQ_PORTCD);
  675. }
  676. }
  677. static void usingInterrupt(IRQ_NUMBER_t interruptName) {
  678. uint32_t n = (uint32_t)interruptName;
  679. if (n < NVIC_NUM_INTERRUPTS) interruptMask |= (1 << n);
  680. }
  681. static void notUsingInterrupt(IRQ_NUMBER_t interruptName) {
  682. uint32_t n = (uint32_t)interruptName;
  683. if (n < NVIC_NUM_INTERRUPTS) interruptMask &= ~(1 << n);
  684. }
  685. // Before using SPI.transfer() or asserting chip select pins,
  686. // this function is used to gain exclusive access to the SPI bus
  687. // and configure the correct settings.
  688. inline static void beginTransaction(SPISettings settings) {
  689. if (interruptMask) {
  690. __disable_irq();
  691. interruptSave = NVIC_ICER0 & interruptMask;
  692. NVIC_ICER0 = interruptSave;
  693. __enable_irq();
  694. }
  695. #ifdef SPI_TRANSACTION_MISMATCH_LED
  696. if (inTransactionFlag) {
  697. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  698. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  699. }
  700. inTransactionFlag = 1;
  701. #endif
  702. SPI0_C1 = settings.c1;
  703. SPI0_BR = settings.br0;
  704. }
  705. // Write to the SPI bus (MOSI pin) and also receive (MISO pin)
  706. inline static uint8_t transfer(uint8_t data) {
  707. SPI0_DL = data;
  708. while (!(SPI0_S & SPI_S_SPRF)) ; // wait
  709. return SPI0_DL;
  710. }
  711. inline static uint8_t transfer16(uint16_t data) {
  712. SPI0_C2 = SPI_C2_SPIMODE;
  713. SPI0_DH = data >> 8;
  714. SPI0_DL = data;
  715. while (!(SPI0_S & SPI_S_SPRF)) ; // wait
  716. uint16_t r = (SPI0_DH << 8) | SPI0_DL;
  717. SPI0_C2 = 0;
  718. return r;
  719. }
  720. inline static void transfer(void *buf, size_t count) {
  721. if (count == 0) return;
  722. uint8_t *p = (uint8_t *)buf;
  723. while (!(SPI0_S & SPI_S_SPTEF)) ; // wait
  724. SPI0_DL = *p;
  725. while (--count > 0) {
  726. uint8_t out = *(p + 1);
  727. while (!(SPI0_S & SPI_S_SPTEF)) ; // wait
  728. __disable_irq();
  729. SPI0_DL = out;
  730. while (!(SPI0_S & SPI_S_SPRF)) ; // wait
  731. uint8_t in = SPI0_DL;
  732. __enable_irq();
  733. *p++ = in;
  734. }
  735. while (!(SPI0_S & SPI_S_SPRF)) ; // wait
  736. *p = SPDR;
  737. }
  738. // After performing a group of transfers and releasing the chip select
  739. // signal, this function allows others to access the SPI bus
  740. inline static void endTransaction(void) {
  741. #ifdef SPI_TRANSACTION_MISMATCH_LED
  742. if (!inTransactionFlag) {
  743. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  744. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  745. }
  746. inTransactionFlag = 0;
  747. #endif
  748. if (interruptMask) {
  749. NVIC_ISER0 = interruptSave;
  750. }
  751. }
  752. // Disable the SPI bus
  753. static void end();
  754. // This function is deprecated. New applications should use
  755. // beginTransaction() to configure SPI settings.
  756. static void setBitOrder(uint8_t bitOrder) {
  757. uint8_t c = SPI0_C1 | SPI_C1_SPE;
  758. if (bitOrder == LSBFIRST) c |= SPI_C1_LSBFE;
  759. else c &= ~SPI_C1_LSBFE;
  760. SPI0_C1 = c;
  761. }
  762. // This function is deprecated. New applications should use
  763. // beginTransaction() to configure SPI settings.
  764. static void setDataMode(uint8_t dataMode) {
  765. uint8_t c = SPI0_C1 | SPI_C1_SPE;
  766. if (dataMode & 0x04) c |= SPI_C1_CPHA;
  767. else c &= ~SPI_C1_CPHA;
  768. if (dataMode & 0x08) c |= SPI_C1_CPOL;
  769. else c &= ~SPI_C1_CPOL;
  770. SPI0_C1 = c;
  771. }
  772. // This function is deprecated. New applications should use
  773. // beginTransaction() to configure SPI settings.
  774. inline static void setClockDivider(uint8_t clockDiv) {
  775. if (clockDiv == SPI_CLOCK_DIV2) {
  776. SPI0_BR = (SPISettings(8000000, MSBFIRST, SPI_MODE0).br0);
  777. } else if (clockDiv == SPI_CLOCK_DIV4) {
  778. SPI0_BR = (SPISettings(4000000, MSBFIRST, SPI_MODE0).br0);
  779. } else if (clockDiv == SPI_CLOCK_DIV8) {
  780. SPI0_BR = (SPISettings(2000000, MSBFIRST, SPI_MODE0).br0);
  781. } else if (clockDiv == SPI_CLOCK_DIV16) {
  782. SPI0_BR = (SPISettings(1000000, MSBFIRST, SPI_MODE0).br0);
  783. } else if (clockDiv == SPI_CLOCK_DIV32) {
  784. SPI0_BR = (SPISettings(500000, MSBFIRST, SPI_MODE0).br0);
  785. } else if (clockDiv == SPI_CLOCK_DIV64) {
  786. SPI0_BR = (SPISettings(250000, MSBFIRST, SPI_MODE0).br0);
  787. } else { /* clockDiv == SPI_CLOCK_DIV128 */
  788. SPI0_BR = (SPISettings(125000, MSBFIRST, SPI_MODE0).br0);
  789. }
  790. }
  791. // These undocumented functions should not be used. SPI.transfer()
  792. // polls the hardware flag which is automatically cleared as the
  793. // AVR responds to SPI's interrupt
  794. inline static void attachInterrupt() { }
  795. inline static void detachInterrupt() { }
  796. // Teensy 3.x can use alternate pins for these 3 SPI signals.
  797. inline static void setMOSI(uint8_t pin) __attribute__((always_inline)) {
  798. SPCR.setMOSI(pin);
  799. }
  800. inline static void setMISO(uint8_t pin) __attribute__((always_inline)) {
  801. SPCR.setMISO(pin);
  802. }
  803. inline static void setSCK(uint8_t pin) __attribute__((always_inline)) {
  804. SPCR.setSCK(pin);
  805. }
  806. // return true if "pin" has special chip select capability
  807. static bool pinIsChipSelect(uint8_t pin) { return (pin == 10 || pin == 2); }
  808. // return true if both pin1 and pin2 have independent chip select capability
  809. static bool pinIsChipSelect(uint8_t pin1, uint8_t pin2) { return false; }
  810. // configure a pin for chip select and return its SPI_MCR_PCSIS bitmask
  811. static uint8_t setCS(uint8_t pin);
  812. private:
  813. static uint32_t interruptMask;
  814. static uint32_t interruptSave;
  815. #ifdef SPI_TRANSACTION_MISMATCH_LED
  816. static uint8_t inTransactionFlag;
  817. #endif
  818. };
  819. class SPI1Class {
  820. public:
  821. // Initialize the SPI library
  822. static void begin();
  823. // If SPI is to used from within an interrupt, this function registers
  824. // that interrupt with the SPI library, so beginTransaction() can
  825. // prevent conflicts. The input interruptNumber is the number used
  826. // with attachInterrupt. If SPI is used from a different interrupt
  827. // (eg, a timer), interruptNumber should be 255.
  828. static void usingInterrupt(uint8_t n) {
  829. if (n == 3 || n == 4) {
  830. usingInterrupt(IRQ_PORTA);
  831. } else if ((n >= 2 && n <= 15) || (n >= 20 && n <= 23)) {
  832. usingInterrupt(IRQ_PORTCD);
  833. }
  834. }
  835. static void usingInterrupt(IRQ_NUMBER_t interruptName) {
  836. uint32_t n = (uint32_t)interruptName;
  837. if (n < NVIC_NUM_INTERRUPTS) interruptMask |= (1 << n);
  838. }
  839. static void notUsingInterrupt(IRQ_NUMBER_t interruptName) {
  840. uint32_t n = (uint32_t)interruptName;
  841. if (n < NVIC_NUM_INTERRUPTS) interruptMask &= ~(1 << n);
  842. }
  843. // Before using SPI.transfer() or asserting chip select pins,
  844. // this function is used to gain exclusive access to the SPI bus
  845. // and configure the correct settings.
  846. inline static void beginTransaction(SPISettings settings) {
  847. if (interruptMask) {
  848. __disable_irq();
  849. interruptSave = NVIC_ICER0 & interruptMask;
  850. NVIC_ICER0 = interruptSave;
  851. __enable_irq();
  852. }
  853. #ifdef SPI_TRANSACTION_MISMATCH_LED
  854. if (inTransactionFlag) {
  855. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  856. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  857. }
  858. inTransactionFlag = 1;
  859. #endif
  860. SPI1_C1 = settings.c1;
  861. SPI1_BR = settings.br1;
  862. }
  863. // Write to the SPI bus (MOSI pin) and also receive (MISO pin)
  864. inline static uint8_t transfer(uint8_t data) {
  865. SPI1_DL = data;
  866. while (!(SPI1_S & SPI_S_SPRF)) ; // wait
  867. return SPI1_DL;
  868. }
  869. inline static uint8_t transfer16(uint16_t data) {
  870. SPI1_C2 = SPI_C2_SPIMODE;
  871. SPI1_DH = data >> 8;
  872. SPI1_DL = data;
  873. while (!(SPI1_S & SPI_S_SPRF)) ; // wait
  874. uint16_t r = (SPI1_DH << 8) | SPI1_DL;
  875. SPI1_C2 = 0;
  876. return r;
  877. }
  878. inline static void transfer(void *buf, size_t count) {
  879. if (count == 0) return;
  880. uint8_t *p = (uint8_t *)buf;
  881. while (!(SPI1_S & SPI_S_SPTEF)) ; // wait
  882. SPI1_DL = *p;
  883. while (--count > 0) {
  884. uint8_t out = *(p + 1);
  885. while (!(SPI1_S & SPI_S_SPTEF)) ; // wait
  886. __disable_irq();
  887. SPI1_DL = out;
  888. while (!(SPI1_S & SPI_S_SPRF)) ; // wait
  889. uint8_t in = SPI1_DL;
  890. __enable_irq();
  891. *p++ = in;
  892. }
  893. while (!(SPI1_S & SPI_S_SPRF)) ; // wait
  894. *p = SPDR;
  895. }
  896. // After performing a group of transfers and releasing the chip select
  897. // signal, this function allows others to access the SPI bus
  898. inline static void endTransaction(void) {
  899. #ifdef SPI_TRANSACTION_MISMATCH_LED
  900. if (!inTransactionFlag) {
  901. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  902. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  903. }
  904. inTransactionFlag = 0;
  905. #endif
  906. if (interruptMask) {
  907. NVIC_ISER0 = interruptSave;
  908. }
  909. }
  910. // Disable the SPI bus
  911. static void end();
  912. // This function is deprecated. New applications should use
  913. // beginTransaction() to configure SPI settings.
  914. static void setBitOrder(uint8_t bitOrder) {
  915. uint8_t c = SPI1_C1 | SPI_C1_SPE;
  916. if (bitOrder == LSBFIRST) c |= SPI_C1_LSBFE;
  917. else c &= ~SPI_C1_LSBFE;
  918. SPI1_C1 = c;
  919. }
  920. // This function is deprecated. New applications should use
  921. // beginTransaction() to configure SPI settings.
  922. static void setDataMode(uint8_t dataMode) {
  923. uint8_t c = SPI1_C1 | SPI_C1_SPE;
  924. if (dataMode & 0x04) c |= SPI_C1_CPHA;
  925. else c &= ~SPI_C1_CPHA;
  926. if (dataMode & 0x08) c |= SPI_C1_CPOL;
  927. else c &= ~SPI_C1_CPOL;
  928. SPI1_C1 = c;
  929. }
  930. // This function is deprecated. New applications should use
  931. // beginTransaction() to configure SPI settings.
  932. inline static void setClockDivider(uint8_t clockDiv) {
  933. if (clockDiv == SPI_CLOCK_DIV2) {
  934. SPI1_BR = (SPISettings(8000000, MSBFIRST, SPI_MODE0).br1);
  935. } else if (clockDiv == SPI_CLOCK_DIV4) {
  936. SPI1_BR = (SPISettings(4000000, MSBFIRST, SPI_MODE0).br1);
  937. } else if (clockDiv == SPI_CLOCK_DIV8) {
  938. SPI1_BR = (SPISettings(2000000, MSBFIRST, SPI_MODE0).br1);
  939. } else if (clockDiv == SPI_CLOCK_DIV16) {
  940. SPI1_BR = (SPISettings(1000000, MSBFIRST, SPI_MODE0).br1);
  941. } else if (clockDiv == SPI_CLOCK_DIV32) {
  942. SPI1_BR = (SPISettings(500000, MSBFIRST, SPI_MODE0).br1);
  943. } else if (clockDiv == SPI_CLOCK_DIV64) {
  944. SPI1_BR = (SPISettings(250000, MSBFIRST, SPI_MODE0).br1);
  945. } else { /* clockDiv == SPI_CLOCK_DIV128 */
  946. SPI1_BR = (SPISettings(125000, MSBFIRST, SPI_MODE0).br1);
  947. }
  948. }
  949. // These undocumented functions should not be used. SPI.transfer()
  950. // polls the hardware flag which is automatically cleared as the
  951. // AVR responds to SPI's interrupt
  952. inline static void attachInterrupt() { }
  953. inline static void detachInterrupt() { }
  954. // Teensy 3.x can use alternate pins for these 3 SPI signals.
  955. inline static void setMOSI(uint8_t pin) __attribute__((always_inline)) {
  956. SPCR1.setMOSI(pin);
  957. }
  958. inline static void setMISO(uint8_t pin) __attribute__((always_inline)) {
  959. SPCR1.setMISO(pin);
  960. }
  961. inline static void setSCK(uint8_t pin) __attribute__((always_inline)) {
  962. SPCR1.setSCK(pin);
  963. }
  964. // return true if "pin" has special chip select capability
  965. static bool pinIsChipSelect(uint8_t pin) { return (pin == 6); }
  966. // return true if both pin1 and pin2 have independent chip select capability
  967. static bool pinIsChipSelect(uint8_t pin1, uint8_t pin2) { return false; }
  968. // configure a pin for chip select and return its SPI_MCR_PCSIS bitmask
  969. static uint8_t setCS(uint8_t pin);
  970. private:
  971. static uint32_t interruptMask;
  972. static uint32_t interruptSave;
  973. #ifdef SPI_TRANSACTION_MISMATCH_LED
  974. static uint8_t inTransactionFlag;
  975. #endif
  976. };
  977. /**********************************************************/
  978. /* 32 bit Arduino Due */
  979. /**********************************************************/
  980. #elif defined(__arm__) && defined(__SAM3X8E__)
  981. #undef SPI_MODE0
  982. #undef SPI_MODE1
  983. #undef SPI_MODE2
  984. #undef SPI_MODE3
  985. #define SPI_MODE0 0x02
  986. #define SPI_MODE1 0x00
  987. #define SPI_MODE2 0x03
  988. #define SPI_MODE3 0x01
  989. #undef SPI_CLOCK_DIV2
  990. #undef SPI_CLOCK_DIV4
  991. #undef SPI_CLOCK_DIV8
  992. #undef SPI_CLOCK_DIV16
  993. #undef SPI_CLOCK_DIV32
  994. #undef SPI_CLOCK_DIV64
  995. #undef SPI_CLOCK_DIV128
  996. #define SPI_CLOCK_DIV2 11
  997. #define SPI_CLOCK_DIV4 21
  998. #define SPI_CLOCK_DIV8 42
  999. #define SPI_CLOCK_DIV16 84
  1000. #define SPI_CLOCK_DIV32 168
  1001. #define SPI_CLOCK_DIV64 255
  1002. #define SPI_CLOCK_DIV128 255
  1003. enum SPITransferMode {
  1004. SPI_CONTINUE,
  1005. SPI_LAST
  1006. };
  1007. class SPISettings {
  1008. public:
  1009. SPISettings(uint32_t clock, BitOrder bitOrder, uint8_t dataMode) {
  1010. if (__builtin_constant_p(clock)) {
  1011. init_AlwaysInline(clock, bitOrder, dataMode);
  1012. } else {
  1013. init_MightInline(clock, bitOrder, dataMode);
  1014. }
  1015. }
  1016. SPISettings() {
  1017. init_AlwaysInline(4000000, MSBFIRST, SPI_MODE0);
  1018. }
  1019. private:
  1020. void init_MightInline(uint32_t clock, BitOrder bitOrder, uint8_t dataMode) {
  1021. init_AlwaysInline(clock, bitOrder, dataMode);
  1022. }
  1023. void init_AlwaysInline(uint32_t clock, BitOrder bitOrder, uint8_t dataMode)
  1024. __attribute__((__always_inline__)) {
  1025. uint8_t div;
  1026. border = bitOrder;
  1027. if (__builtin_constant_p(clock)) {
  1028. if (clock >= F_CPU / 2) div = 2;
  1029. else if (clock >= F_CPU / 3) div = 3;
  1030. else if (clock >= F_CPU / 4) div = 4;
  1031. else if (clock >= F_CPU / 5) div = 5;
  1032. else if (clock >= F_CPU / 6) div = 6;
  1033. else if (clock >= F_CPU / 7) div = 7;
  1034. else if (clock >= F_CPU / 8) div = 8;
  1035. else if (clock >= F_CPU / 9) div = 9;
  1036. else if (clock >= F_CPU / 10) div = 10;
  1037. else if (clock >= F_CPU / 11) div = 11;
  1038. else if (clock >= F_CPU / 12) div = 12;
  1039. else if (clock >= F_CPU / 13) div = 13;
  1040. else if (clock >= F_CPU / 14) div = 14;
  1041. else if (clock >= F_CPU / 15) div = 15;
  1042. else if (clock >= F_CPU / 16) div = 16;
  1043. else if (clock >= F_CPU / 17) div = 17;
  1044. else if (clock >= F_CPU / 18) div = 18;
  1045. else if (clock >= F_CPU / 19) div = 19;
  1046. else if (clock >= F_CPU / 20) div = 20;
  1047. else if (clock >= F_CPU / 21) div = 21;
  1048. else if (clock >= F_CPU / 22) div = 22;
  1049. else if (clock >= F_CPU / 23) div = 23;
  1050. else if (clock >= F_CPU / 24) div = 24;
  1051. else if (clock >= F_CPU / 25) div = 25;
  1052. else if (clock >= F_CPU / 26) div = 26;
  1053. else if (clock >= F_CPU / 27) div = 27;
  1054. else if (clock >= F_CPU / 28) div = 28;
  1055. else if (clock >= F_CPU / 29) div = 29;
  1056. else if (clock >= F_CPU / 30) div = 30;
  1057. else if (clock >= F_CPU / 31) div = 31;
  1058. else if (clock >= F_CPU / 32) div = 32;
  1059. else if (clock >= F_CPU / 33) div = 33;
  1060. else if (clock >= F_CPU / 34) div = 34;
  1061. else if (clock >= F_CPU / 35) div = 35;
  1062. else if (clock >= F_CPU / 36) div = 36;
  1063. else if (clock >= F_CPU / 37) div = 37;
  1064. else if (clock >= F_CPU / 38) div = 38;
  1065. else if (clock >= F_CPU / 39) div = 39;
  1066. else if (clock >= F_CPU / 40) div = 40;
  1067. else if (clock >= F_CPU / 41) div = 41;
  1068. else if (clock >= F_CPU / 42) div = 42;
  1069. else if (clock >= F_CPU / 43) div = 43;
  1070. else if (clock >= F_CPU / 44) div = 44;
  1071. else if (clock >= F_CPU / 45) div = 45;
  1072. else if (clock >= F_CPU / 46) div = 46;
  1073. else if (clock >= F_CPU / 47) div = 47;
  1074. else if (clock >= F_CPU / 48) div = 48;
  1075. else if (clock >= F_CPU / 49) div = 49;
  1076. else if (clock >= F_CPU / 50) div = 50;
  1077. else if (clock >= F_CPU / 51) div = 51;
  1078. else if (clock >= F_CPU / 52) div = 52;
  1079. else if (clock >= F_CPU / 53) div = 53;
  1080. else if (clock >= F_CPU / 54) div = 54;
  1081. else if (clock >= F_CPU / 55) div = 55;
  1082. else if (clock >= F_CPU / 56) div = 56;
  1083. else if (clock >= F_CPU / 57) div = 57;
  1084. else if (clock >= F_CPU / 58) div = 58;
  1085. else if (clock >= F_CPU / 59) div = 59;
  1086. else if (clock >= F_CPU / 60) div = 60;
  1087. else if (clock >= F_CPU / 61) div = 61;
  1088. else if (clock >= F_CPU / 62) div = 62;
  1089. else if (clock >= F_CPU / 63) div = 63;
  1090. else if (clock >= F_CPU / 64) div = 64;
  1091. else if (clock >= F_CPU / 65) div = 65;
  1092. else if (clock >= F_CPU / 66) div = 66;
  1093. else if (clock >= F_CPU / 67) div = 67;
  1094. else if (clock >= F_CPU / 68) div = 68;
  1095. else if (clock >= F_CPU / 69) div = 69;
  1096. else if (clock >= F_CPU / 70) div = 70;
  1097. else if (clock >= F_CPU / 71) div = 71;
  1098. else if (clock >= F_CPU / 72) div = 72;
  1099. else if (clock >= F_CPU / 73) div = 73;
  1100. else if (clock >= F_CPU / 74) div = 74;
  1101. else if (clock >= F_CPU / 75) div = 75;
  1102. else if (clock >= F_CPU / 76) div = 76;
  1103. else if (clock >= F_CPU / 77) div = 77;
  1104. else if (clock >= F_CPU / 78) div = 78;
  1105. else if (clock >= F_CPU / 79) div = 79;
  1106. else if (clock >= F_CPU / 80) div = 80;
  1107. else if (clock >= F_CPU / 81) div = 81;
  1108. else if (clock >= F_CPU / 82) div = 82;
  1109. else if (clock >= F_CPU / 83) div = 83;
  1110. else if (clock >= F_CPU / 84) div = 84;
  1111. else if (clock >= F_CPU / 85) div = 85;
  1112. else if (clock >= F_CPU / 86) div = 86;
  1113. else if (clock >= F_CPU / 87) div = 87;
  1114. else if (clock >= F_CPU / 88) div = 88;
  1115. else if (clock >= F_CPU / 89) div = 89;
  1116. else if (clock >= F_CPU / 90) div = 90;
  1117. else if (clock >= F_CPU / 91) div = 91;
  1118. else if (clock >= F_CPU / 92) div = 92;
  1119. else if (clock >= F_CPU / 93) div = 93;
  1120. else if (clock >= F_CPU / 94) div = 94;
  1121. else if (clock >= F_CPU / 95) div = 95;
  1122. else if (clock >= F_CPU / 96) div = 96;
  1123. else if (clock >= F_CPU / 97) div = 97;
  1124. else if (clock >= F_CPU / 98) div = 98;
  1125. else if (clock >= F_CPU / 99) div = 99;
  1126. else if (clock >= F_CPU / 100) div = 100;
  1127. else if (clock >= F_CPU / 101) div = 101;
  1128. else if (clock >= F_CPU / 102) div = 102;
  1129. else if (clock >= F_CPU / 103) div = 103;
  1130. else if (clock >= F_CPU / 104) div = 104;
  1131. else if (clock >= F_CPU / 105) div = 105;
  1132. else if (clock >= F_CPU / 106) div = 106;
  1133. else if (clock >= F_CPU / 107) div = 107;
  1134. else if (clock >= F_CPU / 108) div = 108;
  1135. else if (clock >= F_CPU / 109) div = 109;
  1136. else if (clock >= F_CPU / 110) div = 110;
  1137. else if (clock >= F_CPU / 111) div = 111;
  1138. else if (clock >= F_CPU / 112) div = 112;
  1139. else if (clock >= F_CPU / 113) div = 113;
  1140. else if (clock >= F_CPU / 114) div = 114;
  1141. else if (clock >= F_CPU / 115) div = 115;
  1142. else if (clock >= F_CPU / 116) div = 116;
  1143. else if (clock >= F_CPU / 117) div = 117;
  1144. else if (clock >= F_CPU / 118) div = 118;
  1145. else if (clock >= F_CPU / 119) div = 119;
  1146. else if (clock >= F_CPU / 120) div = 120;
  1147. else if (clock >= F_CPU / 121) div = 121;
  1148. else if (clock >= F_CPU / 122) div = 122;
  1149. else if (clock >= F_CPU / 123) div = 123;
  1150. else if (clock >= F_CPU / 124) div = 124;
  1151. else if (clock >= F_CPU / 125) div = 125;
  1152. else if (clock >= F_CPU / 126) div = 126;
  1153. else if (clock >= F_CPU / 127) div = 127;
  1154. else if (clock >= F_CPU / 128) div = 128;
  1155. else if (clock >= F_CPU / 129) div = 129;
  1156. else if (clock >= F_CPU / 130) div = 130;
  1157. else if (clock >= F_CPU / 131) div = 131;
  1158. else if (clock >= F_CPU / 132) div = 132;
  1159. else if (clock >= F_CPU / 133) div = 133;
  1160. else if (clock >= F_CPU / 134) div = 134;
  1161. else if (clock >= F_CPU / 135) div = 135;
  1162. else if (clock >= F_CPU / 136) div = 136;
  1163. else if (clock >= F_CPU / 137) div = 137;
  1164. else if (clock >= F_CPU / 138) div = 138;
  1165. else if (clock >= F_CPU / 139) div = 139;
  1166. else if (clock >= F_CPU / 140) div = 140;
  1167. else if (clock >= F_CPU / 141) div = 141;
  1168. else if (clock >= F_CPU / 142) div = 142;
  1169. else if (clock >= F_CPU / 143) div = 143;
  1170. else if (clock >= F_CPU / 144) div = 144;
  1171. else if (clock >= F_CPU / 145) div = 145;
  1172. else if (clock >= F_CPU / 146) div = 146;
  1173. else if (clock >= F_CPU / 147) div = 147;
  1174. else if (clock >= F_CPU / 148) div = 148;
  1175. else if (clock >= F_CPU / 149) div = 149;
  1176. else if (clock >= F_CPU / 150) div = 150;
  1177. else if (clock >= F_CPU / 151) div = 151;
  1178. else if (clock >= F_CPU / 152) div = 152;
  1179. else if (clock >= F_CPU / 153) div = 153;
  1180. else if (clock >= F_CPU / 154) div = 154;
  1181. else if (clock >= F_CPU / 155) div = 155;
  1182. else if (clock >= F_CPU / 156) div = 156;
  1183. else if (clock >= F_CPU / 157) div = 157;
  1184. else if (clock >= F_CPU / 158) div = 158;
  1185. else if (clock >= F_CPU / 159) div = 159;
  1186. else if (clock >= F_CPU / 160) div = 160;
  1187. else if (clock >= F_CPU / 161) div = 161;
  1188. else if (clock >= F_CPU / 162) div = 162;
  1189. else if (clock >= F_CPU / 163) div = 163;
  1190. else if (clock >= F_CPU / 164) div = 164;
  1191. else if (clock >= F_CPU / 165) div = 165;
  1192. else if (clock >= F_CPU / 166) div = 166;
  1193. else if (clock >= F_CPU / 167) div = 167;
  1194. else if (clock >= F_CPU / 168) div = 168;
  1195. else if (clock >= F_CPU / 169) div = 169;
  1196. else if (clock >= F_CPU / 170) div = 170;
  1197. else if (clock >= F_CPU / 171) div = 171;
  1198. else if (clock >= F_CPU / 172) div = 172;
  1199. else if (clock >= F_CPU / 173) div = 173;
  1200. else if (clock >= F_CPU / 174) div = 174;
  1201. else if (clock >= F_CPU / 175) div = 175;
  1202. else if (clock >= F_CPU / 176) div = 176;
  1203. else if (clock >= F_CPU / 177) div = 177;
  1204. else if (clock >= F_CPU / 178) div = 178;
  1205. else if (clock >= F_CPU / 179) div = 179;
  1206. else if (clock >= F_CPU / 180) div = 180;
  1207. else if (clock >= F_CPU / 181) div = 181;
  1208. else if (clock >= F_CPU / 182) div = 182;
  1209. else if (clock >= F_CPU / 183) div = 183;
  1210. else if (clock >= F_CPU / 184) div = 184;
  1211. else if (clock >= F_CPU / 185) div = 185;
  1212. else if (clock >= F_CPU / 186) div = 186;
  1213. else if (clock >= F_CPU / 187) div = 187;
  1214. else if (clock >= F_CPU / 188) div = 188;
  1215. else if (clock >= F_CPU / 189) div = 189;
  1216. else if (clock >= F_CPU / 190) div = 190;
  1217. else if (clock >= F_CPU / 191) div = 191;
  1218. else if (clock >= F_CPU / 192) div = 192;
  1219. else if (clock >= F_CPU / 193) div = 193;
  1220. else if (clock >= F_CPU / 194) div = 194;
  1221. else if (clock >= F_CPU / 195) div = 195;
  1222. else if (clock >= F_CPU / 196) div = 196;
  1223. else if (clock >= F_CPU / 197) div = 197;
  1224. else if (clock >= F_CPU / 198) div = 198;
  1225. else if (clock >= F_CPU / 199) div = 199;
  1226. else if (clock >= F_CPU / 200) div = 200;
  1227. else if (clock >= F_CPU / 201) div = 201;
  1228. else if (clock >= F_CPU / 202) div = 202;
  1229. else if (clock >= F_CPU / 203) div = 203;
  1230. else if (clock >= F_CPU / 204) div = 204;
  1231. else if (clock >= F_CPU / 205) div = 205;
  1232. else if (clock >= F_CPU / 206) div = 206;
  1233. else if (clock >= F_CPU / 207) div = 207;
  1234. else if (clock >= F_CPU / 208) div = 208;
  1235. else if (clock >= F_CPU / 209) div = 209;
  1236. else if (clock >= F_CPU / 210) div = 210;
  1237. else if (clock >= F_CPU / 211) div = 211;
  1238. else if (clock >= F_CPU / 212) div = 212;
  1239. else if (clock >= F_CPU / 213) div = 213;
  1240. else if (clock >= F_CPU / 214) div = 214;
  1241. else if (clock >= F_CPU / 215) div = 215;
  1242. else if (clock >= F_CPU / 216) div = 216;
  1243. else if (clock >= F_CPU / 217) div = 217;
  1244. else if (clock >= F_CPU / 218) div = 218;
  1245. else if (clock >= F_CPU / 219) div = 219;
  1246. else if (clock >= F_CPU / 220) div = 220;
  1247. else if (clock >= F_CPU / 221) div = 221;
  1248. else if (clock >= F_CPU / 222) div = 222;
  1249. else if (clock >= F_CPU / 223) div = 223;
  1250. else if (clock >= F_CPU / 224) div = 224;
  1251. else if (clock >= F_CPU / 225) div = 225;
  1252. else if (clock >= F_CPU / 226) div = 226;
  1253. else if (clock >= F_CPU / 227) div = 227;
  1254. else if (clock >= F_CPU / 228) div = 228;
  1255. else if (clock >= F_CPU / 229) div = 229;
  1256. else if (clock >= F_CPU / 230) div = 230;
  1257. else if (clock >= F_CPU / 231) div = 231;
  1258. else if (clock >= F_CPU / 232) div = 232;
  1259. else if (clock >= F_CPU / 233) div = 233;
  1260. else if (clock >= F_CPU / 234) div = 234;
  1261. else if (clock >= F_CPU / 235) div = 235;
  1262. else if (clock >= F_CPU / 236) div = 236;
  1263. else if (clock >= F_CPU / 237) div = 237;
  1264. else if (clock >= F_CPU / 238) div = 238;
  1265. else if (clock >= F_CPU / 239) div = 239;
  1266. else if (clock >= F_CPU / 240) div = 240;
  1267. else if (clock >= F_CPU / 241) div = 241;
  1268. else if (clock >= F_CPU / 242) div = 242;
  1269. else if (clock >= F_CPU / 243) div = 243;
  1270. else if (clock >= F_CPU / 244) div = 244;
  1271. else if (clock >= F_CPU / 245) div = 245;
  1272. else if (clock >= F_CPU / 246) div = 246;
  1273. else if (clock >= F_CPU / 247) div = 247;
  1274. else if (clock >= F_CPU / 248) div = 248;
  1275. else if (clock >= F_CPU / 249) div = 249;
  1276. else if (clock >= F_CPU / 250) div = 250;
  1277. else if (clock >= F_CPU / 251) div = 251;
  1278. else if (clock >= F_CPU / 252) div = 252;
  1279. else if (clock >= F_CPU / 253) div = 253;
  1280. else if (clock >= F_CPU / 254) div = 254;
  1281. else /* clock >= F_CPU / 255 */ div = 255;
  1282. /*
  1283. #! /usr/bin/perl
  1284. for ($i=2; $i<256; $i++) {
  1285. printf "\t\t\telse if (clock >= F_CPU / %3d) div = %3d;\n", $i, $i;
  1286. }
  1287. */
  1288. } else {
  1289. for (div=2; div<255; div++) {
  1290. if (clock >= F_CPU / div) break;
  1291. }
  1292. }
  1293. config = (dataMode & 3) | SPI_CSR_CSAAT | SPI_CSR_SCBR(div) | SPI_CSR_DLYBCT(1);
  1294. }
  1295. uint32_t config;
  1296. BitOrder border;
  1297. friend class SPIClass;
  1298. };
  1299. class SPIClass {
  1300. public:
  1301. SPIClass(Spi *_spi, uint32_t _id, void(*_initCb)(void));
  1302. byte transfer(uint8_t _data, SPITransferMode _mode = SPI_LAST) { return transfer(BOARD_SPI_DEFAULT_SS, _data, _mode); }
  1303. byte transfer(byte _channel, uint8_t _data, SPITransferMode _mode = SPI_LAST);
  1304. // Transaction Functions
  1305. void usingInterrupt(uint8_t interruptNumber);
  1306. void beginTransaction(uint8_t pin, SPISettings settings);
  1307. void beginTransaction(SPISettings settings) {
  1308. beginTransaction(BOARD_SPI_DEFAULT_SS, settings);
  1309. }
  1310. void endTransaction(void);
  1311. // SPI Configuration methods
  1312. void attachInterrupt(void);
  1313. void detachInterrupt(void);
  1314. void begin(void);
  1315. void end(void);
  1316. // Attach/Detach pin to/from SPI controller
  1317. void begin(uint8_t _pin);
  1318. void end(uint8_t _pin);
  1319. // These methods sets a parameter on a single pin
  1320. void setBitOrder(uint8_t _pin, BitOrder);
  1321. void setDataMode(uint8_t _pin, uint8_t);
  1322. void setClockDivider(uint8_t _pin, uint8_t);
  1323. // These methods sets the same parameters but on default pin BOARD_SPI_DEFAULT_SS
  1324. void setBitOrder(BitOrder _order) { setBitOrder(BOARD_SPI_DEFAULT_SS, _order); };
  1325. void setDataMode(uint8_t _mode) { setDataMode(BOARD_SPI_DEFAULT_SS, _mode); };
  1326. void setClockDivider(uint8_t _div) { setClockDivider(BOARD_SPI_DEFAULT_SS, _div); };
  1327. private:
  1328. void init();
  1329. Spi *spi;
  1330. uint32_t id;
  1331. BitOrder bitOrder[SPI_CHANNELS_NUM];
  1332. uint32_t divider[SPI_CHANNELS_NUM];
  1333. uint32_t mode[SPI_CHANNELS_NUM];
  1334. void (*initCb)(void);
  1335. bool initialized;
  1336. uint8_t interruptMode; // 0=none, 1=mask, 2=global
  1337. uint8_t interruptMask; // bits 0:3=pin change
  1338. uint8_t interruptSave; // temp storage, to restore state
  1339. };
  1340. #endif
  1341. extern SPIClass SPI;
  1342. #if defined(__arm__) && defined(TEENSYDUINO) && defined(KINETISL)
  1343. extern SPI1Class SPI1;
  1344. #endif
  1345. #endif