Nie możesz wybrać więcej, niż 25 tematów Tematy muszą się zaczynać od litery lub cyfry, mogą zawierać myślniki ('-') i mogą mieć do 35 znaków.

1868 lines
64KB

  1. /*
  2. * Copyright (c) 2010 by Cristian Maglie <c.maglie@bug.st>
  3. * Copyright (c) 2014 by Paul Stoffregen <paul@pjrc.com> (Transaction API)
  4. * Copyright (c) 2014 by Matthijs Kooijman <matthijs@stdin.nl> (SPISettings AVR)
  5. * SPI Master library for arduino.
  6. *
  7. * This file is free software; you can redistribute it and/or modify
  8. * it under the terms of either the GNU General Public License version 2
  9. * or the GNU Lesser General Public License version 2.1, both as
  10. * published by the Free Software Foundation.
  11. */
  12. #ifndef _SPI_H_INCLUDED
  13. #define _SPI_H_INCLUDED
  14. #include <Arduino.h>
  15. // SPI_HAS_TRANSACTION means SPI has beginTransaction(), endTransaction(),
  16. // usingInterrupt(), and SPISetting(clock, bitOrder, dataMode)
  17. #define SPI_HAS_TRANSACTION 1
  18. // Uncomment this line to add detection of mismatched begin/end transactions.
  19. // A mismatch occurs if other libraries fail to use SPI.endTransaction() for
  20. // each SPI.beginTransaction(). Connect a LED to this pin. The LED will turn
  21. // on if any mismatch is ever detected.
  22. //#define SPI_TRANSACTION_MISMATCH_LED 5
  23. #ifndef __SAM3X8E__
  24. #ifndef LSBFIRST
  25. #define LSBFIRST 0
  26. #endif
  27. #ifndef MSBFIRST
  28. #define MSBFIRST 1
  29. #endif
  30. #endif
  31. #define SPI_MODE0 0x00
  32. #define SPI_MODE1 0x04
  33. #define SPI_MODE2 0x08
  34. #define SPI_MODE3 0x0C
  35. #define SPI_CLOCK_DIV4 0x00
  36. #define SPI_CLOCK_DIV16 0x01
  37. #define SPI_CLOCK_DIV64 0x02
  38. #define SPI_CLOCK_DIV128 0x03
  39. #define SPI_CLOCK_DIV2 0x04
  40. #define SPI_CLOCK_DIV8 0x05
  41. #define SPI_CLOCK_DIV32 0x06
  42. #define SPI_MODE_MASK 0x0C // CPOL = bit 3, CPHA = bit 2 on SPCR
  43. #define SPI_CLOCK_MASK 0x03 // SPR1 = bit 1, SPR0 = bit 0 on SPCR
  44. #define SPI_2XCLOCK_MASK 0x01 // SPI2X = bit 0 on SPSR
  45. /**********************************************************/
  46. /* 8 bit AVR-based boards */
  47. /**********************************************************/
  48. #if defined(__AVR__)
  49. // define SPI_AVR_EIMSK for AVR boards with external interrupt pins
  50. #if defined(EIMSK)
  51. #define SPI_AVR_EIMSK EIMSK
  52. #elif defined(GICR)
  53. #define SPI_AVR_EIMSK GICR
  54. #elif defined(GIMSK)
  55. #define SPI_AVR_EIMSK GIMSK
  56. #endif
  57. class SPISettings {
  58. public:
  59. SPISettings(uint32_t clock, uint8_t bitOrder, uint8_t dataMode) {
  60. if (__builtin_constant_p(clock)) {
  61. init_AlwaysInline(clock, bitOrder, dataMode);
  62. } else {
  63. init_MightInline(clock, bitOrder, dataMode);
  64. }
  65. }
  66. SPISettings() {
  67. init_AlwaysInline(4000000, MSBFIRST, SPI_MODE0);
  68. }
  69. private:
  70. void init_MightInline(uint32_t clock, uint8_t bitOrder, uint8_t dataMode) {
  71. init_AlwaysInline(clock, bitOrder, dataMode);
  72. }
  73. void init_AlwaysInline(uint32_t clock, uint8_t bitOrder, uint8_t dataMode)
  74. __attribute__((__always_inline__)) {
  75. // Clock settings are defined as follows. Note that this shows SPI2X
  76. // inverted, so the bits form increasing numbers. Also note that
  77. // fosc/64 appears twice
  78. // SPR1 SPR0 ~SPI2X Freq
  79. // 0 0 0 fosc/2
  80. // 0 0 1 fosc/4
  81. // 0 1 0 fosc/8
  82. // 0 1 1 fosc/16
  83. // 1 0 0 fosc/32
  84. // 1 0 1 fosc/64
  85. // 1 1 0 fosc/64
  86. // 1 1 1 fosc/128
  87. // We find the fastest clock that is less than or equal to the
  88. // given clock rate. The clock divider that results in clock_setting
  89. // is 2 ^^ (clock_div + 1). If nothing is slow enough, we'll use the
  90. // slowest (128 == 2 ^^ 7, so clock_div = 6).
  91. uint8_t clockDiv;
  92. // When the clock is known at compiletime, use this if-then-else
  93. // cascade, which the compiler knows how to completely optimize
  94. // away. When clock is not known, use a loop instead, which generates
  95. // shorter code.
  96. if (__builtin_constant_p(clock)) {
  97. if (clock >= F_CPU / 2) {
  98. clockDiv = 0;
  99. } else if (clock >= F_CPU / 4) {
  100. clockDiv = 1;
  101. } else if (clock >= F_CPU / 8) {
  102. clockDiv = 2;
  103. } else if (clock >= F_CPU / 16) {
  104. clockDiv = 3;
  105. } else if (clock >= F_CPU / 32) {
  106. clockDiv = 4;
  107. } else if (clock >= F_CPU / 64) {
  108. clockDiv = 5;
  109. } else {
  110. clockDiv = 6;
  111. }
  112. } else {
  113. uint32_t clockSetting = F_CPU / 2;
  114. clockDiv = 0;
  115. while (clockDiv < 6 && clock < clockSetting) {
  116. clockSetting /= 2;
  117. clockDiv++;
  118. }
  119. }
  120. // Compensate for the duplicate fosc/64
  121. if (clockDiv == 6)
  122. clockDiv = 7;
  123. // Invert the SPI2X bit
  124. clockDiv ^= 0x1;
  125. // Pack into the SPISettings class
  126. spcr = _BV(SPE) | _BV(MSTR) | ((bitOrder == LSBFIRST) ? _BV(DORD) : 0) |
  127. (dataMode & SPI_MODE_MASK) | ((clockDiv >> 1) & SPI_CLOCK_MASK);
  128. spsr = clockDiv & SPI_2XCLOCK_MASK;
  129. }
  130. uint8_t spcr;
  131. uint8_t spsr;
  132. friend class SPIClass;
  133. };
  134. class SPIClass {
  135. public:
  136. // Initialize the SPI library
  137. static void begin();
  138. // If SPI is used from within an interrupt, this function registers
  139. // that interrupt with the SPI library, so beginTransaction() can
  140. // prevent conflicts. The input interruptNumber is the number used
  141. // with attachInterrupt. If SPI is used from a different interrupt
  142. // (eg, a timer), interruptNumber should be 255.
  143. static void usingInterrupt(uint8_t interruptNumber);
  144. // Before using SPI.transfer() or asserting chip select pins,
  145. // this function is used to gain exclusive access to the SPI bus
  146. // and configure the correct settings.
  147. inline static void beginTransaction(SPISettings settings) {
  148. if (interruptMode > 0) {
  149. #ifdef SPI_AVR_EIMSK
  150. if (interruptMode == 1) {
  151. interruptSave = SPI_AVR_EIMSK;
  152. SPI_AVR_EIMSK &= ~interruptMask;
  153. } else
  154. #endif
  155. {
  156. uint8_t tmp = SREG;
  157. cli();
  158. interruptSave = tmp;
  159. }
  160. }
  161. #ifdef SPI_TRANSACTION_MISMATCH_LED
  162. if (inTransactionFlag) {
  163. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  164. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  165. }
  166. inTransactionFlag = 1;
  167. #endif
  168. SPCR = settings.spcr;
  169. SPSR = settings.spsr;
  170. }
  171. // Write to the SPI bus (MOSI pin) and also receive (MISO pin)
  172. inline static uint8_t transfer(uint8_t data) {
  173. SPDR = data;
  174. asm volatile("nop");
  175. while (!(SPSR & _BV(SPIF))) ; // wait
  176. return SPDR;
  177. }
  178. inline static uint16_t transfer16(uint16_t data) {
  179. union { uint16_t val; struct { uint8_t lsb; uint8_t msb; }; } in, out;
  180. in.val = data;
  181. if ((SPCR & _BV(DORD))) {
  182. SPDR = in.lsb;
  183. asm volatile("nop");
  184. while (!(SPSR & _BV(SPIF))) ;
  185. out.lsb = SPDR;
  186. SPDR = in.msb;
  187. asm volatile("nop");
  188. while (!(SPSR & _BV(SPIF))) ;
  189. out.msb = SPDR;
  190. } else {
  191. SPDR = in.msb;
  192. asm volatile("nop");
  193. while (!(SPSR & _BV(SPIF))) ;
  194. out.msb = SPDR;
  195. SPDR = in.lsb;
  196. asm volatile("nop");
  197. while (!(SPSR & _BV(SPIF))) ;
  198. out.lsb = SPDR;
  199. }
  200. return out.val;
  201. }
  202. inline static void transfer(void *buf, size_t count) {
  203. if (count == 0) return;
  204. uint8_t *p = (uint8_t *)buf;
  205. SPDR = *p;
  206. while (--count > 0) {
  207. uint8_t out = *(p + 1);
  208. while (!(SPSR & _BV(SPIF))) ;
  209. uint8_t in = SPDR;
  210. SPDR = out;
  211. *p++ = in;
  212. }
  213. while (!(SPSR & _BV(SPIF))) ;
  214. *p = SPDR;
  215. }
  216. // After performing a group of transfers and releasing the chip select
  217. // signal, this function allows others to access the SPI bus
  218. inline static void endTransaction(void) {
  219. #ifdef SPI_TRANSACTION_MISMATCH_LED
  220. if (!inTransactionFlag) {
  221. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  222. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  223. }
  224. inTransactionFlag = 0;
  225. #endif
  226. if (interruptMode > 0) {
  227. #ifdef SPI_AVR_EIMSK
  228. if (interruptMode == 1) {
  229. SPI_AVR_EIMSK = interruptSave;
  230. } else
  231. #endif
  232. {
  233. SREG = interruptSave;
  234. }
  235. }
  236. }
  237. // Disable the SPI bus
  238. static void end();
  239. // This function is deprecated. New applications should use
  240. // beginTransaction() to configure SPI settings.
  241. inline static void setBitOrder(uint8_t bitOrder) {
  242. if (bitOrder == LSBFIRST) SPCR |= _BV(DORD);
  243. else SPCR &= ~(_BV(DORD));
  244. }
  245. // This function is deprecated. New applications should use
  246. // beginTransaction() to configure SPI settings.
  247. inline static void setDataMode(uint8_t dataMode) {
  248. SPCR = (SPCR & ~SPI_MODE_MASK) | dataMode;
  249. }
  250. // This function is deprecated. New applications should use
  251. // beginTransaction() to configure SPI settings.
  252. inline static void setClockDivider(uint8_t clockDiv) {
  253. SPCR = (SPCR & ~SPI_CLOCK_MASK) | (clockDiv & SPI_CLOCK_MASK);
  254. SPSR = (SPSR & ~SPI_2XCLOCK_MASK) | ((clockDiv >> 2) & SPI_2XCLOCK_MASK);
  255. }
  256. // These undocumented functions should not be used. SPI.transfer()
  257. // polls the hardware flag which is automatically cleared as the
  258. // AVR responds to SPI's interrupt
  259. inline static void attachInterrupt() { SPCR |= _BV(SPIE); }
  260. inline static void detachInterrupt() { SPCR &= ~_BV(SPIE); }
  261. private:
  262. static uint8_t interruptMode; // 0=none, 1=mask, 2=global
  263. static uint8_t interruptMask; // which interrupts to mask
  264. static uint8_t interruptSave; // temp storage, to restore state
  265. #ifdef SPI_TRANSACTION_MISMATCH_LED
  266. static uint8_t inTransactionFlag;
  267. #endif
  268. };
  269. /**********************************************************/
  270. /* 32 bit Teensy 3.0 and 3.1 */
  271. /**********************************************************/
  272. #elif defined(__arm__) && defined(TEENSYDUINO) && defined(KINETISK)
  273. #define SPI_HAS_NOTUSINGINTERRUPT 1
  274. class SPISettings {
  275. public:
  276. SPISettings(uint32_t clock, uint8_t bitOrder, uint8_t dataMode) {
  277. if (__builtin_constant_p(clock)) {
  278. init_AlwaysInline(clock, bitOrder, dataMode);
  279. } else {
  280. init_MightInline(clock, bitOrder, dataMode);
  281. }
  282. }
  283. SPISettings() {
  284. init_AlwaysInline(4000000, MSBFIRST, SPI_MODE0);
  285. }
  286. private:
  287. void init_MightInline(uint32_t clock, uint8_t bitOrder, uint8_t dataMode) {
  288. init_AlwaysInline(clock, bitOrder, dataMode);
  289. }
  290. void init_AlwaysInline(uint32_t clock, uint8_t bitOrder, uint8_t dataMode)
  291. __attribute__((__always_inline__)) {
  292. uint32_t t, c = SPI_CTAR_FMSZ(7);
  293. if (bitOrder == LSBFIRST) c |= SPI_CTAR_LSBFE;
  294. if (__builtin_constant_p(clock)) {
  295. if (clock >= F_BUS / 2) {
  296. t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(0) | SPI_CTAR_DBR
  297. | SPI_CTAR_CSSCK(0);
  298. } else if (clock >= F_BUS / 3) {
  299. t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(0) | SPI_CTAR_DBR
  300. | SPI_CTAR_CSSCK(0);
  301. } else if (clock >= F_BUS / 4) {
  302. t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(0) | SPI_CTAR_CSSCK(0);
  303. } else if (clock >= F_BUS / 5) {
  304. t = SPI_CTAR_PBR(2) | SPI_CTAR_BR(0) | SPI_CTAR_DBR
  305. | SPI_CTAR_CSSCK(0);
  306. } else if (clock >= F_BUS / 6) {
  307. t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(0) | SPI_CTAR_CSSCK(0);
  308. } else if (clock >= F_BUS / 8) {
  309. t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(1) | SPI_CTAR_CSSCK(1);
  310. } else if (clock >= F_BUS / 10) {
  311. t = SPI_CTAR_PBR(2) | SPI_CTAR_BR(0) | SPI_CTAR_CSSCK(0);
  312. } else if (clock >= F_BUS / 12) {
  313. t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(1) | SPI_CTAR_CSSCK(1);
  314. } else if (clock >= F_BUS / 16) {
  315. t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(3) | SPI_CTAR_CSSCK(2);
  316. } else if (clock >= F_BUS / 20) {
  317. t = SPI_CTAR_PBR(2) | SPI_CTAR_BR(1) | SPI_CTAR_CSSCK(0);
  318. } else if (clock >= F_BUS / 24) {
  319. t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(3) | SPI_CTAR_CSSCK(2);
  320. } else if (clock >= F_BUS / 32) {
  321. t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(4) | SPI_CTAR_CSSCK(3);
  322. } else if (clock >= F_BUS / 40) {
  323. t = SPI_CTAR_PBR(2) | SPI_CTAR_BR(3) | SPI_CTAR_CSSCK(2);
  324. } else if (clock >= F_BUS / 56) {
  325. t = SPI_CTAR_PBR(3) | SPI_CTAR_BR(3) | SPI_CTAR_CSSCK(2);
  326. } else if (clock >= F_BUS / 64) {
  327. t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(5) | SPI_CTAR_CSSCK(4);
  328. } else if (clock >= F_BUS / 96) {
  329. t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(5) | SPI_CTAR_CSSCK(4);
  330. } else if (clock >= F_BUS / 128) {
  331. t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(6) | SPI_CTAR_CSSCK(5);
  332. } else if (clock >= F_BUS / 192) {
  333. t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(6) | SPI_CTAR_CSSCK(5);
  334. } else if (clock >= F_BUS / 256) {
  335. t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(7) | SPI_CTAR_CSSCK(6);
  336. } else if (clock >= F_BUS / 384) {
  337. t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(7) | SPI_CTAR_CSSCK(6);
  338. } else if (clock >= F_BUS / 512) {
  339. t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(8) | SPI_CTAR_CSSCK(7);
  340. } else if (clock >= F_BUS / 640) {
  341. t = SPI_CTAR_PBR(2) | SPI_CTAR_BR(7) | SPI_CTAR_CSSCK(6);
  342. } else { /* F_BUS / 768 */
  343. t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(8) | SPI_CTAR_CSSCK(7);
  344. }
  345. } else {
  346. for (uint32_t i=0; i<23; i++) {
  347. t = ctar_clock_table[i];
  348. if (clock >= F_BUS / ctar_div_table[i]) break;
  349. }
  350. }
  351. if (dataMode & 0x08) {
  352. c |= SPI_CTAR_CPOL;
  353. }
  354. if (dataMode & 0x04) {
  355. c |= SPI_CTAR_CPHA;
  356. t = (t & 0xFFFF0FFF) | ((t & 0xF000) >> 4);
  357. }
  358. ctar = c | t;
  359. }
  360. static const uint16_t ctar_div_table[23];
  361. static const uint32_t ctar_clock_table[23];
  362. uint32_t ctar;
  363. friend class SPIClass;
  364. #if defined(__MK64FX512__) || defined(__MK66FX1M0__)
  365. friend class SPI1Class;
  366. friend class SPI2Class;
  367. #endif
  368. };
  369. class SPIClass {
  370. public:
  371. // Initialize the SPI library
  372. static void begin();
  373. // If SPI is to used from within an interrupt, this function registers
  374. // that interrupt with the SPI library, so beginTransaction() can
  375. // prevent conflicts. The input interruptNumber is the number used
  376. // with attachInterrupt. If SPI is used from a different interrupt
  377. // (eg, a timer), interruptNumber should be 255.
  378. static void usingInterrupt(uint8_t n) {
  379. if (n == 3 || n == 4 || n == 24 || n == 33) {
  380. usingInterrupt(IRQ_PORTA);
  381. } else if (n == 0 || n == 1 || (n >= 16 && n <= 19) || n == 25 || n == 32) {
  382. usingInterrupt(IRQ_PORTB);
  383. } else if ((n >= 9 && n <= 13) || n == 15 || n == 22 || n == 23
  384. || (n >= 27 && n <= 30)) {
  385. usingInterrupt(IRQ_PORTC);
  386. } else if (n == 2 || (n >= 5 && n <= 8) || n == 14 || n == 20 || n == 21) {
  387. usingInterrupt(IRQ_PORTD);
  388. } else if (n == 26 || n == 31) {
  389. usingInterrupt(IRQ_PORTE);
  390. }
  391. }
  392. static void usingInterrupt(IRQ_NUMBER_t interruptName);
  393. static void notUsingInterrupt(IRQ_NUMBER_t interruptName);
  394. // Before using SPI.transfer() or asserting chip select pins,
  395. // this function is used to gain exclusive access to the SPI bus
  396. // and configure the correct settings.
  397. inline static void beginTransaction(SPISettings settings) {
  398. if (interruptMasksUsed) {
  399. __disable_irq();
  400. if (interruptMasksUsed & 0x01) {
  401. interruptSave[0] = NVIC_ICER0 & interruptMask[0];
  402. NVIC_ICER0 = interruptSave[0];
  403. }
  404. #if NVIC_NUM_INTERRUPTS > 32
  405. if (interruptMasksUsed & 0x02) {
  406. interruptSave[1] = NVIC_ICER1 & interruptMask[1];
  407. NVIC_ICER1 = interruptSave[1];
  408. }
  409. #endif
  410. #if NVIC_NUM_INTERRUPTS > 64 && defined(NVIC_ISER2)
  411. if (interruptMasksUsed & 0x04) {
  412. interruptSave[2] = NVIC_ICER2 & interruptMask[2];
  413. NVIC_ICER2 = interruptSave[2];
  414. }
  415. #endif
  416. #if NVIC_NUM_INTERRUPTS > 96 && defined(NVIC_ISER3)
  417. if (interruptMasksUsed & 0x08) {
  418. interruptSave[3] = NVIC_ICER3 & interruptMask[3];
  419. NVIC_ICER3 = interruptSave[3];
  420. }
  421. #endif
  422. __enable_irq();
  423. }
  424. #ifdef SPI_TRANSACTION_MISMATCH_LED
  425. if (inTransactionFlag) {
  426. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  427. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  428. }
  429. inTransactionFlag = 1;
  430. #endif
  431. if (SPI0_CTAR0 != settings.ctar) {
  432. SPI0_MCR = SPI_MCR_MDIS | SPI_MCR_HALT | SPI_MCR_PCSIS(0x1F);
  433. SPI0_CTAR0 = settings.ctar;
  434. SPI0_CTAR1 = settings.ctar| SPI_CTAR_FMSZ(8);
  435. SPI0_MCR = SPI_MCR_MSTR | SPI_MCR_PCSIS(0x1F);
  436. }
  437. }
  438. // Write to the SPI bus (MOSI pin) and also receive (MISO pin)
  439. inline static uint8_t transfer(uint8_t data) {
  440. SPI0_SR = SPI_SR_TCF;
  441. SPI0_PUSHR = data;
  442. while (!(SPI0_SR & SPI_SR_TCF)) ; // wait
  443. return SPI0_POPR;
  444. }
  445. inline static uint16_t transfer16(uint16_t data) {
  446. SPI0_SR = SPI_SR_TCF;
  447. SPI0_PUSHR = data | SPI_PUSHR_CTAS(1);
  448. while (!(SPI0_SR & SPI_SR_TCF)) ; // wait
  449. return SPI0_POPR;
  450. }
  451. inline static void transfer(void *buf, size_t count) {
  452. if (count == 0) return;
  453. uint8_t *p = (uint8_t *)buf;
  454. SPDR = *p;
  455. while (--count > 0) {
  456. uint8_t out = *(p + 1);
  457. while (!(SPSR & _BV(SPIF))) ;
  458. uint8_t in = SPDR;
  459. SPDR = out;
  460. *p++ = in;
  461. }
  462. while (!(SPSR & _BV(SPIF))) ;
  463. *p = SPDR;
  464. }
  465. // After performing a group of transfers and releasing the chip select
  466. // signal, this function allows others to access the SPI bus
  467. inline static void endTransaction(void) {
  468. #ifdef SPI_TRANSACTION_MISMATCH_LED
  469. if (!inTransactionFlag) {
  470. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  471. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  472. }
  473. inTransactionFlag = 0;
  474. #endif
  475. if (interruptMasksUsed) {
  476. if (interruptMasksUsed & 0x01) {
  477. NVIC_ISER0 = interruptSave[0];
  478. }
  479. #if NVIC_NUM_INTERRUPTS > 32
  480. if (interruptMasksUsed & 0x02) {
  481. NVIC_ISER1 = interruptSave[1];
  482. }
  483. #endif
  484. #if NVIC_NUM_INTERRUPTS > 64 && defined(NVIC_ISER2)
  485. if (interruptMasksUsed & 0x04) {
  486. NVIC_ISER2 = interruptSave[2];
  487. }
  488. #endif
  489. #if NVIC_NUM_INTERRUPTS > 96 && defined(NVIC_ISER3)
  490. if (interruptMasksUsed & 0x08) {
  491. NVIC_ISER3 = interruptSave[3];
  492. }
  493. #endif
  494. }
  495. }
  496. // Disable the SPI bus
  497. static void end();
  498. // This function is deprecated. New applications should use
  499. // beginTransaction() to configure SPI settings.
  500. static void setBitOrder(uint8_t bitOrder);
  501. // This function is deprecated. New applications should use
  502. // beginTransaction() to configure SPI settings.
  503. static void setDataMode(uint8_t dataMode);
  504. // This function is deprecated. New applications should use
  505. // beginTransaction() to configure SPI settings.
  506. inline static void setClockDivider(uint8_t clockDiv) {
  507. if (clockDiv == SPI_CLOCK_DIV2) {
  508. setClockDivider_noInline(SPISettings(12000000, MSBFIRST, SPI_MODE0).ctar);
  509. } else if (clockDiv == SPI_CLOCK_DIV4) {
  510. setClockDivider_noInline(SPISettings(4000000, MSBFIRST, SPI_MODE0).ctar);
  511. } else if (clockDiv == SPI_CLOCK_DIV8) {
  512. setClockDivider_noInline(SPISettings(2000000, MSBFIRST, SPI_MODE0).ctar);
  513. } else if (clockDiv == SPI_CLOCK_DIV16) {
  514. setClockDivider_noInline(SPISettings(1000000, MSBFIRST, SPI_MODE0).ctar);
  515. } else if (clockDiv == SPI_CLOCK_DIV32) {
  516. setClockDivider_noInline(SPISettings(500000, MSBFIRST, SPI_MODE0).ctar);
  517. } else if (clockDiv == SPI_CLOCK_DIV64) {
  518. setClockDivider_noInline(SPISettings(250000, MSBFIRST, SPI_MODE0).ctar);
  519. } else { /* clockDiv == SPI_CLOCK_DIV128 */
  520. setClockDivider_noInline(SPISettings(125000, MSBFIRST, SPI_MODE0).ctar);
  521. }
  522. }
  523. static void setClockDivider_noInline(uint32_t clk);
  524. // These undocumented functions should not be used. SPI.transfer()
  525. // polls the hardware flag which is automatically cleared as the
  526. // AVR responds to SPI's interrupt
  527. inline static void attachInterrupt() { }
  528. inline static void detachInterrupt() { }
  529. // Teensy 3.x can use alternate pins for these 3 SPI signals.
  530. inline static void setMOSI(uint8_t pin) __attribute__((always_inline)) {
  531. SPCR.setMOSI(pin);
  532. }
  533. inline static void setMISO(uint8_t pin) __attribute__((always_inline)) {
  534. SPCR.setMISO(pin);
  535. }
  536. inline static void setSCK(uint8_t pin) __attribute__((always_inline)) {
  537. SPCR.setSCK(pin);
  538. }
  539. // return true if "pin" has special chip select capability
  540. static uint8_t pinIsChipSelect(uint8_t pin);
  541. // return true if both pin1 and pin2 have independent chip select capability
  542. static bool pinIsChipSelect(uint8_t pin1, uint8_t pin2);
  543. // configure a pin for chip select and return its SPI_MCR_PCSIS bitmask
  544. static uint8_t setCS(uint8_t pin);
  545. private:
  546. static uint8_t interruptMasksUsed;
  547. static uint32_t interruptMask[(NVIC_NUM_INTERRUPTS+31)/32];
  548. static uint32_t interruptSave[(NVIC_NUM_INTERRUPTS+31)/32];
  549. #ifdef SPI_TRANSACTION_MISMATCH_LED
  550. static uint8_t inTransactionFlag;
  551. #endif
  552. };
  553. /**********************************************************/
  554. /* Teensy 3.5 and 3.6 have SPI1 as well */
  555. /**********************************************************/
  556. #if defined(__MK64FX512__) || defined(__MK66FX1M0__)
  557. class SPI1Class {
  558. public:
  559. // Initialize the SPI library
  560. static void begin();
  561. // If SPI is to used from within an interrupt, this function registers
  562. // that interrupt with the SPI library, so beginTransaction() can
  563. // prevent conflicts. The input interruptNumber is the number used
  564. // with attachInterrupt. If SPI is used from a different interrupt
  565. // (eg, a timer), interruptNumber should be 255.
  566. static void usingInterrupt(uint8_t n) {
  567. if (n == 3 || n == 4 || n == 24 || n == 33) {
  568. usingInterrupt(IRQ_PORTA);
  569. } else if (n == 0 || n == 1 || (n >= 16 && n <= 19) || n == 25 || n == 32) {
  570. usingInterrupt(IRQ_PORTB);
  571. } else if ((n >= 9 && n <= 13) || n == 15 || n == 22 || n == 23
  572. || (n >= 27 && n <= 30)) {
  573. usingInterrupt(IRQ_PORTC);
  574. } else if (n == 2 || (n >= 5 && n <= 8) || n == 14 || n == 20 || n == 21) {
  575. usingInterrupt(IRQ_PORTD);
  576. } else if (n == 26 || n == 31) {
  577. usingInterrupt(IRQ_PORTE);
  578. }
  579. }
  580. static void usingInterrupt(IRQ_NUMBER_t interruptName);
  581. static void notUsingInterrupt(IRQ_NUMBER_t interruptName);
  582. // Before using SPI.transfer() or asserting chip select pins,
  583. // this function is used to gain exclusive access to the SPI bus
  584. // and configure the correct settings.
  585. inline static void beginTransaction(SPISettings settings) {
  586. if (interruptMasksUsed) {
  587. __disable_irq();
  588. if (interruptMasksUsed & 0x01) {
  589. interruptSave[0] = NVIC_ICER0 & interruptMask[0];
  590. NVIC_ICER0 = interruptSave[0];
  591. }
  592. #if NVIC_NUM_INTERRUPTS > 32
  593. if (interruptMasksUsed & 0x02) {
  594. interruptSave[1] = NVIC_ICER1 & interruptMask[1];
  595. NVIC_ICER1 = interruptSave[1];
  596. }
  597. #endif
  598. #if NVIC_NUM_INTERRUPTS > 64 && defined(NVIC_ISER2)
  599. if (interruptMasksUsed & 0x04) {
  600. interruptSave[2] = NVIC_ICER2 & interruptMask[2];
  601. NVIC_ICER2 = interruptSave[2];
  602. }
  603. #endif
  604. #if NVIC_NUM_INTERRUPTS > 96 && defined(NVIC_ISER3)
  605. if (interruptMasksUsed & 0x08) {
  606. interruptSave[3] = NVIC_ICER3 & interruptMask[3];
  607. NVIC_ICER3 = interruptSave[3];
  608. }
  609. #endif
  610. __enable_irq();
  611. }
  612. #ifdef SPI_TRANSACTION_MISMATCH_LED
  613. if (inTransactionFlag) {
  614. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  615. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  616. }
  617. inTransactionFlag = 1;
  618. #endif
  619. if (SPI1_CTAR0 != settings.ctar) {
  620. SPI1_MCR = SPI_MCR_MDIS | SPI_MCR_HALT | SPI_MCR_PCSIS(0x1F);
  621. SPI1_CTAR0 = settings.ctar;
  622. SPI1_CTAR1 = settings.ctar| SPI_CTAR_FMSZ(8);
  623. SPI1_MCR = SPI_MCR_MSTR | SPI_MCR_PCSIS(0x1F);
  624. }
  625. }
  626. // Write to the SPI bus (MOSI pin) and also receive (MISO pin)
  627. inline static uint8_t transfer(uint8_t data) {
  628. SPI1_SR = SPI_SR_TCF;
  629. SPI1_PUSHR = data;
  630. while (!(SPI1_SR & SPI_SR_TCF)) ; // wait
  631. return SPI1_POPR;
  632. }
  633. inline static uint16_t transfer16(uint16_t data) {
  634. SPI1_SR = SPI_SR_TCF;
  635. SPI1_PUSHR = data | SPI_PUSHR_CTAS(1);
  636. while (!(SPI1_SR & SPI_SR_TCF)) ; // wait
  637. return SPI1_POPR;
  638. }
  639. inline static void transfer(void *buf, size_t count) {
  640. uint8_t *p = (uint8_t *)buf;
  641. while (count--) {
  642. *p = transfer(*p);
  643. p++;
  644. }
  645. }
  646. // After performing a group of transfers and releasing the chip select
  647. // signal, this function allows others to access the SPI bus
  648. inline static void endTransaction(void) {
  649. #ifdef SPI_TRANSACTION_MISMATCH_LED
  650. if (!inTransactionFlag) {
  651. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  652. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  653. }
  654. inTransactionFlag = 0;
  655. #endif
  656. if (interruptMasksUsed) {
  657. if (interruptMasksUsed & 0x01) {
  658. NVIC_ISER0 = interruptSave[0];
  659. }
  660. #if NVIC_NUM_INTERRUPTS > 32
  661. if (interruptMasksUsed & 0x02) {
  662. NVIC_ISER1 = interruptSave[1];
  663. }
  664. #endif
  665. #if NVIC_NUM_INTERRUPTS > 64 && defined(NVIC_ISER2)
  666. if (interruptMasksUsed & 0x04) {
  667. NVIC_ISER2 = interruptSave[2];
  668. }
  669. #endif
  670. #if NVIC_NUM_INTERRUPTS > 96 && defined(NVIC_ISER3)
  671. if (interruptMasksUsed & 0x08) {
  672. NVIC_ISER3 = interruptSave[3];
  673. }
  674. #endif
  675. }
  676. }
  677. // Disable the SPI bus
  678. static void end();
  679. // This function is deprecated. New applications should use
  680. // beginTransaction() to configure SPI settings.
  681. static void setBitOrder(uint8_t bitOrder);
  682. // This function is deprecated. New applications should use
  683. // beginTransaction() to configure SPI settings.
  684. static void setDataMode(uint8_t dataMode);
  685. // This function is deprecated. New applications should use
  686. // beginTransaction() to configure SPI settings.
  687. inline static void setClockDivider(uint8_t clockDiv) {
  688. if (clockDiv == SPI_CLOCK_DIV2) {
  689. setClockDivider_noInline(SPISettings(12000000, MSBFIRST, SPI_MODE0).ctar);
  690. } else if (clockDiv == SPI_CLOCK_DIV4) {
  691. setClockDivider_noInline(SPISettings(4000000, MSBFIRST, SPI_MODE0).ctar);
  692. } else if (clockDiv == SPI_CLOCK_DIV8) {
  693. setClockDivider_noInline(SPISettings(2000000, MSBFIRST, SPI_MODE0).ctar);
  694. } else if (clockDiv == SPI_CLOCK_DIV16) {
  695. setClockDivider_noInline(SPISettings(1000000, MSBFIRST, SPI_MODE0).ctar);
  696. } else if (clockDiv == SPI_CLOCK_DIV32) {
  697. setClockDivider_noInline(SPISettings(500000, MSBFIRST, SPI_MODE0).ctar);
  698. } else if (clockDiv == SPI_CLOCK_DIV64) {
  699. setClockDivider_noInline(SPISettings(250000, MSBFIRST, SPI_MODE0).ctar);
  700. } else { /* clockDiv == SPI_CLOCK_DIV128 */
  701. setClockDivider_noInline(SPISettings(125000, MSBFIRST, SPI_MODE0).ctar);
  702. }
  703. }
  704. static void setClockDivider_noInline(uint32_t clk);
  705. // These undocumented functions should not be used. SPI.transfer()
  706. // polls the hardware flag which is automatically cleared as the
  707. // AVR responds to SPI's interrupt
  708. inline static void attachInterrupt() { }
  709. inline static void detachInterrupt() { }
  710. // Teensy 3.x can use alternate pins for these 3 SPI signals.
  711. inline static void setMOSI(uint8_t pin) __attribute__((always_inline)) {
  712. SPCR1.setMOSI(pin);
  713. }
  714. inline static void setMISO(uint8_t pin) __attribute__((always_inline)) {
  715. SPCR1.setMISO(pin);
  716. }
  717. inline static void setSCK(uint8_t pin) __attribute__((always_inline)) {
  718. SPCR1.setSCK(pin);
  719. }
  720. // return true if "pin" has special chip select capability
  721. static bool pinIsChipSelect(uint8_t pin);
  722. // return true if both pin1 and pin2 have independent chip select capability
  723. static bool pinIsChipSelect(uint8_t pin1, uint8_t pin2);
  724. // configure a pin for chip select and return its SPI_MCR_PCSIS bitmask
  725. static uint8_t setCS(uint8_t pin);
  726. private:
  727. static uint8_t interruptMasksUsed;
  728. static uint32_t interruptMask[(NVIC_NUM_INTERRUPTS+31)/32];
  729. static uint32_t interruptSave[(NVIC_NUM_INTERRUPTS+31)/32];
  730. #ifdef SPI_TRANSACTION_MISMATCH_LED
  731. static uint8_t inTransactionFlag;
  732. #endif
  733. };
  734. class SPI2Class {
  735. public:
  736. // Initialize the SPI library
  737. static void begin();
  738. // If SPI is to used from within an interrupt, this function registers
  739. // that interrupt with the SPI library, so beginTransaction() can
  740. // prevent conflicts. The input interruptNumber is the number used
  741. // with attachInterrupt. If SPI is used from a different interrupt
  742. // (eg, a timer), interruptNumber should be 255.
  743. static void usingInterrupt(uint8_t n) {
  744. if (n == 3 || n == 4 || n == 24 || n == 33) {
  745. usingInterrupt(IRQ_PORTA);
  746. } else if (n == 0 || n == 1 || (n >= 16 && n <= 19) || n == 25 || n == 32) {
  747. usingInterrupt(IRQ_PORTB);
  748. } else if ((n >= 9 && n <= 13) || n == 15 || n == 22 || n == 23
  749. || (n >= 27 && n <= 30)) {
  750. usingInterrupt(IRQ_PORTC);
  751. } else if (n == 2 || (n >= 5 && n <= 8) || n == 14 || n == 20 || n == 21) {
  752. usingInterrupt(IRQ_PORTD);
  753. } else if (n == 26 || n == 31) {
  754. usingInterrupt(IRQ_PORTE);
  755. }
  756. }
  757. static void usingInterrupt(IRQ_NUMBER_t interruptName);
  758. static void notUsingInterrupt(IRQ_NUMBER_t interruptName);
  759. // Before using SPI.transfer() or asserting chip select pins,
  760. // this function is used to gain exclusive access to the SPI bus
  761. // and configure the correct settings.
  762. inline static void beginTransaction(SPISettings settings) {
  763. if (interruptMasksUsed) {
  764. __disable_irq();
  765. if (interruptMasksUsed & 0x01) {
  766. interruptSave[0] = NVIC_ICER0 & interruptMask[0];
  767. NVIC_ICER0 = interruptSave[0];
  768. }
  769. #if NVIC_NUM_INTERRUPTS > 32
  770. if (interruptMasksUsed & 0x02) {
  771. interruptSave[1] = NVIC_ICER1 & interruptMask[1];
  772. NVIC_ICER1 = interruptSave[1];
  773. }
  774. #endif
  775. #if NVIC_NUM_INTERRUPTS > 64 && defined(NVIC_ISER2)
  776. if (interruptMasksUsed & 0x04) {
  777. interruptSave[2] = NVIC_ICER2 & interruptMask[2];
  778. NVIC_ICER2 = interruptSave[2];
  779. }
  780. #endif
  781. #if NVIC_NUM_INTERRUPTS > 96 && defined(NVIC_ISER3)
  782. if (interruptMasksUsed & 0x08) {
  783. interruptSave[3] = NVIC_ICER3 & interruptMask[3];
  784. NVIC_ICER3 = interruptSave[3];
  785. }
  786. #endif
  787. __enable_irq();
  788. }
  789. #ifdef SPI_TRANSACTION_MISMATCH_LED
  790. if (inTransactionFlag) {
  791. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  792. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  793. }
  794. inTransactionFlag = 1;
  795. #endif
  796. if (SPI2_CTAR0 != settings.ctar) {
  797. SPI2_MCR = SPI_MCR_MDIS | SPI_MCR_HALT | SPI_MCR_PCSIS(0x1F);
  798. SPI2_CTAR0 = settings.ctar;
  799. SPI2_CTAR1 = settings.ctar| SPI_CTAR_FMSZ(8);
  800. SPI2_MCR = SPI_MCR_MSTR | SPI_MCR_PCSIS(0x1F);
  801. }
  802. }
  803. // Write to the SPI bus (MOSI pin) and also receive (MISO pin)
  804. inline static uint8_t transfer(uint8_t data) {
  805. SPI2_SR = SPI_SR_TCF;
  806. SPI2_PUSHR = data;
  807. while (!(SPI2_SR & SPI_SR_TCF)) ; // wait
  808. return SPI2_POPR;
  809. }
  810. inline static uint16_t transfer16(uint16_t data) {
  811. SPI2_SR = SPI_SR_TCF;
  812. SPI2_PUSHR = data | SPI_PUSHR_CTAS(1);
  813. while (!(SPI2_SR & SPI_SR_TCF)) ; // wait
  814. return SPI2_POPR;
  815. }
  816. inline static void transfer(void *buf, size_t count) {
  817. uint8_t *p = (uint8_t *)buf;
  818. while (count--) {
  819. *p = transfer(*p);
  820. p++;
  821. }
  822. }
  823. // After performing a group of transfers and releasing the chip select
  824. // signal, this function allows others to access the SPI bus
  825. inline static void endTransaction(void) {
  826. #ifdef SPI_TRANSACTION_MISMATCH_LED
  827. if (!inTransactionFlag) {
  828. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  829. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  830. }
  831. inTransactionFlag = 0;
  832. #endif
  833. if (interruptMasksUsed) {
  834. if (interruptMasksUsed & 0x01) {
  835. NVIC_ISER0 = interruptSave[0];
  836. }
  837. #if NVIC_NUM_INTERRUPTS > 32
  838. if (interruptMasksUsed & 0x02) {
  839. NVIC_ISER1 = interruptSave[1];
  840. }
  841. #endif
  842. #if NVIC_NUM_INTERRUPTS > 64 && defined(NVIC_ISER2)
  843. if (interruptMasksUsed & 0x04) {
  844. NVIC_ISER2 = interruptSave[2];
  845. }
  846. #endif
  847. #if NVIC_NUM_INTERRUPTS > 96 && defined(NVIC_ISER3)
  848. if (interruptMasksUsed & 0x08) {
  849. NVIC_ISER3 = interruptSave[3];
  850. }
  851. #endif
  852. }
  853. }
  854. // Disable the SPI bus
  855. static void end();
  856. // This function is deprecated. New applications should use
  857. // beginTransaction() to configure SPI settings.
  858. static void setBitOrder(uint8_t bitOrder);
  859. // This function is deprecated. New applications should use
  860. // beginTransaction() to configure SPI settings.
  861. static void setDataMode(uint8_t dataMode);
  862. // This function is deprecated. New applications should use
  863. // beginTransaction() to configure SPI settings.
  864. inline static void setClockDivider(uint8_t clockDiv) {
  865. if (clockDiv == SPI_CLOCK_DIV2) {
  866. setClockDivider_noInline(SPISettings(12000000, MSBFIRST, SPI_MODE0).ctar);
  867. } else if (clockDiv == SPI_CLOCK_DIV4) {
  868. setClockDivider_noInline(SPISettings(4000000, MSBFIRST, SPI_MODE0).ctar);
  869. } else if (clockDiv == SPI_CLOCK_DIV8) {
  870. setClockDivider_noInline(SPISettings(2000000, MSBFIRST, SPI_MODE0).ctar);
  871. } else if (clockDiv == SPI_CLOCK_DIV16) {
  872. setClockDivider_noInline(SPISettings(1000000, MSBFIRST, SPI_MODE0).ctar);
  873. } else if (clockDiv == SPI_CLOCK_DIV32) {
  874. setClockDivider_noInline(SPISettings(500000, MSBFIRST, SPI_MODE0).ctar);
  875. } else if (clockDiv == SPI_CLOCK_DIV64) {
  876. setClockDivider_noInline(SPISettings(250000, MSBFIRST, SPI_MODE0).ctar);
  877. } else { /* clockDiv == SPI_CLOCK_DIV128 */
  878. setClockDivider_noInline(SPISettings(125000, MSBFIRST, SPI_MODE0).ctar);
  879. }
  880. }
  881. static void setClockDivider_noInline(uint32_t clk);
  882. // These undocumented functions should not be used. SPI.transfer()
  883. // polls the hardware flag which is automatically cleared as the
  884. // AVR responds to SPI's interrupt
  885. inline static void attachInterrupt() { }
  886. inline static void detachInterrupt() { }
  887. // Teensy 3.x can use alternate pins for these 3 SPI signals.
  888. inline static void setMOSI(uint8_t pin) __attribute__((always_inline)) {
  889. SPCR2.setMOSI(pin);
  890. }
  891. inline static void setMISO(uint8_t pin) __attribute__((always_inline)) {
  892. SPCR2.setMISO(pin);
  893. }
  894. inline static void setSCK(uint8_t pin) __attribute__((always_inline)) {
  895. SPCR2.setSCK(pin);
  896. }
  897. // return true if "pin" has special chip select capability
  898. static uint8_t pinIsChipSelect(uint8_t pin);
  899. // return true if both pin1 and pin2 have independent chip select capability
  900. static bool pinIsChipSelect(uint8_t pin1, uint8_t pin2);
  901. // configure a pin for chip select and return its SPI_MCR_PCSIS bitmask
  902. static uint8_t setCS(uint8_t pin);
  903. private:
  904. static uint8_t interruptMasksUsed;
  905. static uint32_t interruptMask[(NVIC_NUM_INTERRUPTS+31)/32];
  906. static uint32_t interruptSave[(NVIC_NUM_INTERRUPTS+31)/32];
  907. #ifdef SPI_TRANSACTION_MISMATCH_LED
  908. static uint8_t inTransactionFlag;
  909. #endif
  910. };
  911. #endif
  912. /**********************************************************/
  913. /* 32 bit Teensy-LC */
  914. /**********************************************************/
  915. #elif defined(__arm__) && defined(TEENSYDUINO) && defined(KINETISL)
  916. class SPISettings {
  917. public:
  918. SPISettings(uint32_t clock, uint8_t bitOrder, uint8_t dataMode) {
  919. if (__builtin_constant_p(clock)) {
  920. init_AlwaysInline(clock, bitOrder, dataMode);
  921. } else {
  922. init_MightInline(clock, bitOrder, dataMode);
  923. }
  924. }
  925. SPISettings() {
  926. init_AlwaysInline(4000000, MSBFIRST, SPI_MODE0);
  927. }
  928. private:
  929. void init_MightInline(uint32_t clock, uint8_t bitOrder, uint8_t dataMode) {
  930. init_AlwaysInline(clock, bitOrder, dataMode);
  931. }
  932. void init_AlwaysInline(uint32_t clock, uint8_t bitOrder, uint8_t dataMode)
  933. __attribute__((__always_inline__)) {
  934. uint8_t c = SPI_C1_MSTR | SPI_C1_SPE;
  935. if (dataMode & 0x04) c |= SPI_C1_CPHA;
  936. if (dataMode & 0x08) c |= SPI_C1_CPOL;
  937. if (bitOrder == LSBFIRST) c |= SPI_C1_LSBFE;
  938. c1 = c;
  939. if (__builtin_constant_p(clock)) {
  940. if (clock >= F_BUS / 2) { c = SPI_BR_SPPR(0) | SPI_BR_SPR(0);
  941. } else if (clock >= F_BUS / 4) { c = SPI_BR_SPPR(1) | SPI_BR_SPR(0);
  942. } else if (clock >= F_BUS / 6) { c = SPI_BR_SPPR(2) | SPI_BR_SPR(0);
  943. } else if (clock >= F_BUS / 8) { c = SPI_BR_SPPR(3) | SPI_BR_SPR(0);
  944. } else if (clock >= F_BUS / 10) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(0);
  945. } else if (clock >= F_BUS / 12) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(0);
  946. } else if (clock >= F_BUS / 14) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(0);
  947. } else if (clock >= F_BUS / 16) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(0);
  948. } else if (clock >= F_BUS / 20) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(1);
  949. } else if (clock >= F_BUS / 24) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(1);
  950. } else if (clock >= F_BUS / 28) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(1);
  951. } else if (clock >= F_BUS / 32) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(1);
  952. } else if (clock >= F_BUS / 40) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(2);
  953. } else if (clock >= F_BUS / 48) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(2);
  954. } else if (clock >= F_BUS / 56) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(2);
  955. } else if (clock >= F_BUS / 64) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(2);
  956. } else if (clock >= F_BUS / 80) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(3);
  957. } else if (clock >= F_BUS / 96) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(3);
  958. } else if (clock >= F_BUS / 112) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(3);
  959. } else if (clock >= F_BUS / 128) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(3);
  960. } else if (clock >= F_BUS / 160) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(4);
  961. } else if (clock >= F_BUS / 192) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(4);
  962. } else if (clock >= F_BUS / 224) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(4);
  963. } else if (clock >= F_BUS / 256) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(4);
  964. } else if (clock >= F_BUS / 320) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(5);
  965. } else if (clock >= F_BUS / 384) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(5);
  966. } else if (clock >= F_BUS / 448) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(5);
  967. } else if (clock >= F_BUS / 512) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(5);
  968. } else if (clock >= F_BUS / 640) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(6);
  969. } else /* F_BUS / 768 */ { c = SPI_BR_SPPR(5) | SPI_BR_SPR(6);
  970. }
  971. } else {
  972. for (uint32_t i=0; i<30; i++) {
  973. c = br_clock_table[i];
  974. if (clock >= F_BUS / br_div_table[i]) break;
  975. }
  976. }
  977. br0 = c;
  978. if (__builtin_constant_p(clock)) {
  979. if (clock >= (F_PLL/2) / 2) { c = SPI_BR_SPPR(0) | SPI_BR_SPR(0);
  980. } else if (clock >= (F_PLL/2) / 4) { c = SPI_BR_SPPR(1) | SPI_BR_SPR(0);
  981. } else if (clock >= (F_PLL/2) / 6) { c = SPI_BR_SPPR(2) | SPI_BR_SPR(0);
  982. } else if (clock >= (F_PLL/2) / 8) { c = SPI_BR_SPPR(3) | SPI_BR_SPR(0);
  983. } else if (clock >= (F_PLL/2) / 10) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(0);
  984. } else if (clock >= (F_PLL/2) / 12) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(0);
  985. } else if (clock >= (F_PLL/2) / 14) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(0);
  986. } else if (clock >= (F_PLL/2) / 16) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(0);
  987. } else if (clock >= (F_PLL/2) / 20) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(1);
  988. } else if (clock >= (F_PLL/2) / 24) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(1);
  989. } else if (clock >= (F_PLL/2) / 28) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(1);
  990. } else if (clock >= (F_PLL/2) / 32) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(1);
  991. } else if (clock >= (F_PLL/2) / 40) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(2);
  992. } else if (clock >= (F_PLL/2) / 48) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(2);
  993. } else if (clock >= (F_PLL/2) / 56) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(2);
  994. } else if (clock >= (F_PLL/2) / 64) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(2);
  995. } else if (clock >= (F_PLL/2) / 80) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(3);
  996. } else if (clock >= (F_PLL/2) / 96) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(3);
  997. } else if (clock >= (F_PLL/2) / 112) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(3);
  998. } else if (clock >= (F_PLL/2) / 128) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(3);
  999. } else if (clock >= (F_PLL/2) / 160) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(4);
  1000. } else if (clock >= (F_PLL/2) / 192) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(4);
  1001. } else if (clock >= (F_PLL/2) / 224) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(4);
  1002. } else if (clock >= (F_PLL/2) / 256) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(4);
  1003. } else if (clock >= (F_PLL/2) / 320) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(5);
  1004. } else if (clock >= (F_PLL/2) / 384) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(5);
  1005. } else if (clock >= (F_PLL/2) / 448) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(5);
  1006. } else if (clock >= (F_PLL/2) / 512) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(5);
  1007. } else if (clock >= (F_PLL/2) / 640) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(6);
  1008. } else /* (F_PLL/2) / 768 */ { c = SPI_BR_SPPR(5) | SPI_BR_SPR(6);
  1009. }
  1010. } else {
  1011. for (uint32_t i=0; i<30; i++) {
  1012. c = br_clock_table[i];
  1013. if (clock >= (F_PLL/2) / br_div_table[i]) break;
  1014. }
  1015. }
  1016. br1 = c;
  1017. }
  1018. static const uint8_t br_clock_table[30];
  1019. static const uint16_t br_div_table[30];
  1020. uint8_t c1, br0, br1;
  1021. friend class SPIClass;
  1022. friend class SPI1Class;
  1023. };
  1024. class SPIClass {
  1025. public:
  1026. // Initialize the SPI library
  1027. static void begin();
  1028. // If SPI is to used from within an interrupt, this function registers
  1029. // that interrupt with the SPI library, so beginTransaction() can
  1030. // prevent conflicts. The input interruptNumber is the number used
  1031. // with attachInterrupt. If SPI is used from a different interrupt
  1032. // (eg, a timer), interruptNumber should be 255.
  1033. static void usingInterrupt(uint8_t n) {
  1034. if (n == 3 || n == 4) {
  1035. usingInterrupt(IRQ_PORTA);
  1036. } else if ((n >= 2 && n <= 15) || (n >= 20 && n <= 23)) {
  1037. usingInterrupt(IRQ_PORTCD);
  1038. }
  1039. }
  1040. static void usingInterrupt(IRQ_NUMBER_t interruptName) {
  1041. uint32_t n = (uint32_t)interruptName;
  1042. if (n < NVIC_NUM_INTERRUPTS) interruptMask |= (1 << n);
  1043. }
  1044. static void notUsingInterrupt(IRQ_NUMBER_t interruptName) {
  1045. uint32_t n = (uint32_t)interruptName;
  1046. if (n < NVIC_NUM_INTERRUPTS) interruptMask &= ~(1 << n);
  1047. }
  1048. // Before using SPI.transfer() or asserting chip select pins,
  1049. // this function is used to gain exclusive access to the SPI bus
  1050. // and configure the correct settings.
  1051. inline static void beginTransaction(SPISettings settings) {
  1052. if (interruptMask) {
  1053. __disable_irq();
  1054. interruptSave = NVIC_ICER0 & interruptMask;
  1055. NVIC_ICER0 = interruptSave;
  1056. __enable_irq();
  1057. }
  1058. #ifdef SPI_TRANSACTION_MISMATCH_LED
  1059. if (inTransactionFlag) {
  1060. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  1061. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  1062. }
  1063. inTransactionFlag = 1;
  1064. #endif
  1065. SPI0_C1 = settings.c1;
  1066. SPI0_BR = settings.br0;
  1067. }
  1068. // Write to the SPI bus (MOSI pin) and also receive (MISO pin)
  1069. inline static uint8_t transfer(uint8_t data) {
  1070. SPI0_DL = data;
  1071. while (!(SPI0_S & SPI_S_SPRF)) ; // wait
  1072. return SPI0_DL;
  1073. }
  1074. inline static uint16_t transfer16(uint16_t data) {
  1075. SPI0_C2 = SPI_C2_SPIMODE;
  1076. SPI0_S;
  1077. SPI0_DL = data;
  1078. SPI0_DH = data >> 8;
  1079. while (!(SPI0_S & SPI_S_SPRF)) ; // wait
  1080. uint16_t r = SPI0_DL | (SPI0_DH << 8);
  1081. SPI0_C2 = 0;
  1082. SPI0_S;
  1083. return r;
  1084. }
  1085. inline static void transfer(void *buf, size_t count) {
  1086. if (count == 0) return;
  1087. uint8_t *p = (uint8_t *)buf;
  1088. while (!(SPI0_S & SPI_S_SPTEF)) ; // wait
  1089. SPI0_DL = *p;
  1090. while (--count > 0) {
  1091. uint8_t out = *(p + 1);
  1092. while (!(SPI0_S & SPI_S_SPTEF)) ; // wait
  1093. __disable_irq();
  1094. SPI0_DL = out;
  1095. while (!(SPI0_S & SPI_S_SPRF)) ; // wait
  1096. uint8_t in = SPI0_DL;
  1097. __enable_irq();
  1098. *p++ = in;
  1099. }
  1100. while (!(SPI0_S & SPI_S_SPRF)) ; // wait
  1101. *p = SPDR;
  1102. }
  1103. // After performing a group of transfers and releasing the chip select
  1104. // signal, this function allows others to access the SPI bus
  1105. inline static void endTransaction(void) {
  1106. #ifdef SPI_TRANSACTION_MISMATCH_LED
  1107. if (!inTransactionFlag) {
  1108. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  1109. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  1110. }
  1111. inTransactionFlag = 0;
  1112. #endif
  1113. if (interruptMask) {
  1114. NVIC_ISER0 = interruptSave;
  1115. }
  1116. }
  1117. // Disable the SPI bus
  1118. static void end();
  1119. // This function is deprecated. New applications should use
  1120. // beginTransaction() to configure SPI settings.
  1121. static void setBitOrder(uint8_t bitOrder) {
  1122. uint8_t c = SPI0_C1 | SPI_C1_SPE;
  1123. if (bitOrder == LSBFIRST) c |= SPI_C1_LSBFE;
  1124. else c &= ~SPI_C1_LSBFE;
  1125. SPI0_C1 = c;
  1126. }
  1127. // This function is deprecated. New applications should use
  1128. // beginTransaction() to configure SPI settings.
  1129. static void setDataMode(uint8_t dataMode) {
  1130. uint8_t c = SPI0_C1 | SPI_C1_SPE;
  1131. if (dataMode & 0x04) c |= SPI_C1_CPHA;
  1132. else c &= ~SPI_C1_CPHA;
  1133. if (dataMode & 0x08) c |= SPI_C1_CPOL;
  1134. else c &= ~SPI_C1_CPOL;
  1135. SPI0_C1 = c;
  1136. }
  1137. // This function is deprecated. New applications should use
  1138. // beginTransaction() to configure SPI settings.
  1139. inline static void setClockDivider(uint8_t clockDiv) {
  1140. if (clockDiv == SPI_CLOCK_DIV2) {
  1141. SPI0_BR = (SPISettings(12000000, MSBFIRST, SPI_MODE0).br0);
  1142. } else if (clockDiv == SPI_CLOCK_DIV4) {
  1143. SPI0_BR = (SPISettings(4000000, MSBFIRST, SPI_MODE0).br0);
  1144. } else if (clockDiv == SPI_CLOCK_DIV8) {
  1145. SPI0_BR = (SPISettings(2000000, MSBFIRST, SPI_MODE0).br0);
  1146. } else if (clockDiv == SPI_CLOCK_DIV16) {
  1147. SPI0_BR = (SPISettings(1000000, MSBFIRST, SPI_MODE0).br0);
  1148. } else if (clockDiv == SPI_CLOCK_DIV32) {
  1149. SPI0_BR = (SPISettings(500000, MSBFIRST, SPI_MODE0).br0);
  1150. } else if (clockDiv == SPI_CLOCK_DIV64) {
  1151. SPI0_BR = (SPISettings(250000, MSBFIRST, SPI_MODE0).br0);
  1152. } else { /* clockDiv == SPI_CLOCK_DIV128 */
  1153. SPI0_BR = (SPISettings(125000, MSBFIRST, SPI_MODE0).br0);
  1154. }
  1155. }
  1156. // These undocumented functions should not be used. SPI.transfer()
  1157. // polls the hardware flag which is automatically cleared as the
  1158. // AVR responds to SPI's interrupt
  1159. inline static void attachInterrupt() { }
  1160. inline static void detachInterrupt() { }
  1161. // Teensy LC can use alternate pins for these 3 SPI signals.
  1162. inline static void setMOSI(uint8_t pin) __attribute__((always_inline)) {
  1163. SPCR.setMOSI(pin);
  1164. }
  1165. inline static void setMISO(uint8_t pin) __attribute__((always_inline)) {
  1166. SPCR.setMISO(pin);
  1167. }
  1168. inline static void setSCK(uint8_t pin) __attribute__((always_inline)) {
  1169. SPCR.setSCK(pin);
  1170. }
  1171. // return true if "pin" has special chip select capability
  1172. static bool pinIsChipSelect(uint8_t pin) { return (pin == 10 || pin == 2); }
  1173. // return true if both pin1 and pin2 have independent chip select capability
  1174. static bool pinIsChipSelect(uint8_t pin1, uint8_t pin2) { return false; }
  1175. // configure a pin for chip select and return its SPI_MCR_PCSIS bitmask
  1176. static uint8_t setCS(uint8_t pin);
  1177. private:
  1178. static uint32_t interruptMask;
  1179. static uint32_t interruptSave;
  1180. #ifdef SPI_TRANSACTION_MISMATCH_LED
  1181. static uint8_t inTransactionFlag;
  1182. #endif
  1183. };
  1184. class SPI1Class {
  1185. public:
  1186. // Initialize the SPI library
  1187. static void begin();
  1188. // If SPI is to used from within an interrupt, this function registers
  1189. // that interrupt with the SPI library, so beginTransaction() can
  1190. // prevent conflicts. The input interruptNumber is the number used
  1191. // with attachInterrupt. If SPI is used from a different interrupt
  1192. // (eg, a timer), interruptNumber should be 255.
  1193. static void usingInterrupt(uint8_t n) {
  1194. if (n == 3 || n == 4) {
  1195. usingInterrupt(IRQ_PORTA);
  1196. } else if ((n >= 2 && n <= 15) || (n >= 20 && n <= 23)) {
  1197. usingInterrupt(IRQ_PORTCD);
  1198. }
  1199. }
  1200. static void usingInterrupt(IRQ_NUMBER_t interruptName) {
  1201. uint32_t n = (uint32_t)interruptName;
  1202. if (n < NVIC_NUM_INTERRUPTS) interruptMask |= (1 << n);
  1203. }
  1204. static void notUsingInterrupt(IRQ_NUMBER_t interruptName) {
  1205. uint32_t n = (uint32_t)interruptName;
  1206. if (n < NVIC_NUM_INTERRUPTS) interruptMask &= ~(1 << n);
  1207. }
  1208. // Before using SPI.transfer() or asserting chip select pins,
  1209. // this function is used to gain exclusive access to the SPI bus
  1210. // and configure the correct settings.
  1211. inline static void beginTransaction(SPISettings settings) {
  1212. if (interruptMask) {
  1213. __disable_irq();
  1214. interruptSave = NVIC_ICER0 & interruptMask;
  1215. NVIC_ICER0 = interruptSave;
  1216. __enable_irq();
  1217. }
  1218. #ifdef SPI_TRANSACTION_MISMATCH_LED
  1219. if (inTransactionFlag) {
  1220. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  1221. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  1222. }
  1223. inTransactionFlag = 1;
  1224. #endif
  1225. SPI1_C1 = settings.c1;
  1226. SPI1_BR = settings.br1;
  1227. }
  1228. // Write to the SPI bus (MOSI pin) and also receive (MISO pin)
  1229. inline static uint8_t transfer(uint8_t data) {
  1230. SPI1_DL = data;
  1231. while (!(SPI1_S & SPI_S_SPRF)) ; // wait
  1232. return SPI1_DL;
  1233. }
  1234. inline static uint16_t transfer16(uint16_t data) {
  1235. SPI1_C2 = SPI_C2_SPIMODE;
  1236. SPI1_S;
  1237. SPI1_DL = data;
  1238. SPI1_DH = data >> 8;
  1239. while (!(SPI1_S & SPI_S_SPRF)) ; // wait
  1240. uint16_t r = SPI1_DL | (SPI1_DH << 8);
  1241. SPI1_C2 = 0;
  1242. SPI1_S;
  1243. return r;
  1244. }
  1245. inline static void transfer(void *buf, size_t count) {
  1246. if (count == 0) return;
  1247. uint8_t *p = (uint8_t *)buf;
  1248. while (!(SPI1_S & SPI_S_SPTEF)) ; // wait
  1249. SPI1_DL = *p;
  1250. while (--count > 0) {
  1251. uint8_t out = *(p + 1);
  1252. while (!(SPI1_S & SPI_S_SPTEF)) ; // wait
  1253. __disable_irq();
  1254. SPI1_DL = out;
  1255. while (!(SPI1_S & SPI_S_SPRF)) ; // wait
  1256. uint8_t in = SPI1_DL;
  1257. __enable_irq();
  1258. *p++ = in;
  1259. }
  1260. while (!(SPI1_S & SPI_S_SPRF)) ; // wait
  1261. *p = SPDR;
  1262. }
  1263. // After performing a group of transfers and releasing the chip select
  1264. // signal, this function allows others to access the SPI bus
  1265. inline static void endTransaction(void) {
  1266. #ifdef SPI_TRANSACTION_MISMATCH_LED
  1267. if (!inTransactionFlag) {
  1268. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  1269. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  1270. }
  1271. inTransactionFlag = 0;
  1272. #endif
  1273. if (interruptMask) {
  1274. NVIC_ISER0 = interruptSave;
  1275. }
  1276. }
  1277. // Disable the SPI bus
  1278. static void end();
  1279. // This function is deprecated. New applications should use
  1280. // beginTransaction() to configure SPI settings.
  1281. static void setBitOrder(uint8_t bitOrder) {
  1282. uint8_t c = SPI1_C1 | SPI_C1_SPE;
  1283. if (bitOrder == LSBFIRST) c |= SPI_C1_LSBFE;
  1284. else c &= ~SPI_C1_LSBFE;
  1285. SPI1_C1 = c;
  1286. }
  1287. // This function is deprecated. New applications should use
  1288. // beginTransaction() to configure SPI settings.
  1289. static void setDataMode(uint8_t dataMode) {
  1290. uint8_t c = SPI1_C1 | SPI_C1_SPE;
  1291. if (dataMode & 0x04) c |= SPI_C1_CPHA;
  1292. else c &= ~SPI_C1_CPHA;
  1293. if (dataMode & 0x08) c |= SPI_C1_CPOL;
  1294. else c &= ~SPI_C1_CPOL;
  1295. SPI1_C1 = c;
  1296. }
  1297. // This function is deprecated. New applications should use
  1298. // beginTransaction() to configure SPI settings.
  1299. inline static void setClockDivider(uint8_t clockDiv) {
  1300. if (clockDiv == SPI_CLOCK_DIV2) {
  1301. SPI1_BR = (SPISettings(12000000, MSBFIRST, SPI_MODE0).br1);
  1302. } else if (clockDiv == SPI_CLOCK_DIV4) {
  1303. SPI1_BR = (SPISettings(4000000, MSBFIRST, SPI_MODE0).br1);
  1304. } else if (clockDiv == SPI_CLOCK_DIV8) {
  1305. SPI1_BR = (SPISettings(2000000, MSBFIRST, SPI_MODE0).br1);
  1306. } else if (clockDiv == SPI_CLOCK_DIV16) {
  1307. SPI1_BR = (SPISettings(1000000, MSBFIRST, SPI_MODE0).br1);
  1308. } else if (clockDiv == SPI_CLOCK_DIV32) {
  1309. SPI1_BR = (SPISettings(500000, MSBFIRST, SPI_MODE0).br1);
  1310. } else if (clockDiv == SPI_CLOCK_DIV64) {
  1311. SPI1_BR = (SPISettings(250000, MSBFIRST, SPI_MODE0).br1);
  1312. } else { /* clockDiv == SPI_CLOCK_DIV128 */
  1313. SPI1_BR = (SPISettings(125000, MSBFIRST, SPI_MODE0).br1);
  1314. }
  1315. }
  1316. // These undocumented functions should not be used. SPI.transfer()
  1317. // polls the hardware flag which is automatically cleared as the
  1318. // AVR responds to SPI's interrupt
  1319. inline static void attachInterrupt() { }
  1320. inline static void detachInterrupt() { }
  1321. // Teensy LC can use alternate pins for these 3 SPI signals.
  1322. inline static void setMOSI(uint8_t pin) __attribute__((always_inline)) {
  1323. SPCR1.setMOSI(pin);
  1324. }
  1325. inline static void setMISO(uint8_t pin) __attribute__((always_inline)) {
  1326. SPCR1.setMISO(pin);
  1327. }
  1328. inline static void setSCK(uint8_t pin) __attribute__((always_inline)) {
  1329. SPCR1.setSCK(pin);
  1330. }
  1331. // return true if "pin" has special chip select capability
  1332. static bool pinIsChipSelect(uint8_t pin) { return (pin == 6); }
  1333. // return true if both pin1 and pin2 have independent chip select capability
  1334. static bool pinIsChipSelect(uint8_t pin1, uint8_t pin2) { return false; }
  1335. // configure a pin for chip select and return its SPI_MCR_PCSIS bitmask
  1336. static uint8_t setCS(uint8_t pin);
  1337. private:
  1338. static uint32_t interruptMask;
  1339. static uint32_t interruptSave;
  1340. #ifdef SPI_TRANSACTION_MISMATCH_LED
  1341. static uint8_t inTransactionFlag;
  1342. #endif
  1343. };
  1344. /**********************************************************/
  1345. /* 32 bit Arduino Due */
  1346. /**********************************************************/
  1347. #elif defined(__arm__) && defined(__SAM3X8E__)
  1348. #undef SPI_MODE0
  1349. #undef SPI_MODE1
  1350. #undef SPI_MODE2
  1351. #undef SPI_MODE3
  1352. #define SPI_MODE0 0x02
  1353. #define SPI_MODE1 0x00
  1354. #define SPI_MODE2 0x03
  1355. #define SPI_MODE3 0x01
  1356. #undef SPI_CLOCK_DIV2
  1357. #undef SPI_CLOCK_DIV4
  1358. #undef SPI_CLOCK_DIV8
  1359. #undef SPI_CLOCK_DIV16
  1360. #undef SPI_CLOCK_DIV32
  1361. #undef SPI_CLOCK_DIV64
  1362. #undef SPI_CLOCK_DIV128
  1363. #define SPI_CLOCK_DIV2 11
  1364. #define SPI_CLOCK_DIV4 21
  1365. #define SPI_CLOCK_DIV8 42
  1366. #define SPI_CLOCK_DIV16 84
  1367. #define SPI_CLOCK_DIV32 168
  1368. #define SPI_CLOCK_DIV64 255
  1369. #define SPI_CLOCK_DIV128 255
  1370. enum SPITransferMode {
  1371. SPI_CONTINUE,
  1372. SPI_LAST
  1373. };
  1374. class SPISettings {
  1375. public:
  1376. SPISettings(uint32_t clock, BitOrder bitOrder, uint8_t dataMode) {
  1377. if (__builtin_constant_p(clock)) {
  1378. init_AlwaysInline(clock, bitOrder, dataMode);
  1379. } else {
  1380. init_MightInline(clock, bitOrder, dataMode);
  1381. }
  1382. }
  1383. SPISettings() {
  1384. init_AlwaysInline(4000000, MSBFIRST, SPI_MODE0);
  1385. }
  1386. private:
  1387. void init_MightInline(uint32_t clock, BitOrder bitOrder, uint8_t dataMode) {
  1388. init_AlwaysInline(clock, bitOrder, dataMode);
  1389. }
  1390. void init_AlwaysInline(uint32_t clock, BitOrder bitOrder, uint8_t dataMode)
  1391. __attribute__((__always_inline__)) {
  1392. uint8_t div;
  1393. border = bitOrder;
  1394. if (__builtin_constant_p(clock)) {
  1395. if (clock >= F_CPU / 2) div = 2;
  1396. else if (clock >= F_CPU / 3) div = 3;
  1397. else if (clock >= F_CPU / 4) div = 4;
  1398. else if (clock >= F_CPU / 5) div = 5;
  1399. else if (clock >= F_CPU / 6) div = 6;
  1400. else if (clock >= F_CPU / 7) div = 7;
  1401. else if (clock >= F_CPU / 8) div = 8;
  1402. else if (clock >= F_CPU / 9) div = 9;
  1403. else if (clock >= F_CPU / 10) div = 10;
  1404. else if (clock >= F_CPU / 11) div = 11;
  1405. else if (clock >= F_CPU / 12) div = 12;
  1406. else if (clock >= F_CPU / 13) div = 13;
  1407. else if (clock >= F_CPU / 14) div = 14;
  1408. else if (clock >= F_CPU / 15) div = 15;
  1409. else if (clock >= F_CPU / 16) div = 16;
  1410. else if (clock >= F_CPU / 17) div = 17;
  1411. else if (clock >= F_CPU / 18) div = 18;
  1412. else if (clock >= F_CPU / 19) div = 19;
  1413. else if (clock >= F_CPU / 20) div = 20;
  1414. else if (clock >= F_CPU / 21) div = 21;
  1415. else if (clock >= F_CPU / 22) div = 22;
  1416. else if (clock >= F_CPU / 23) div = 23;
  1417. else if (clock >= F_CPU / 24) div = 24;
  1418. else if (clock >= F_CPU / 25) div = 25;
  1419. else if (clock >= F_CPU / 26) div = 26;
  1420. else if (clock >= F_CPU / 27) div = 27;
  1421. else if (clock >= F_CPU / 28) div = 28;
  1422. else if (clock >= F_CPU / 29) div = 29;
  1423. else if (clock >= F_CPU / 30) div = 30;
  1424. else if (clock >= F_CPU / 31) div = 31;
  1425. else if (clock >= F_CPU / 32) div = 32;
  1426. else if (clock >= F_CPU / 33) div = 33;
  1427. else if (clock >= F_CPU / 34) div = 34;
  1428. else if (clock >= F_CPU / 35) div = 35;
  1429. else if (clock >= F_CPU / 36) div = 36;
  1430. else if (clock >= F_CPU / 37) div = 37;
  1431. else if (clock >= F_CPU / 38) div = 38;
  1432. else if (clock >= F_CPU / 39) div = 39;
  1433. else if (clock >= F_CPU / 40) div = 40;
  1434. else if (clock >= F_CPU / 41) div = 41;
  1435. else if (clock >= F_CPU / 42) div = 42;
  1436. else if (clock >= F_CPU / 43) div = 43;
  1437. else if (clock >= F_CPU / 44) div = 44;
  1438. else if (clock >= F_CPU / 45) div = 45;
  1439. else if (clock >= F_CPU / 46) div = 46;
  1440. else if (clock >= F_CPU / 47) div = 47;
  1441. else if (clock >= F_CPU / 48) div = 48;
  1442. else if (clock >= F_CPU / 49) div = 49;
  1443. else if (clock >= F_CPU / 50) div = 50;
  1444. else if (clock >= F_CPU / 51) div = 51;
  1445. else if (clock >= F_CPU / 52) div = 52;
  1446. else if (clock >= F_CPU / 53) div = 53;
  1447. else if (clock >= F_CPU / 54) div = 54;
  1448. else if (clock >= F_CPU / 55) div = 55;
  1449. else if (clock >= F_CPU / 56) div = 56;
  1450. else if (clock >= F_CPU / 57) div = 57;
  1451. else if (clock >= F_CPU / 58) div = 58;
  1452. else if (clock >= F_CPU / 59) div = 59;
  1453. else if (clock >= F_CPU / 60) div = 60;
  1454. else if (clock >= F_CPU / 61) div = 61;
  1455. else if (clock >= F_CPU / 62) div = 62;
  1456. else if (clock >= F_CPU / 63) div = 63;
  1457. else if (clock >= F_CPU / 64) div = 64;
  1458. else if (clock >= F_CPU / 65) div = 65;
  1459. else if (clock >= F_CPU / 66) div = 66;
  1460. else if (clock >= F_CPU / 67) div = 67;
  1461. else if (clock >= F_CPU / 68) div = 68;
  1462. else if (clock >= F_CPU / 69) div = 69;
  1463. else if (clock >= F_CPU / 70) div = 70;
  1464. else if (clock >= F_CPU / 71) div = 71;
  1465. else if (clock >= F_CPU / 72) div = 72;
  1466. else if (clock >= F_CPU / 73) div = 73;
  1467. else if (clock >= F_CPU / 74) div = 74;
  1468. else if (clock >= F_CPU / 75) div = 75;
  1469. else if (clock >= F_CPU / 76) div = 76;
  1470. else if (clock >= F_CPU / 77) div = 77;
  1471. else if (clock >= F_CPU / 78) div = 78;
  1472. else if (clock >= F_CPU / 79) div = 79;
  1473. else if (clock >= F_CPU / 80) div = 80;
  1474. else if (clock >= F_CPU / 81) div = 81;
  1475. else if (clock >= F_CPU / 82) div = 82;
  1476. else if (clock >= F_CPU / 83) div = 83;
  1477. else if (clock >= F_CPU / 84) div = 84;
  1478. else if (clock >= F_CPU / 85) div = 85;
  1479. else if (clock >= F_CPU / 86) div = 86;
  1480. else if (clock >= F_CPU / 87) div = 87;
  1481. else if (clock >= F_CPU / 88) div = 88;
  1482. else if (clock >= F_CPU / 89) div = 89;
  1483. else if (clock >= F_CPU / 90) div = 90;
  1484. else if (clock >= F_CPU / 91) div = 91;
  1485. else if (clock >= F_CPU / 92) div = 92;
  1486. else if (clock >= F_CPU / 93) div = 93;
  1487. else if (clock >= F_CPU / 94) div = 94;
  1488. else if (clock >= F_CPU / 95) div = 95;
  1489. else if (clock >= F_CPU / 96) div = 96;
  1490. else if (clock >= F_CPU / 97) div = 97;
  1491. else if (clock >= F_CPU / 98) div = 98;
  1492. else if (clock >= F_CPU / 99) div = 99;
  1493. else if (clock >= F_CPU / 100) div = 100;
  1494. else if (clock >= F_CPU / 101) div = 101;
  1495. else if (clock >= F_CPU / 102) div = 102;
  1496. else if (clock >= F_CPU / 103) div = 103;
  1497. else if (clock >= F_CPU / 104) div = 104;
  1498. else if (clock >= F_CPU / 105) div = 105;
  1499. else if (clock >= F_CPU / 106) div = 106;
  1500. else if (clock >= F_CPU / 107) div = 107;
  1501. else if (clock >= F_CPU / 108) div = 108;
  1502. else if (clock >= F_CPU / 109) div = 109;
  1503. else if (clock >= F_CPU / 110) div = 110;
  1504. else if (clock >= F_CPU / 111) div = 111;
  1505. else if (clock >= F_CPU / 112) div = 112;
  1506. else if (clock >= F_CPU / 113) div = 113;
  1507. else if (clock >= F_CPU / 114) div = 114;
  1508. else if (clock >= F_CPU / 115) div = 115;
  1509. else if (clock >= F_CPU / 116) div = 116;
  1510. else if (clock >= F_CPU / 117) div = 117;
  1511. else if (clock >= F_CPU / 118) div = 118;
  1512. else if (clock >= F_CPU / 119) div = 119;
  1513. else if (clock >= F_CPU / 120) div = 120;
  1514. else if (clock >= F_CPU / 121) div = 121;
  1515. else if (clock >= F_CPU / 122) div = 122;
  1516. else if (clock >= F_CPU / 123) div = 123;
  1517. else if (clock >= F_CPU / 124) div = 124;
  1518. else if (clock >= F_CPU / 125) div = 125;
  1519. else if (clock >= F_CPU / 126) div = 126;
  1520. else if (clock >= F_CPU / 127) div = 127;
  1521. else if (clock >= F_CPU / 128) div = 128;
  1522. else if (clock >= F_CPU / 129) div = 129;
  1523. else if (clock >= F_CPU / 130) div = 130;
  1524. else if (clock >= F_CPU / 131) div = 131;
  1525. else if (clock >= F_CPU / 132) div = 132;
  1526. else if (clock >= F_CPU / 133) div = 133;
  1527. else if (clock >= F_CPU / 134) div = 134;
  1528. else if (clock >= F_CPU / 135) div = 135;
  1529. else if (clock >= F_CPU / 136) div = 136;
  1530. else if (clock >= F_CPU / 137) div = 137;
  1531. else if (clock >= F_CPU / 138) div = 138;
  1532. else if (clock >= F_CPU / 139) div = 139;
  1533. else if (clock >= F_CPU / 140) div = 140;
  1534. else if (clock >= F_CPU / 141) div = 141;
  1535. else if (clock >= F_CPU / 142) div = 142;
  1536. else if (clock >= F_CPU / 143) div = 143;
  1537. else if (clock >= F_CPU / 144) div = 144;
  1538. else if (clock >= F_CPU / 145) div = 145;
  1539. else if (clock >= F_CPU / 146) div = 146;
  1540. else if (clock >= F_CPU / 147) div = 147;
  1541. else if (clock >= F_CPU / 148) div = 148;
  1542. else if (clock >= F_CPU / 149) div = 149;
  1543. else if (clock >= F_CPU / 150) div = 150;
  1544. else if (clock >= F_CPU / 151) div = 151;
  1545. else if (clock >= F_CPU / 152) div = 152;
  1546. else if (clock >= F_CPU / 153) div = 153;
  1547. else if (clock >= F_CPU / 154) div = 154;
  1548. else if (clock >= F_CPU / 155) div = 155;
  1549. else if (clock >= F_CPU / 156) div = 156;
  1550. else if (clock >= F_CPU / 157) div = 157;
  1551. else if (clock >= F_CPU / 158) div = 158;
  1552. else if (clock >= F_CPU / 159) div = 159;
  1553. else if (clock >= F_CPU / 160) div = 160;
  1554. else if (clock >= F_CPU / 161) div = 161;
  1555. else if (clock >= F_CPU / 162) div = 162;
  1556. else if (clock >= F_CPU / 163) div = 163;
  1557. else if (clock >= F_CPU / 164) div = 164;
  1558. else if (clock >= F_CPU / 165) div = 165;
  1559. else if (clock >= F_CPU / 166) div = 166;
  1560. else if (clock >= F_CPU / 167) div = 167;
  1561. else if (clock >= F_CPU / 168) div = 168;
  1562. else if (clock >= F_CPU / 169) div = 169;
  1563. else if (clock >= F_CPU / 170) div = 170;
  1564. else if (clock >= F_CPU / 171) div = 171;
  1565. else if (clock >= F_CPU / 172) div = 172;
  1566. else if (clock >= F_CPU / 173) div = 173;
  1567. else if (clock >= F_CPU / 174) div = 174;
  1568. else if (clock >= F_CPU / 175) div = 175;
  1569. else if (clock >= F_CPU / 176) div = 176;
  1570. else if (clock >= F_CPU / 177) div = 177;
  1571. else if (clock >= F_CPU / 178) div = 178;
  1572. else if (clock >= F_CPU / 179) div = 179;
  1573. else if (clock >= F_CPU / 180) div = 180;
  1574. else if (clock >= F_CPU / 181) div = 181;
  1575. else if (clock >= F_CPU / 182) div = 182;
  1576. else if (clock >= F_CPU / 183) div = 183;
  1577. else if (clock >= F_CPU / 184) div = 184;
  1578. else if (clock >= F_CPU / 185) div = 185;
  1579. else if (clock >= F_CPU / 186) div = 186;
  1580. else if (clock >= F_CPU / 187) div = 187;
  1581. else if (clock >= F_CPU / 188) div = 188;
  1582. else if (clock >= F_CPU / 189) div = 189;
  1583. else if (clock >= F_CPU / 190) div = 190;
  1584. else if (clock >= F_CPU / 191) div = 191;
  1585. else if (clock >= F_CPU / 192) div = 192;
  1586. else if (clock >= F_CPU / 193) div = 193;
  1587. else if (clock >= F_CPU / 194) div = 194;
  1588. else if (clock >= F_CPU / 195) div = 195;
  1589. else if (clock >= F_CPU / 196) div = 196;
  1590. else if (clock >= F_CPU / 197) div = 197;
  1591. else if (clock >= F_CPU / 198) div = 198;
  1592. else if (clock >= F_CPU / 199) div = 199;
  1593. else if (clock >= F_CPU / 200) div = 200;
  1594. else if (clock >= F_CPU / 201) div = 201;
  1595. else if (clock >= F_CPU / 202) div = 202;
  1596. else if (clock >= F_CPU / 203) div = 203;
  1597. else if (clock >= F_CPU / 204) div = 204;
  1598. else if (clock >= F_CPU / 205) div = 205;
  1599. else if (clock >= F_CPU / 206) div = 206;
  1600. else if (clock >= F_CPU / 207) div = 207;
  1601. else if (clock >= F_CPU / 208) div = 208;
  1602. else if (clock >= F_CPU / 209) div = 209;
  1603. else if (clock >= F_CPU / 210) div = 210;
  1604. else if (clock >= F_CPU / 211) div = 211;
  1605. else if (clock >= F_CPU / 212) div = 212;
  1606. else if (clock >= F_CPU / 213) div = 213;
  1607. else if (clock >= F_CPU / 214) div = 214;
  1608. else if (clock >= F_CPU / 215) div = 215;
  1609. else if (clock >= F_CPU / 216) div = 216;
  1610. else if (clock >= F_CPU / 217) div = 217;
  1611. else if (clock >= F_CPU / 218) div = 218;
  1612. else if (clock >= F_CPU / 219) div = 219;
  1613. else if (clock >= F_CPU / 220) div = 220;
  1614. else if (clock >= F_CPU / 221) div = 221;
  1615. else if (clock >= F_CPU / 222) div = 222;
  1616. else if (clock >= F_CPU / 223) div = 223;
  1617. else if (clock >= F_CPU / 224) div = 224;
  1618. else if (clock >= F_CPU / 225) div = 225;
  1619. else if (clock >= F_CPU / 226) div = 226;
  1620. else if (clock >= F_CPU / 227) div = 227;
  1621. else if (clock >= F_CPU / 228) div = 228;
  1622. else if (clock >= F_CPU / 229) div = 229;
  1623. else if (clock >= F_CPU / 230) div = 230;
  1624. else if (clock >= F_CPU / 231) div = 231;
  1625. else if (clock >= F_CPU / 232) div = 232;
  1626. else if (clock >= F_CPU / 233) div = 233;
  1627. else if (clock >= F_CPU / 234) div = 234;
  1628. else if (clock >= F_CPU / 235) div = 235;
  1629. else if (clock >= F_CPU / 236) div = 236;
  1630. else if (clock >= F_CPU / 237) div = 237;
  1631. else if (clock >= F_CPU / 238) div = 238;
  1632. else if (clock >= F_CPU / 239) div = 239;
  1633. else if (clock >= F_CPU / 240) div = 240;
  1634. else if (clock >= F_CPU / 241) div = 241;
  1635. else if (clock >= F_CPU / 242) div = 242;
  1636. else if (clock >= F_CPU / 243) div = 243;
  1637. else if (clock >= F_CPU / 244) div = 244;
  1638. else if (clock >= F_CPU / 245) div = 245;
  1639. else if (clock >= F_CPU / 246) div = 246;
  1640. else if (clock >= F_CPU / 247) div = 247;
  1641. else if (clock >= F_CPU / 248) div = 248;
  1642. else if (clock >= F_CPU / 249) div = 249;
  1643. else if (clock >= F_CPU / 250) div = 250;
  1644. else if (clock >= F_CPU / 251) div = 251;
  1645. else if (clock >= F_CPU / 252) div = 252;
  1646. else if (clock >= F_CPU / 253) div = 253;
  1647. else if (clock >= F_CPU / 254) div = 254;
  1648. else /* clock >= F_CPU / 255 */ div = 255;
  1649. /*
  1650. #! /usr/bin/perl
  1651. for ($i=2; $i<256; $i++) {
  1652. printf "\t\t\telse if (clock >= F_CPU / %3d) div = %3d;\n", $i, $i;
  1653. }
  1654. */
  1655. } else {
  1656. for (div=2; div<255; div++) {
  1657. if (clock >= F_CPU / div) break;
  1658. }
  1659. }
  1660. config = (dataMode & 3) | SPI_CSR_CSAAT | SPI_CSR_SCBR(div) | SPI_CSR_DLYBCT(1);
  1661. }
  1662. uint32_t config;
  1663. BitOrder border;
  1664. friend class SPIClass;
  1665. };
  1666. class SPIClass {
  1667. public:
  1668. SPIClass(Spi *_spi, uint32_t _id, void(*_initCb)(void));
  1669. byte transfer(uint8_t _data, SPITransferMode _mode = SPI_LAST) { return transfer(BOARD_SPI_DEFAULT_SS, _data, _mode); }
  1670. byte transfer(byte _channel, uint8_t _data, SPITransferMode _mode = SPI_LAST);
  1671. // Transaction Functions
  1672. void usingInterrupt(uint8_t interruptNumber);
  1673. void beginTransaction(uint8_t pin, SPISettings settings);
  1674. void beginTransaction(SPISettings settings) {
  1675. beginTransaction(BOARD_SPI_DEFAULT_SS, settings);
  1676. }
  1677. void endTransaction(void);
  1678. // SPI Configuration methods
  1679. void attachInterrupt(void);
  1680. void detachInterrupt(void);
  1681. void begin(void);
  1682. void end(void);
  1683. // Attach/Detach pin to/from SPI controller
  1684. void begin(uint8_t _pin);
  1685. void end(uint8_t _pin);
  1686. // These methods sets a parameter on a single pin
  1687. void setBitOrder(uint8_t _pin, BitOrder);
  1688. void setDataMode(uint8_t _pin, uint8_t);
  1689. void setClockDivider(uint8_t _pin, uint8_t);
  1690. // These methods sets the same parameters but on default pin BOARD_SPI_DEFAULT_SS
  1691. void setBitOrder(BitOrder _order) { setBitOrder(BOARD_SPI_DEFAULT_SS, _order); };
  1692. void setDataMode(uint8_t _mode) { setDataMode(BOARD_SPI_DEFAULT_SS, _mode); };
  1693. void setClockDivider(uint8_t _div) { setClockDivider(BOARD_SPI_DEFAULT_SS, _div); };
  1694. private:
  1695. void init();
  1696. Spi *spi;
  1697. uint32_t id;
  1698. BitOrder bitOrder[SPI_CHANNELS_NUM];
  1699. uint32_t divider[SPI_CHANNELS_NUM];
  1700. uint32_t mode[SPI_CHANNELS_NUM];
  1701. void (*initCb)(void);
  1702. bool initialized;
  1703. uint8_t interruptMode; // 0=none, 1=mask, 2=global
  1704. uint8_t interruptMask; // bits 0:3=pin change
  1705. uint8_t interruptSave; // temp storage, to restore state
  1706. };
  1707. #endif
  1708. extern SPIClass SPI;
  1709. #if defined(__arm__) && defined(TEENSYDUINO) && defined(KINETISL)
  1710. extern SPI1Class SPI1;
  1711. #endif
  1712. #if defined(__MK64FX512__) || defined(__MK66FX1M0__)
  1713. extern SPI1Class SPI1;
  1714. #endif
  1715. #endif