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  1. #include <stdint.h>
  2. typedef struct Device_struct Device_t;
  3. typedef struct Pipe_struct Pipe_t;
  4. typedef struct Transfer_struct Transfer_t;
  5. typedef union {
  6. struct {
  7. union {
  8. struct {
  9. uint8_t bmRequestType;
  10. uint8_t bRequest;
  11. };
  12. uint16_t wRequestAndType;
  13. };
  14. uint16_t wValue;
  15. uint16_t wIndex;
  16. uint16_t wLength;
  17. };
  18. struct {
  19. uint32_t word1;
  20. uint32_t word2;
  21. };
  22. } setup_t;
  23. struct Device_struct {
  24. Pipe_t *control_pipe;
  25. Device_t *next;
  26. setup_t setup;
  27. uint8_t speed; // 0=12, 1=1.5, 2=480 Mbit/sec
  28. uint8_t address;
  29. uint8_t hub_address;
  30. uint8_t hub_port;
  31. };
  32. struct Pipe_struct {
  33. // Queue Head (QH), EHCI page 46-50
  34. struct { // must be aligned to 32 byte boundary
  35. volatile uint32_t horizontal_link;
  36. volatile uint32_t capabilities[2];
  37. volatile uint32_t current;
  38. volatile uint32_t next;
  39. volatile uint32_t alt_next;
  40. volatile uint32_t token;
  41. volatile uint32_t buffer[5];
  42. } qh;
  43. Device_t *device;
  44. uint8_t type; // 0=control, 1=isochronous, 2=bulk, 3=interrupt
  45. uint8_t direction; // 0=out, 1=in
  46. uint8_t active;
  47. //uint8_t endpoint; // 0 to 15
  48. //uint8_t data01; // next packet DATA0 or DATA1
  49. uint8_t unusedbyte[1];
  50. uint32_t unused[2];
  51. };
  52. struct Transfer_struct {
  53. // Queue Element Transfer Descriptor (qTD), EHCI pg 40-45
  54. struct { // must be aligned to 32 byte boundary
  55. volatile uint32_t next;
  56. volatile uint32_t alt_next;
  57. volatile uint32_t token;
  58. volatile uint32_t buffer[5];
  59. } qtd;
  60. Pipe_t *pipe;
  61. void *callback;
  62. void *callback_arg;
  63. uint32_t unused[5];
  64. };
  65. #if 0
  66. #define EHCI_QH_CAPABILITIES1( \
  67. nak_count_reload, \
  68. control_endpoint_flag, \
  69. max_packet_length, \
  70. head_of_list, \
  71. data_toggle_control, \
  72. speed, \
  73. endpoint_number, \
  74. inactivate, \
  75. address) \
  76. ( ((nak_count_reload) << 28) | \
  77. ((control_endpoint_flag) << 27) | \
  78. ((max_packet_length) << 16) | \
  79. ((head_of_list) << 15) | \
  80. ((data_toggle_control) << 14) | \
  81. ((speed) << 12) | \
  82. ((endpoint_number) << 8) | \
  83. ((inactivate) << 7) | \
  84. ((address) << 0) )
  85. #define EHCI_QH_CAPABILITIES2( \
  86. high_bw_mult, \
  87. hub_port_number, \
  88. hub_address, \
  89. split_completion_mask, \
  90. interrupt_schedule_mask) \
  91. ( ((high_bw_mult) << 30) | \
  92. ((hub_port_number) << 23) | \
  93. ((hub_address) << 16) | \
  94. ((split_completion_mask) << 8) | \
  95. ((interrupt_schedule_mask) << 0) )
  96. #endif
  97. Device_t * allocate_Device(void);
  98. void free_Device(Device_t *q);
  99. Pipe_t * allocate_Pipe(void);
  100. void free_Pipe(Pipe_t *q);
  101. Transfer_t * allocate_Transfer(void);
  102. void free_Transfer(Transfer_t *q);