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  1. /* USB EHCI Host for Teensy 3.6
  2. * Copyright 2017 Paul Stoffregen (paul@pjrc.com)
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the
  6. * "Software"), to deal in the Software without restriction, including
  7. * without limitation the rights to use, copy, modify, merge, publish,
  8. * distribute, sublicense, and/or sell copies of the Software, and to
  9. * permit persons to whom the Software is furnished to do so, subject to
  10. * the following conditions:
  11. *
  12. * The above copyright notice and this permission notice shall be included
  13. * in all copies or substantial portions of the Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  16. * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  18. * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
  19. * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  20. * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  21. * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  22. *
  23. * Note: special thanks to the Linux kernel for the CH341's method of operation, particularly how the baud rate is encoded.
  24. */
  25. #include <Arduino.h>
  26. #include "USBHost_t36.h" // Read this header first for key info
  27. #define print USBHost::print_
  28. #define println USBHost::println_
  29. //#define ENABLE_DEBUG_PINS
  30. #ifdef ENABLE_DEBUG_PINS
  31. #define debugDigitalToggle(pin) {digitalWriteFast(pin, !digitalReadFast(pin));}
  32. #define debugDigitalWrite(pin, state) {digitalWriteFast(pin, state);}
  33. #else
  34. #define debugDigitalToggle(pin) {;}
  35. #define debugDigitalWrite(pin, state) {;}
  36. #endif
  37. /************************************************************/
  38. // Define mapping VID/PID - to Serial Device type.
  39. /************************************************************/
  40. USBSerial::product_vendor_mapping_t USBSerial::pid_vid_mapping[] = {
  41. // FTDI mappings.
  42. {0x0403, 0x6001, USBSerial::FTDI},
  43. // PL2303
  44. {0x67B,0x2303, USBSerial::PL2303},
  45. // CH341
  46. {0x4348, 0x5523, USBSerial::CH341 },
  47. {0x1a86, 0x7523, USBSerial::CH341 },
  48. {0x1a86, 0x5523, USBSerial::CH341 },
  49. // Silex CP210...
  50. {0x10c4, 0xea60, USBSerial::CP210X }
  51. };
  52. /************************************************************/
  53. // Initialization and claiming of devices & interfaces
  54. /************************************************************/
  55. void USBSerial::init()
  56. {
  57. contribute_Pipes(mypipes, sizeof(mypipes)/sizeof(Pipe_t));
  58. contribute_Transfers(mytransfers, sizeof(mytransfers)/sizeof(Transfer_t));
  59. contribute_String_Buffers(mystring_bufs, sizeof(mystring_bufs)/sizeof(strbuf_t));
  60. driver_ready_for_device(this);
  61. format_ = USBHOST_SERIAL_8N1;
  62. }
  63. bool USBSerial::claim(Device_t *dev, int type, const uint8_t *descriptors, uint32_t len)
  64. {
  65. // only claim at interface level
  66. println("USBSerial claim this=", (uint32_t)this, HEX);
  67. print("vid=", dev->idVendor, HEX);
  68. print(", pid=", dev->idProduct, HEX);
  69. print(", bDeviceClass = ", dev->bDeviceClass);
  70. print(", bDeviceSubClass = ", dev->bDeviceSubClass);
  71. println(", bDeviceProtocol = ", dev->bDeviceProtocol);
  72. print_hexbytes(descriptors, len);
  73. if (type == 0) {
  74. //---------------------------------------------------------------------
  75. // CDCACM
  76. if ((dev->bDeviceClass == 2) && (dev->bDeviceSubClass == 0)) {
  77. // It is a communication device see if we can extract the data...
  78. // Try some ttyACM types?
  79. // This code may be similar to MIDI code.
  80. // But first pass see if we can simply look at the interface...
  81. // Lets walk through end points and see if we
  82. // can find an RX and TX bulk transfer end point.
  83. // 0 1 2 3 4 5 6 7 8 *9 10 1 2 3 *4 5 6 7 *8 9 20 1 2 *3 4 5 6 7 8 9*30 1 2 3 4 5 6 7 8 *9 40 1 2 3 4 5 *6 7 8 9 50 1 2
  84. // USB2AX
  85. //09 04 00 00 01 02 02 01 00 05 24 00 10 01 04 24 02 06 05 24 06 00 01 07 05 82 03 08 00 FF 09 04 01 00 02 0A 00 00 00 07 05 04 02 10 00 01 07 05 83 02 10 00 01
  86. //09 04 01 00 02 0A 00 00 00 07 05 04 02 10 00 01 07 05 83 02 10 00 01
  87. // Teensy 3.6
  88. //09 04 00 00 01 02 02 01 00 05 24 00 10 01 05 24 01 01 01 04 24 02 06 05 24 06 00 01 07 05 82 03 10 00 40 09 04 01 00 02 0A 00 00 00 07 05 03 02 40 00 00 07 05 84 02 40 00 00
  89. //09 04 01 00 02 0A 00 00 00 07 05 03 02 40 00 00 07 05 84 02 40 00 00
  90. const uint8_t *p = descriptors;
  91. const uint8_t *end = p + len;
  92. if (p[0] != 9 || p[1] != 4) return false; // interface descriptor
  93. //println(" bInterfaceClass=", p[5]);
  94. //println(" bInterfaceSubClass=", p[6]);
  95. if (p[5] != 2) return false; // bInterfaceClass: 2 Communications
  96. if (p[6] != 2) return false; // bInterfaceSubClass: 2 serial
  97. p += 9;
  98. println(" Interface is Serial");
  99. uint8_t rx_ep = 0;
  100. uint8_t tx_ep = 0;
  101. uint16_t rx_size = 0;
  102. uint16_t tx_size = 0;
  103. interface = 0; // clear out any interface numbers passed in.
  104. while (p < end) {
  105. len = *p;
  106. if (len < 4) return false;
  107. if (p + len > end) return false; // reject if beyond end of data
  108. uint32_t type = p[1];
  109. //println("type: ", type);
  110. // Unlike Audio, we need to look at Interface as our endpoints are after them...
  111. if (type == 4 ) { // Interface - lets remember it's number...
  112. interface = p[2];
  113. println(" Interface: ", interface);
  114. }
  115. else if (type == 0x24) { // 0x24 = CS_INTERFACE,
  116. uint32_t subtype = p[2];
  117. print(" CS_INTERFACE - subtype: ", subtype);
  118. if (len >= 4) print(" ", p[3], HEX);
  119. if (len >= 5) print(" ", p[4], HEX);
  120. if (len >= 6) print(" ", p[5], HEX);
  121. switch (subtype) {
  122. case 0: println(" - Header Functional Descriptor"); break;
  123. case 1: println(" - Call Management Functional"); break;
  124. case 2: println(" - Abstract Control Management"); break;
  125. case 4: println(" - Telephone Ringer"); break;
  126. case 6: println(" - union Functional"); break;
  127. default: println(" - ??? other"); break;
  128. }
  129. // First pass ignore...
  130. } else if (type == 5) {
  131. // endpoint descriptor
  132. if (p[0] < 7) return false; // at least 7 bytes
  133. if (p[3] == 2) { // First try ignore the first one which is interrupt...
  134. println(" Endpoint: ", p[2], HEX);
  135. switch (p[2] & 0xF0) {
  136. case 0x80:
  137. // IN endpoint
  138. if (rx_ep == 0) {
  139. rx_ep = p[2] & 0x0F;
  140. rx_size = p[4] | (p[5] << 8);
  141. println(" rx_size = ", rx_size);
  142. }
  143. break;
  144. case 0x00:
  145. // OUT endpoint
  146. if (tx_ep == 0) {
  147. tx_ep = p[2];
  148. tx_size = p[4] | (p[5] << 8);
  149. println(" tx_size = ", tx_size);
  150. }
  151. break;
  152. default:
  153. println(" invalid end point: ", p[2]);
  154. return false;
  155. }
  156. }
  157. } else {
  158. println(" Unknown type: ", type);
  159. return false; // unknown
  160. }
  161. p += len;
  162. }
  163. print(" exited loop rx:", rx_ep);
  164. println(", tx:", tx_ep);
  165. if (!rx_ep || !tx_ep) return false; // did not get our two end points
  166. if (!init_buffers(rx_size, tx_size)) return false;
  167. println(" rx buffer size:", rxsize);
  168. println(" tx buffer size:", txsize);
  169. rxpipe = new_Pipe(dev, 2, rx_ep & 15, 1, rx_size);
  170. if (!rxpipe) return false;
  171. txpipe = new_Pipe(dev, 2, tx_ep, 0, tx_size);
  172. if (!txpipe) {
  173. // TODO: free rxpipe
  174. return false;
  175. }
  176. sertype = CDCACM;
  177. rxpipe->callback_function = rx_callback;
  178. queue_Data_Transfer(rxpipe, rx1, (rx_size < 64)? rx_size : 64, this);
  179. rxstate = 1;
  180. if (rx_size > 128) {
  181. queue_Data_Transfer(rxpipe, rx2, rx_size, this);
  182. rxstate = 3;
  183. }
  184. txstate = 0;
  185. txpipe->callback_function = tx_callback;
  186. baudrate = 115200;
  187. // Wish I could just call Control to do the output... Maybe can defer until the user calls begin()
  188. // control requires that device is setup which is not until this call completes...
  189. println("Control - CDCACM DTR...");
  190. // Need to setup the data the line coding data
  191. mk_setup(setup, 0x21, 0x22, 3, 0, 0);
  192. queue_Control_Transfer(dev, &setup, NULL, this);
  193. control_queued = true;
  194. pending_control = 0x0; // Maybe don't need to do...
  195. return true;
  196. }
  197. // See if the vendor_id:product_id is in our list of products.
  198. sertype = UNKNOWN;
  199. for (uint8_t i = 0; i < (sizeof(pid_vid_mapping)/sizeof(pid_vid_mapping[0])); i++) {
  200. if ((dev->idVendor == pid_vid_mapping[i].idVendor) && (dev->idProduct == pid_vid_mapping[i].idProduct)) {
  201. sertype = pid_vid_mapping[i].sertype;
  202. break;
  203. }
  204. }
  205. if (sertype == UNKNOWN) return false; // not one of ours
  206. // Lets try to locate the end points. Code is common across these devices
  207. println("len = ", len);
  208. uint8_t count_end_points = descriptors[4];
  209. if (count_end_points < 2) return false; // not enough end points
  210. if (len < 23) return false;
  211. if (descriptors[0] != 9) return false; // length 9
  212. // Lets walk through end points and see if we
  213. // can find an RX and TX bulk transfer end point.
  214. //Example vid=67B, pid=2303
  215. // 0 1 2 3 4 5 6 7 8 9 10 1 2 3 4 5 6 7 8 9 20 1 2 3 4 5 6 7 8 9
  216. //09 04 00 00 03 FF 00 00 00 07 05 81 03 0A 00 01 07 05 02 02 40 00 00 07 05 83 02 40 00 00
  217. uint32_t rxep = 0;
  218. uint32_t txep = 0;
  219. uint16_t rx_size = 0;
  220. uint16_t tx_size = 0;
  221. uint32_t descriptor_index = 9;
  222. while (count_end_points-- && ((rxep == 0) || txep == 0)) {
  223. if (descriptors[descriptor_index] != 7) return false; // length 7
  224. if (descriptors[descriptor_index+1] != 5) return false; // ep desc
  225. if ((descriptors[descriptor_index+3] == 2)
  226. && (descriptors[descriptor_index+4] <= 64)
  227. && (descriptors[descriptor_index+5] == 0)) {
  228. // have a bulk EP size
  229. if (descriptors[descriptor_index+2] & 0x80 ) {
  230. rxep = descriptors[descriptor_index+2];
  231. rx_size = descriptors[descriptor_index+4];
  232. } else {
  233. txep = descriptors[descriptor_index+2];
  234. tx_size = descriptors[descriptor_index+4];
  235. }
  236. }
  237. descriptor_index += 7; // setup to look at next one...
  238. }
  239. // Try to verify the end points.
  240. if (!check_rxtx_ep(rxep, txep)) return false;
  241. print("USBSerial, rxep=", rxep & 15);
  242. print("(", rx_size);
  243. print("), txep=", txep);
  244. print("(", tx_size);
  245. println(")");
  246. if (!init_buffers(rx_size, tx_size)) return false;
  247. println(" rx buffer size:", rxsize);
  248. println(" tx buffer size:", txsize);
  249. rxpipe = new_Pipe(dev, 2, rxep & 15, 1, rx_size);
  250. if (!rxpipe) return false;
  251. txpipe = new_Pipe(dev, 2, txep, 0, tx_size);
  252. if (!txpipe) {
  253. //free_Pipe(rxpipe);
  254. return false;
  255. }
  256. rxpipe->callback_function = rx_callback;
  257. queue_Data_Transfer(rxpipe, rx1, rx_size, this);
  258. rxstate = 1;
  259. txstate = 0;
  260. txpipe->callback_function = tx_callback;
  261. baudrate = 115200;
  262. // Now do specific setup per type
  263. switch (sertype) {
  264. //---------------------------------------------------------------------
  265. // FTDI
  266. case FTDI:
  267. {
  268. pending_control = 0x0F;
  269. mk_setup(setup, 0x40, 0, 0, 0, 0); // reset port
  270. queue_Control_Transfer(dev, &setup, NULL, this);
  271. control_queued = true;
  272. return true;
  273. }
  274. //------------------------------------------------------------------------
  275. // Prolific
  276. // TODO: Note: there are probably more vendor/product pairs.. Maybe should create table of them
  277. case PL2303:
  278. {
  279. // First attempt keep it simple...
  280. println("PL2303: readRegister(0x04)");
  281. // Need to setup the data the line coding data
  282. mk_setup(setup, 0xC0, 0x1, 0x8484, 0, 1);
  283. queue_Control_Transfer(dev, &setup, setupdata, this);
  284. control_queued = true;
  285. setup_state = 1; // We are at step one of setup...
  286. pending_control = 0x3f;
  287. return true;
  288. }
  289. //------------------------------------------------------------------------
  290. // CH341
  291. case CH341:
  292. {
  293. println("CH341: 0xC0, 0x5f, 0, 0, 8");
  294. // Need to setup the data the line coding data
  295. mk_setup(setup, 0xC0, 0x5f, 0, 0, sizeof(setupdata));
  296. queue_Control_Transfer(dev, &setup, setupdata, this);
  297. control_queued = true;
  298. setup_state = 1; // We are at step one of setup...
  299. pending_control = 0x7f;
  300. return true;
  301. }
  302. //------------------------------------------------------------------------
  303. // CP210X
  304. case CP210X:
  305. {
  306. println("CP210X: 0x41, 0x11, 0, 0, 0 - reset port");
  307. // Need to setup the data the line coding data
  308. mk_setup(setup, 0x41, 0x11, 0, 0, 0);
  309. queue_Control_Transfer(dev, &setup, NULL, this);
  310. control_queued = true;
  311. setup_state = 1; // We are at step one of setup...
  312. pending_control = 0xf;
  313. return true;
  314. }
  315. //------------------------------------------------------------------------
  316. // PID:VID - not in our product list.
  317. default:
  318. return false;
  319. }
  320. } else if (type != 1) return false;
  321. // TTYACM: <Composit device>
  322. //
  323. // We first tried to claim a simple ttyACM device like a teensy who is configured
  324. // only as Serial at the device level like what was done for midi
  325. //
  326. // However some devices are a compisit of multiple Interfaces, so see if this Interface
  327. // is of the CDC Interface class and 0 for SubClass and protocol
  328. // Todo: some of this can maybe be combined with the Whole device code above.
  329. if (descriptors[0] != 9 || descriptors[1] != 4) return false; // interface descriptor
  330. if (descriptors[4] < 2) return false; // less than 2 end points
  331. if (descriptors[5] != 0xA) return false; // bInterfaceClass, 0xa = CDC data
  332. if (descriptors[6] != 0) return false; // bInterfaceSubClass
  333. if (descriptors[7] != 0) return false; // bInterfaceProtocol
  334. if (descriptors[9] != 7) return false; // length 7
  335. if (descriptors[10] != 5) return false; // ep desc
  336. uint32_t txep = descriptors[11];
  337. uint32_t txsize = descriptors[13];
  338. if (descriptors[12] != 2) return false; // bulk type
  339. if (descriptors[13] > 64) return false; // size 64 Max
  340. if (descriptors[14] != 0) return false;
  341. if (descriptors[16] != 7) return false; // length 7
  342. if (descriptors[17] != 5) return false; // ep desc
  343. uint32_t rxep = descriptors[18];
  344. uint32_t rxsize = descriptors[20];
  345. if (descriptors[19] != 2) return false; // bulk type
  346. if (descriptors[20] > 64) return false; // size 64 Max
  347. if (descriptors[21] != 0) return false;
  348. if (!check_rxtx_ep(rxep, txep)) return false;
  349. interface = descriptors[2];
  350. print("CDC, rxep=", rxep & 15);
  351. println(", txep=", txep);
  352. if (!init_buffers(rxsize, txsize)) return false;
  353. rxpipe = new_Pipe(dev, 2, rxep & 15, 1, rxsize);
  354. if (!rxpipe) return false;
  355. txpipe = new_Pipe(dev, 2, txep, 0, txsize);
  356. if (!txpipe) {
  357. // TODO: free rxpipe
  358. return false;
  359. }
  360. sertype = CDCACM;
  361. rxpipe->callback_function = rx_callback;
  362. queue_Data_Transfer(rxpipe, rx1, 64, this);
  363. rxstate = 1;
  364. if (rxsize > 128) {
  365. queue_Data_Transfer(rxpipe, rx2, 64, this);
  366. rxstate = 3;
  367. }
  368. txstate = 0;
  369. txpipe->callback_function = tx_callback;
  370. // See if we can do just the inteface...
  371. baudrate = 115200;
  372. println("Control - CDCACM LINE_CODING");
  373. setupdata[0] = 0; // Setup baud rate 115200 - 0x1C200
  374. setupdata[1] = 0xc2;
  375. setupdata[2] = 0x1;
  376. setupdata[3] = 0;
  377. setupdata[4] = 0; // 0 - 1 stop bit, 1 - 1.5 stop bits, 2 - 2 stop bits
  378. setupdata[5] = 0; // 0 - None, 1 - Odd, 2 - Even, 3 - Mark, 4 - Space
  379. setupdata[6] = 8; // Data bits (5, 6, 7, 8 or 16)
  380. mk_setup(setup, 0x21, 0x20, 0, 0, 7);
  381. queue_Control_Transfer(dev, &setup, setupdata, this);
  382. pending_control = 0x04; // Maybe don't need to do...
  383. control_queued = true;
  384. return true;
  385. }
  386. // check if two legal endpoints, 1 receive & 1 transmit
  387. bool USBSerial::check_rxtx_ep(uint32_t &rxep, uint32_t &txep)
  388. {
  389. if ((rxep & 0x0F) == 0) return false;
  390. if ((txep & 0x0F) == 0) return false;
  391. uint32_t rxdir = rxep & 0xF0;
  392. uint32_t txdir = txep & 0xF0;
  393. if (rxdir == 0x80 && txdir == 0x00) {
  394. return true;
  395. }
  396. if (rxdir == 0x00 && txdir == 0x80) {
  397. std::swap(rxep, txep);
  398. return true;
  399. }
  400. return false;
  401. }
  402. // initialize buffer sizes and pointers
  403. bool USBSerial::init_buffers(uint32_t rsize, uint32_t tsize)
  404. {
  405. // buffer must be able to hold 2 of each packet, plus buffer
  406. // space to hold RX and TX data.
  407. if (sizeof(bigbuffer) < (rsize + tsize) * 3 + 2) return false;
  408. rx1 = (uint8_t *)bigbuffer;
  409. rx2 = rx1 + rsize;
  410. tx1 = rx2 + rsize;
  411. tx2 = tx1 + tsize;
  412. rxbuf = tx2 + tsize;
  413. // FIXME: this assume 50-50 split - not true when rsize != tsize
  414. rxsize = (sizeof(bigbuffer) - (rsize + tsize) * 2) / 2;
  415. txsize = rxsize;
  416. txbuf = rxbuf + rxsize;
  417. rxhead = 0;
  418. rxtail = 0;
  419. txhead = 0;
  420. txtail = 0;
  421. rxstate = 0;
  422. return true;
  423. }
  424. void USBSerial::disconnect()
  425. {
  426. }
  427. void USBSerial::control(const Transfer_t *transfer)
  428. {
  429. println("control callback (serial) ", pending_control, HEX);
  430. control_queued = false;
  431. // We will split this up by Serial type, maybe different functions?
  432. //-------------------------------------------------------------------------
  433. // First FTDI
  434. if (sertype == FTDI) {
  435. if (pending_control & 1) {
  436. pending_control &= ~1;
  437. // set data format
  438. uint16_t ftdi_format = format_ & 0xf; // This should give us the number of bits.
  439. // now lets extract the parity from our encoding
  440. ftdi_format |= (format_ & 0xe0) << 3; // they encode bits 9-11
  441. // See if two stop bits
  442. if (format_ & 0x100) ftdi_format |= (0x2 << 11);
  443. mk_setup(setup, 0x40, 4, ftdi_format, 0, 0); // data format 8N1
  444. queue_Control_Transfer(device, &setup, NULL, this);
  445. control_queued = true;
  446. return;
  447. }
  448. // set baud rate
  449. if (pending_control & 2) {
  450. pending_control &= ~2;
  451. uint32_t baudval = 3000000 / baudrate;
  452. mk_setup(setup, 0x40, 3, baudval, 0, 0);
  453. queue_Control_Transfer(device, &setup, NULL, this);
  454. control_queued = true;
  455. return;
  456. }
  457. // configure flow control
  458. if (pending_control & 4) {
  459. pending_control &= ~4;
  460. mk_setup(setup, 0x40, 2, 0, 1, 0);
  461. queue_Control_Transfer(device, &setup, NULL, this);
  462. control_queued = true;
  463. return;
  464. }
  465. // set DTR
  466. if (pending_control & 8) {
  467. pending_control &= ~8;
  468. mk_setup(setup, 0x40, 1, 0x0101, 0, 0);
  469. queue_Control_Transfer(device, &setup, NULL, this);
  470. control_queued = true;
  471. return;
  472. }
  473. // clear DTR
  474. if (pending_control & 0x80) {
  475. pending_control &= ~0x80;
  476. println("FTDI clear DTR");
  477. mk_setup(setup, 0x40, 1, 0x0100, 0, 0);
  478. queue_Control_Transfer(device, &setup, NULL, this);
  479. control_queued = true;
  480. return;
  481. }
  482. }
  483. //-------------------------------------------------------------------------
  484. // Now CDCACM
  485. if (sertype == CDCACM) {
  486. if (pending_control & 2) {
  487. pending_control &= ~2;
  488. // Should probably use data structure, but that may depend on byte ordering...
  489. setupdata[0] = (baudrate) & 0xff; // Setup baud rate 115200 - 0x1C200
  490. setupdata[1] = (baudrate >> 8) & 0xff;
  491. setupdata[2] = (baudrate >> 16) & 0xff;
  492. setupdata[3] = (baudrate >> 24) & 0xff;
  493. setupdata[4] = (format_ & 0x100)? 2 : 0; // 0 - 1 stop bit, 1 - 1.5 stop bits, 2 - 2 stop bits
  494. setupdata[5] = (format_ & 0xe0) >> 5; // 0 - None, 1 - Odd, 2 - Even, 3 - Mark, 4 - Space
  495. setupdata[6] = format_ & 0x1f; // Data bits (5, 6, 7, 8 or 16)
  496. print("CDCACM setup: ");
  497. print_hexbytes(&setupdata, 7);
  498. mk_setup(setup, 0x21, 0x20, 0, 0, 7);
  499. queue_Control_Transfer(device, &setup, setupdata, this);
  500. control_queued = true;
  501. return;
  502. }
  503. // configure flow control
  504. if (pending_control & 4) {
  505. pending_control &= ~4;
  506. println("Control - 0x21,0x22, 0x3");
  507. // Need to setup the data the line coding data
  508. mk_setup(setup, 0x21, 0x22, 3, 0, 0);
  509. queue_Control_Transfer(device, &setup, NULL, this);
  510. control_queued = true;
  511. return;
  512. }
  513. if (pending_control & 0x80) {
  514. pending_control &= ~0x80;
  515. println("Control - 0x21,0x22, 0x0 - clear DTR");
  516. // Need to setup the data the line coding data
  517. mk_setup(setup, 0x21, 0x22, 0, 0, 0);
  518. queue_Control_Transfer(device, &setup, NULL, this);
  519. control_queued = true;
  520. return;
  521. }
  522. }
  523. //-------------------------------------------------------------------------
  524. // Now PL2303 - Which appears to be a little more complicated
  525. if (sertype == PL2303) {
  526. if (pending_control & 1) {
  527. // Still in larger setup state mode
  528. switch (setup_state) {
  529. case 1:
  530. println("PL2303: writeRegister(0x04, 0x00)");
  531. mk_setup(setup, 0x40, 1, 0x0404, 0, 0); //
  532. queue_Control_Transfer(device, &setup, NULL, this);
  533. setup_state = 2;
  534. control_queued = true;
  535. return;
  536. case 2:
  537. println("PL2303: readRegister(0x04)");
  538. mk_setup(setup, 0xC0, 0x1, 0x8484, 0, 1);
  539. queue_Control_Transfer(device, &setup, setupdata, this);
  540. control_queued = true;
  541. setup_state = 3;
  542. return;
  543. case 3:
  544. println("PL2303: v1 = readRegister(0x03)");
  545. mk_setup(setup, 0xC0, 0x1, 0x8383, 0, 1);
  546. queue_Control_Transfer(device, &setup, setupdata, this);
  547. control_queued = true;
  548. setup_state = 4;
  549. return;
  550. case 4:
  551. println("PL2303: readRegister(0x04)");
  552. // Do we need this value long term or we could just leave in setup data?
  553. pl2303_v1 = setupdata[0]; // save the first bye of version
  554. mk_setup(setup, 0xC0, 0x1, 0x8484, 0, 1);
  555. queue_Control_Transfer(device, &setup, setupdata, this);
  556. control_queued = true;
  557. setup_state = 5;
  558. return;
  559. case 5:
  560. println("PL2303: writeRegister(0x04, 0x01)");
  561. mk_setup(setup, 0x40, 1, 0x0404, 1, 0); //
  562. queue_Control_Transfer(device, &setup, NULL, this);
  563. setup_state = 6;
  564. control_queued = true;
  565. return;
  566. case 6:
  567. println("PL2303: readRegister(0x04)");
  568. mk_setup(setup, 0xC0, 0x1, 0x8484, 0, 1);
  569. queue_Control_Transfer(device, &setup, setupdata, this);
  570. control_queued = true;
  571. setup_state = 7;
  572. return;
  573. case 7:
  574. println("PL2303: v2 = readRegister(0x03)");
  575. mk_setup(setup, 0xC0, 0x1, 0x8383, 0, 1);
  576. queue_Control_Transfer(device, &setup, setupdata, this);
  577. control_queued = true;
  578. setup_state = 8;
  579. return;
  580. case 8:
  581. pl2303_v2 = setupdata[0]; // save the first bye of version
  582. print(" PL2303 Version ", pl2303_v1, HEX);
  583. println(":", pl2303_v2, HEX);
  584. println("PL2303: writeRegister(0, 1)");
  585. mk_setup(setup, 0x40, 1, 0, 1, 0); //
  586. queue_Control_Transfer(device, &setup, NULL, this);
  587. setup_state = 9;
  588. control_queued = true;
  589. return;
  590. case 9:
  591. println("PL2303: writeRegister(1, 0)");
  592. mk_setup(setup, 0x40, 1, 1, 0, 0); //
  593. queue_Control_Transfer(device, &setup, NULL, this);
  594. setup_state = 10;
  595. control_queued = true;
  596. return;
  597. case 10:
  598. println("PL2303: writeRegister(2, 44)");
  599. mk_setup(setup, 0x40, 1, 2, 0x44, 0); //
  600. queue_Control_Transfer(device, &setup, NULL, this);
  601. setup_state = 11;
  602. control_queued = true;
  603. return;
  604. case 11:
  605. println("PL2303: writeRegister(8, 0)");
  606. mk_setup(setup, 0x40, 1, 8, 0, 0); //
  607. queue_Control_Transfer(device, &setup, NULL, this);
  608. setup_state = 12;
  609. control_queued = true;
  610. return;
  611. case 12:
  612. println("PL2303: writeRegister(9, 0)");
  613. mk_setup(setup, 0x40, 1, 9, 0, 0); //
  614. queue_Control_Transfer(device, &setup, NULL, this);
  615. setup_state = 13;
  616. control_queued = true;
  617. return;
  618. case 13:
  619. println("PL2303: Read current Baud/control");
  620. mk_setup(setup, 0xA1, 0x21, 0, 0, 7);
  621. queue_Control_Transfer(device, &setup, setupdata, this);
  622. control_queued = true;
  623. break;
  624. }
  625. pending_control &= ~1; // We are finally going to leave this list and join the rest
  626. if (control_queued) return;
  627. }
  628. // set baud rate
  629. if (pending_control & 2) {
  630. pending_control &= ~2;
  631. // See what the read returned earlier
  632. print("PL2303: Returned configuration data: ");
  633. print_hexbytes(setupdata, 7);
  634. // Should probably use data structure, but that may depend on byte ordering...
  635. setupdata[0] = (baudrate) & 0xff; // Setup baud rate 115200 - 0x1C200
  636. setupdata[1] = (baudrate >> 8) & 0xff;
  637. setupdata[2] = (baudrate >> 16) & 0xff;
  638. setupdata[3] = (baudrate >> 24) & 0xff;
  639. setupdata[4] = (format_ & 0x100)? 2 : 0; // 0 - 1 stop bit, 1 - 1.5 stop bits, 2 - 2 stop bits
  640. setupdata[5] = (format_ & 0xe0) >> 5; // 0 - None, 1 - Odd, 2 - Even, 3 - Mark, 4 - Space
  641. setupdata[6] = format_ & 0x1f; // Data bits (5, 6, 7, 8 or 16)
  642. print("PL2303: Set baud/control: ", baudrate, HEX);
  643. print(" = ");
  644. print_hexbytes(&setupdata, 7);
  645. mk_setup(setup, 0x21, 0x20, 0, 0, 7);
  646. queue_Control_Transfer(device, &setup, setupdata, this);
  647. control_queued = true;
  648. return;
  649. }
  650. if (pending_control & 4) {
  651. pending_control &= ~4;
  652. println("PL2303: writeRegister(0, 0)");
  653. mk_setup(setup, 0x40, 1, 0, 0, 0); //
  654. queue_Control_Transfer(device, &setup, NULL, this);
  655. control_queued = true;
  656. return;
  657. }
  658. if (pending_control & 8) {
  659. pending_control &= ~8;
  660. println("PL2303: Read current Baud/control");
  661. memset(setupdata, 0, sizeof(setupdata)); // clear it to see if we read it...
  662. mk_setup(setup, 0xA1, 0x21, 0, 0, 7);
  663. queue_Control_Transfer(device, &setup, setupdata, this);
  664. control_queued = true;
  665. }
  666. if (pending_control & 0x10) {
  667. pending_control &= ~0x10;
  668. print("PL2303: Returned configuration data: ");
  669. print_hexbytes(setupdata, 7);
  670. // This sets the control lines (0x1=DTR, 0x2=RTS)
  671. println("PL2303: 0x21, 0x22, 0x3");
  672. mk_setup(setup, 0x21, 0x22, 3, 0, 0); //
  673. queue_Control_Transfer(device, &setup, NULL, this);
  674. control_queued = true;
  675. return;
  676. }
  677. if (pending_control & 0x20) {
  678. pending_control &= ~0x20;
  679. println("PL2303: 0x21, 0x22, 0x3");
  680. mk_setup(setup, 0x21, 0x22, 3, 0, 0); //
  681. queue_Control_Transfer(device, &setup, NULL, this);
  682. control_queued = true;
  683. }
  684. if (pending_control & 0x80) {
  685. pending_control &= ~0x80;
  686. println("PL2303: 0x21, 0x22, 0x0"); // Clear DTR/RTS
  687. mk_setup(setup, 0x21, 0x22, 0, 0, 0); //
  688. queue_Control_Transfer(device, &setup, NULL, this);
  689. control_queued = true;
  690. }
  691. }
  692. if (sertype == CH341) {
  693. #if 0
  694. print(" Transfer: ");
  695. print_hexbytes(&transfer->setup, sizeof(setup_t));
  696. if (transfer->length) {
  697. print(" data: ");
  698. print_hexbytes(transfer->buffer, transfer->length);
  699. }
  700. #endif
  701. if (pending_control & 1) {
  702. // Still in larger setup state mode
  703. switch (setup_state) {
  704. case 1:
  705. print(" Returned: ");
  706. print_hexbytes(transfer->buffer, transfer->length);
  707. println("CH341: 40, a1, 0, 0, 0");
  708. mk_setup(setup, 0x40, 0xa1, 0, 0, 0); //
  709. queue_Control_Transfer(device, &setup, NULL, this);
  710. setup_state = 2;
  711. control_queued = true;
  712. return;
  713. case 2:
  714. ch341_setBaud(0); // send the first byte of the baud rate
  715. control_queued = true;
  716. setup_state = 3;
  717. return;
  718. case 3:
  719. ch341_setBaud(1); // send the second byte of the baud rate
  720. control_queued = true;
  721. setup_state = 4;
  722. return;
  723. case 4:
  724. println("CH341: c0, 95, 2518, 0, 8");
  725. mk_setup(setup, 0xc0, 0x95, 0x2518, 0, sizeof(setup)); //
  726. queue_Control_Transfer(device, &setup, setupdata, this);
  727. setup_state = 5;
  728. control_queued = true;
  729. return;
  730. case 5:
  731. print(" Returned: ");
  732. print_hexbytes(transfer->buffer, transfer->length);
  733. println("CH341: 40, 0x9a, 0x2518, 0x0050, 0");
  734. mk_setup(setup, 0x40, 0x9a, 0x2518, 0x0050, 0); //
  735. queue_Control_Transfer(device, &setup, NULL, this);
  736. setup_state = 6;
  737. control_queued = true;
  738. return;
  739. case 6:
  740. println("CH341: c0, 95, 0x706, 0, 8 - get status");
  741. mk_setup(setup, 0xc0, 0x95, 0x706, 0, sizeof(setup)); //
  742. queue_Control_Transfer(device, &setup, setupdata, this);
  743. setup_state = 7;
  744. control_queued = true;
  745. return;
  746. case 7:
  747. print(" Returned: ");
  748. print_hexbytes(transfer->buffer, transfer->length);
  749. println("CH341: 40, 0xa1, 0x501f, 0xd90a, 0");
  750. mk_setup(setup, 0x40, 0xa1, 0x501f, 0xd90a, 0); //
  751. queue_Control_Transfer(device, &setup, NULL, this);
  752. setup_state = 8;
  753. control_queued = true;
  754. break;
  755. }
  756. pending_control &= ~1; // We are finally going to leave this list and join the rest
  757. if (control_queued) return;
  758. }
  759. // set baud rate
  760. if (pending_control & 2) {
  761. pending_control &= ~2;
  762. ch341_setBaud(0); // send the first byte of the baud rate
  763. control_queued = true;
  764. return;
  765. }
  766. if (pending_control & 4) {
  767. pending_control &= ~4;
  768. ch341_setBaud(1); // send the first byte of the baud rate
  769. control_queued = true;
  770. return;
  771. }
  772. if (pending_control & 8) {
  773. pending_control &= ~8;
  774. uint16_t ch341_format;
  775. switch (format_) {
  776. default:
  777. // These values were observed when used on PC... Need to flush out others.
  778. case USBHOST_SERIAL_8N1: ch341_format = 0xc3; break;
  779. case USBHOST_SERIAL_7E1: ch341_format = 0xda; break;
  780. case USBHOST_SERIAL_7O1: ch341_format = 0xca; break;
  781. case USBHOST_SERIAL_8N2: ch341_format = 0xc7; break;
  782. }
  783. println("CH341: 40, 0x9a, 0x2518: ", ch341_format, HEX);
  784. mk_setup(setup, 0x40, 0x9a, 0x2518, ch341_format, 0); //
  785. queue_Control_Transfer(device, &setup, NULL, this);
  786. control_queued = true;
  787. return;
  788. }
  789. if (pending_control & 0x10) {
  790. pending_control &= ~0x10;
  791. // This is setting handshake need to figure out what...
  792. // 0x20=DTR, 0x40=RTS send ~ of values.
  793. println("CH341: 0x40, 0xa4, 0xff9f, 0, 0 - Handshake");
  794. mk_setup(setup, 0x40, 0xa4, 0xff9f, 0, 0); //
  795. queue_Control_Transfer(device, &setup, NULL, this);
  796. control_queued = true;
  797. return;
  798. }
  799. if (pending_control & 0x20) {
  800. pending_control &= ~0x20;
  801. // This is setting handshake need to figure out what...
  802. println("CH341: c0, 95, 0x706, 0, 8 - get status");
  803. mk_setup(setup, 0xc0, 0x95, 0x706, 0, sizeof(setup)); //
  804. queue_Control_Transfer(device, &setup, setupdata, this);
  805. control_queued = true;
  806. return;
  807. }
  808. if (pending_control & 0x40) {
  809. pending_control &= ~0x40;
  810. print(" Returned: ");
  811. print_hexbytes(transfer->buffer, transfer->length);
  812. println("CH341: 0x40, 0x9a, 0x2727, 0, 0");
  813. mk_setup(setup, 0x40, 0x9a, 0x2727, 0, 0); //
  814. queue_Control_Transfer(device, &setup, NULL, this);
  815. return;
  816. }
  817. if (pending_control & 0x80) {
  818. pending_control &= ~0x80;
  819. println("CH341: 0x40, 0xa4, 0xffff, 0, 0 - Handshake");
  820. mk_setup(setup, 0x40, 0xa4, 0xffff, 0, 0); //
  821. queue_Control_Transfer(device, &setup, NULL, this);
  822. control_queued = true;
  823. return;
  824. }
  825. }
  826. //-------------------------------------------------------------------------
  827. // First CP210X
  828. if (sertype == CP210X) {
  829. if (pending_control & 1) {
  830. pending_control &= ~1;
  831. // set data format
  832. uint16_t cp210x_format = (format_ & 0xf) << 8; // This should give us the number of bits.
  833. // now lets extract the parity from our encoding bits 5-7 and in theres 4-7
  834. cp210x_format |= (format_ & 0xe0) >> 1; // they encode bits 9-11
  835. // See if two stop bits
  836. if (format_ & 0x100) cp210x_format |= 2;
  837. mk_setup(setup, 0x41, 3, cp210x_format, 0, 0); // data format 8N1
  838. queue_Control_Transfer(device, &setup, NULL, this);
  839. control_queued = true;
  840. return;
  841. }
  842. // set baud rate
  843. if (pending_control & 2) {
  844. pending_control &= ~2;
  845. setupdata[0] = (baudrate) & 0xff; // Setup baud rate 115200 - 0x1C200
  846. setupdata[1] = (baudrate >> 8) & 0xff;
  847. setupdata[2] = (baudrate >> 16) & 0xff;
  848. setupdata[3] = (baudrate >> 24) & 0xff;
  849. mk_setup(setup, 0x40, 0x1e, 0, 0, 4);
  850. queue_Control_Transfer(device, &setup, setupdata, this);
  851. control_queued = true;
  852. return;
  853. }
  854. // configure flow control
  855. if (pending_control & 4) {
  856. pending_control &= ~4;
  857. memset(setupdata, 0, sizeof(setupdata)); // clear out the data
  858. setupdata[0] = 1; // Set dtr active?
  859. mk_setup(setup, 0x41, 13, 0, 0, 0x10);
  860. queue_Control_Transfer(device, &setup, setupdata, this);
  861. control_queued = true;
  862. return;
  863. }
  864. // set DTR
  865. if (pending_control & 8) {
  866. pending_control &= ~8;
  867. mk_setup(setup, 0x41, 7, 0x0101, 0, 0);
  868. queue_Control_Transfer(device, &setup, NULL, this);
  869. control_queued = true;
  870. return;
  871. }
  872. // clear DTR
  873. if (pending_control & 0x80) {
  874. pending_control &= ~0x80;
  875. println("CP210x clear DTR");
  876. mk_setup(setup, 0x40, 1, 0x0100, 0, 0);
  877. queue_Control_Transfer(device, &setup, NULL, this);
  878. control_queued = true;
  879. return;
  880. }
  881. }
  882. }
  883. #define CH341_BAUDBASE_FACTOR 1532620800
  884. #define CH341_BAUDBASE_DIVMAX 3
  885. void USBSerial::ch341_setBaud(uint8_t byte_index) {
  886. if (byte_index == 0) {
  887. uint32_t factor;
  888. uint16_t divisor;
  889. factor = (CH341_BAUDBASE_FACTOR / baudrate);
  890. divisor = CH341_BAUDBASE_DIVMAX;
  891. while ((factor > 0xfff0) && divisor) {
  892. factor >>= 3;
  893. divisor--;
  894. }
  895. factor = 0x10000 - factor;
  896. factor = (factor & 0xff00) | divisor;
  897. setupdata[0] = factor & 0xff; // save away the low byte for 2nd message
  898. println("CH341: 40, 0x9a, 0x1312... (Baud word 0):", factor, HEX);
  899. mk_setup(setup, 0x40, 0x9a, 0x1312, factor, 0); //
  900. } else {
  901. // Second packet use the byte we saved away during the calculation above
  902. println("CH341: 40, 0x9a, 0x0f2c... (Baud word 1):", setupdata[0], HEX);
  903. mk_setup(setup, 0x40, 0x9a, 0x0f2c, setupdata[0], 0); //
  904. }
  905. queue_Control_Transfer(device, &setup, setupdata, this);
  906. control_queued = true;
  907. }
  908. /************************************************************/
  909. // Interrupt-based Data Movement
  910. /************************************************************/
  911. void USBSerial::rx_callback(const Transfer_t *transfer)
  912. {
  913. if (!transfer->driver) return;
  914. ((USBSerial *)(transfer->driver))->rx_data(transfer);
  915. }
  916. void USBSerial::tx_callback(const Transfer_t *transfer)
  917. {
  918. if (!transfer->driver) return;
  919. ((USBSerial *)(transfer->driver))->tx_data(transfer);
  920. }
  921. void USBSerial::rx_data(const Transfer_t *transfer)
  922. {
  923. uint32_t len = transfer->length - ((transfer->qtd.token >> 16) & 0x7FFF);
  924. debugDigitalToggle(6);
  925. // first update rxstate bitmask, since buffer is no longer queued
  926. if (transfer->buffer == rx1) {
  927. rxstate &= 0xFE;
  928. } else if (transfer->buffer == rx2) {
  929. rxstate &= 0xFD;
  930. }
  931. // get start of data and actual length
  932. const uint8_t *p = (const uint8_t *)transfer->buffer;
  933. if (sertype == FTDI) {
  934. if (len >= 2) {
  935. p += 2;
  936. len -= 2;
  937. } else {
  938. len = 0;
  939. }
  940. }
  941. if (len > 0) {
  942. print("rx token: ", transfer->qtd.token, HEX);
  943. print(" transfer length: ", transfer->length, DEC);
  944. print(" len:", len, DEC);
  945. print(" - ", *p, HEX);
  946. println(" ", *(p+1), HEX);
  947. print("rx: ");
  948. print_hexbytes(p, len);
  949. }
  950. // Copy data from packet buffer to circular buffer.
  951. // Assume the buffer will always have space, since we
  952. // check before queuing the buffers
  953. uint32_t head = rxhead;
  954. uint32_t tail = rxtail;
  955. if (++head >= rxsize) head = 0;
  956. uint32_t avail;
  957. if (len > 0) {
  958. //print("head=", head);
  959. //print(", tail=", tail);
  960. avail = rxsize - head;
  961. //print(", avail=", avail);
  962. //println(", rxsize=", rxsize);
  963. if (avail > len) avail = len;
  964. memcpy(rxbuf + head, p, avail);
  965. if (len <= avail) {
  966. head += avail - 1;
  967. if (head >= rxsize) head = 0;
  968. } else {
  969. head = len - avail - 1;
  970. memcpy(rxbuf, p + avail, head + 1);
  971. }
  972. rxhead = head;
  973. }
  974. // TODO: can be this more efficient? We know from above which
  975. // buffer is no longer queued, so possible skip most of this work?
  976. rx_queue_packets(head, tail);
  977. }
  978. // re-queue packet buffer(s) if possible
  979. void USBSerial::rx_queue_packets(uint32_t head, uint32_t tail)
  980. {
  981. uint32_t avail;
  982. if (head >= tail) {
  983. avail = rxsize - 1 - head + tail;
  984. } else {
  985. avail = tail - head - 1;
  986. }
  987. uint32_t packetsize = rx2 - rx1;
  988. if (avail >= packetsize) {
  989. if ((rxstate & 0x01) == 0) {
  990. queue_Data_Transfer(rxpipe, rx1, packetsize, this);
  991. rxstate |= 0x01;
  992. } else if ((rxstate & 0x02) == 0) {
  993. queue_Data_Transfer(rxpipe, rx2, packetsize, this);
  994. rxstate |= 0x02;
  995. }
  996. if ((rxstate & 0x03) != 0x03 && avail >= packetsize * 2) {
  997. if ((rxstate & 0x01) == 0) {
  998. queue_Data_Transfer(rxpipe, rx1, packetsize, this);
  999. rxstate |= 0x01;
  1000. } else if ((rxstate & 0x02) == 0) {
  1001. queue_Data_Transfer(rxpipe, rx2, packetsize, this);
  1002. rxstate |= 0x02;
  1003. }
  1004. }
  1005. }
  1006. }
  1007. void USBSerial::tx_data(const Transfer_t *transfer)
  1008. {
  1009. uint32_t mask;
  1010. uint8_t *p = (uint8_t *)transfer->buffer;
  1011. debugDigitalWrite(5, HIGH);
  1012. if (p == tx1) {
  1013. println("tx1:");
  1014. mask = 1;
  1015. //txstate &= 0xFE;
  1016. } else if (p == tx2) {
  1017. println("tx2:");
  1018. mask = 2;
  1019. //txstate &= 0xFD;
  1020. } else {
  1021. debugDigitalWrite(5, LOW);
  1022. return; // should never happen
  1023. }
  1024. // check how much more data remains in the transmit buffer
  1025. uint32_t head = txhead;
  1026. uint32_t tail = txtail;
  1027. uint32_t count;
  1028. if (head >= tail) {
  1029. count = head - tail;
  1030. } else {
  1031. count = txsize + head - tail;
  1032. }
  1033. uint32_t packetsize = tx2 - tx1;
  1034. // Only output full packets unless the flush bit was set.
  1035. if ((count == 0) || ((count < packetsize) && ((txstate & 0x4) == 0) )) {
  1036. // not enough data in buffer to fill a full packet
  1037. txstate &= ~(mask | 4); // turn off that transfer and make sure the flush bit is not set
  1038. debugDigitalWrite(5, LOW);
  1039. return;
  1040. }
  1041. // immediately transmit another full packet, if we have enough data
  1042. if (count >= packetsize) count = packetsize;
  1043. else txstate &= ~(mask | 4); // This packet will complete any outstanding flush
  1044. println("TX:moar data!!!!");
  1045. if (++tail >= txsize) tail = 0;
  1046. uint32_t n = txsize - tail;
  1047. if (n > count) n = count;
  1048. memcpy(p, txbuf + tail, n);
  1049. if (n >= count) {
  1050. tail += n - 1;
  1051. if (tail >= txsize) tail = 0;
  1052. } else {
  1053. uint32_t len = count - n;
  1054. memcpy(p + n, txbuf, len);
  1055. tail = len - 1;
  1056. }
  1057. txtail = tail;
  1058. queue_Data_Transfer(txpipe, p, count, this);
  1059. debugDigitalWrite(5, LOW);
  1060. }
  1061. void USBSerial::flush()
  1062. {
  1063. print("USBSerial::flush");
  1064. if (txhead == txtail) {
  1065. println(" - Empty");
  1066. return; // empty.
  1067. }
  1068. debugDigitalWrite(32, HIGH);
  1069. NVIC_DISABLE_IRQ(IRQ_USBHS);
  1070. txtimer.stop(); // Stop longer timer.
  1071. txtimer.start(100); // Start a mimimal timeout
  1072. // timer_event(nullptr); // Try calling direct - fails to work
  1073. NVIC_ENABLE_IRQ(IRQ_USBHS);
  1074. while (txstate & 3) ; // wait for all of the USB packets to be sent.
  1075. println(" completed");
  1076. debugDigitalWrite(32, LOW);
  1077. }
  1078. void USBSerial::timer_event(USBDriverTimer *whichTimer)
  1079. {
  1080. debugDigitalWrite(7, HIGH);
  1081. println("txtimer");
  1082. uint32_t count;
  1083. uint32_t head = txhead;
  1084. uint32_t tail = txtail;
  1085. if (head == tail) {
  1086. println(" *** Empty ***");
  1087. debugDigitalWrite(7, LOW);
  1088. return; // nothing to transmit
  1089. } else if (head > tail) {
  1090. count = head - tail;
  1091. } else {
  1092. count = txsize + head - tail;
  1093. }
  1094. uint8_t *p;
  1095. if ((txstate & 0x01) == 0) {
  1096. p = tx1;
  1097. txstate |= 0x01;
  1098. } else if ((txstate & 0x02) == 0) {
  1099. p = tx2;
  1100. txstate |= 0x02;
  1101. } else {
  1102. txstate |= 4; // Tell the TX code to do flush code.
  1103. println(" *** No buffers ***");
  1104. debugDigitalWrite(7, LOW);
  1105. return; // no outgoing buffers available, try again later
  1106. }
  1107. uint32_t packetsize = tx2 - tx1;
  1108. // Possible for remaining ? packet size and not have both?
  1109. if (count > packetsize) {
  1110. txstate |= 4; // One of the active transfers will handle the remaining parts
  1111. count = packetsize;
  1112. }
  1113. if (++tail >= txsize) tail = 0;
  1114. uint32_t n = txsize - tail;
  1115. if (n > count) n = count;
  1116. memcpy(p, txbuf + tail, n);
  1117. if (n >= count) {
  1118. tail += n - 1;
  1119. if (tail >= txsize) tail = 0;
  1120. } else {
  1121. uint32_t len = count - n;
  1122. memcpy(p + n, txbuf, len);
  1123. tail = len - 1;
  1124. }
  1125. txtail = tail;
  1126. print(" TX data (", count);
  1127. print(") ");
  1128. print_hexbytes(p, count);
  1129. queue_Data_Transfer(txpipe, p, count, this);
  1130. debugDigitalWrite(7, LOW);
  1131. }
  1132. /************************************************************/
  1133. // User Functions - must disable USBHQ IRQ for EHCI access
  1134. /************************************************************/
  1135. void USBSerial::begin(uint32_t baud, uint32_t format)
  1136. {
  1137. NVIC_DISABLE_IRQ(IRQ_USBHS);
  1138. baudrate = baud;
  1139. bool format_changed = format != format_;
  1140. format_ = format;
  1141. switch (sertype) {
  1142. default:
  1143. case CDCACM: pending_control |= 0x6; break;
  1144. case FTDI: pending_control |= (format_changed? 0xf : 0xe); break; // Set BAUD, FLOW, DTR
  1145. case PL2303: pending_control |= 0x1e; break; // set more stuff...
  1146. case CH341: pending_control |= 0x1e; break;
  1147. case CP210X: pending_control |= 0xf; break;
  1148. }
  1149. if (!control_queued) control(NULL);
  1150. NVIC_ENABLE_IRQ(IRQ_USBHS);
  1151. // Wait until all packets have been queued before we return to caller.
  1152. while (pending_control) {
  1153. yield(); // not sure if we want to yield or what?
  1154. }
  1155. }
  1156. void USBSerial::end(void)
  1157. {
  1158. NVIC_DISABLE_IRQ(IRQ_USBHS);
  1159. switch (sertype) {
  1160. default:
  1161. case CDCACM: pending_control |= 0x80; break;
  1162. case FTDI: pending_control |= 0x80; break; // clear DTR
  1163. case PL2303: pending_control |= 0x80; break;
  1164. case CH341: pending_control |= 0x80; break;
  1165. }
  1166. if (!control_queued) control(NULL);
  1167. NVIC_ENABLE_IRQ(IRQ_USBHS);
  1168. // Wait until all packets have been queued before we return to caller.
  1169. while (pending_control) {
  1170. yield(); // not sure if we want to yield or what?
  1171. }
  1172. }
  1173. int USBSerial::available(void)
  1174. {
  1175. if (!device) return 0;
  1176. uint32_t head = rxhead;
  1177. uint32_t tail = rxtail;
  1178. if (head >= tail) return head - tail;
  1179. return rxsize + head - tail;
  1180. }
  1181. int USBSerial::peek(void)
  1182. {
  1183. if (!device) return -1;
  1184. uint32_t head = rxhead;
  1185. uint32_t tail = rxtail;
  1186. if (head == tail) return -1;
  1187. if (++tail >= rxsize) tail = 0;
  1188. return rxbuf[tail];
  1189. }
  1190. int USBSerial::read(void)
  1191. {
  1192. if (!device) return -1;
  1193. uint32_t head = rxhead;
  1194. uint32_t tail = rxtail;
  1195. if (head == tail) return -1;
  1196. if (++tail >= rxsize) tail = 0;
  1197. int c = rxbuf[tail];
  1198. rxtail = tail;
  1199. if ((rxstate & 0x03) != 0x03) {
  1200. NVIC_DISABLE_IRQ(IRQ_USBHS);
  1201. rx_queue_packets(head, tail);
  1202. NVIC_ENABLE_IRQ(IRQ_USBHS);
  1203. }
  1204. return c;
  1205. }
  1206. int USBSerial::availableForWrite()
  1207. {
  1208. if (!device) return 0;
  1209. uint32_t head = txhead;
  1210. uint32_t tail = txtail;
  1211. if (head >= tail) return txsize - 1 - head + tail;
  1212. return tail - head - 1;
  1213. }
  1214. size_t USBSerial::write(uint8_t c)
  1215. {
  1216. if (!device) return 0;
  1217. uint32_t head = txhead;
  1218. if (++head >= txsize) head = 0;
  1219. while (txtail == head) {
  1220. // wait...
  1221. }
  1222. txbuf[head] = c;
  1223. txhead = head;
  1224. //print("head=", head);
  1225. //println(", tail=", txtail);
  1226. // if full packet in buffer and tx packet ready, queue it
  1227. NVIC_DISABLE_IRQ(IRQ_USBHS);
  1228. uint32_t tail = txtail;
  1229. if ((txstate & 0x03) != 0x03) {
  1230. // at least one packet buffer is ready to transmit
  1231. uint32_t count;
  1232. if (head >= tail) {
  1233. count = head - tail;
  1234. } else {
  1235. count = txsize + head - tail;
  1236. }
  1237. uint32_t packetsize = tx2 - tx1;
  1238. if (count >= packetsize) {
  1239. //println("txsize=", txsize);
  1240. uint8_t *p;
  1241. if ((txstate & 0x01) == 0) {
  1242. p = tx1;
  1243. txstate |= 0x01;
  1244. } else /* if ((txstate & 0x02) == 0) */ {
  1245. p = tx2;
  1246. txstate |= 0x02;
  1247. }
  1248. // copy data to packet buffer
  1249. if (++tail >= txsize) tail = 0;
  1250. uint32_t n = txsize - tail;
  1251. if (n > packetsize) n = packetsize;
  1252. //print("memcpy, offset=", tail);
  1253. //println(", len=", n);
  1254. memcpy(p, txbuf + tail, n);
  1255. if (n >= packetsize) {
  1256. tail += n - 1;
  1257. if (tail >= txsize) tail = 0;
  1258. } else {
  1259. //n = txsize - n;
  1260. uint32_t len = packetsize - n;
  1261. //println("memcpy, offset=0, len=", len);
  1262. memcpy(p + n, txbuf, len);
  1263. tail = len - 1;
  1264. }
  1265. txtail = tail;
  1266. //println("queue tx packet, newtail=", tail);
  1267. debugDigitalWrite(7, HIGH);
  1268. queue_Data_Transfer(txpipe, p, packetsize, this);
  1269. debugDigitalWrite(7, LOW);
  1270. NVIC_ENABLE_IRQ(IRQ_USBHS);
  1271. return 1;
  1272. }
  1273. }
  1274. // otherwise, set a latency timer to later transmit partial packet
  1275. txtimer.stop();
  1276. txtimer.start(write_timeout_);
  1277. NVIC_ENABLE_IRQ(IRQ_USBHS);
  1278. return 1;
  1279. }