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The new Pins include SCL0/SDA0 pins 

Added the two new possible pins for I2C0
main
Kurt Eckhardt 9 years ago
parent
d428a8de21
commit
68fa9ddac3
1 changed files with 16 additions and 0 deletions
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  1. +16
    -0
      Wire.cpp

+ 16
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Wire.cpp View File

CORE_PIN34_CONFIG = PORT_PCR_MUX(5)|PORT_PCR_ODE|PORT_PCR_SRE|PORT_PCR_DSE; CORE_PIN34_CONFIG = PORT_PCR_MUX(5)|PORT_PCR_ODE|PORT_PCR_SRE|PORT_PCR_DSE;
} else if (sda_pin_num == 8) { } else if (sda_pin_num == 8) {
CORE_PIN8_CONFIG = PORT_PCR_MUX(7)|PORT_PCR_ODE|PORT_PCR_SRE|PORT_PCR_DSE; CORE_PIN8_CONFIG = PORT_PCR_MUX(7)|PORT_PCR_ODE|PORT_PCR_SRE|PORT_PCR_DSE;
} else if (sda_pin_num == 48) {
CORE_PIN48_CONFIG = PORT_PCR_MUX(2)|PORT_PCR_ODE|PORT_PCR_SRE|PORT_PCR_DSE;
#endif #endif
} }
if (scl_pin_num == 19) { if (scl_pin_num == 19) {
CORE_PIN33_CONFIG = PORT_PCR_MUX(5)|PORT_PCR_ODE|PORT_PCR_SRE|PORT_PCR_DSE; CORE_PIN33_CONFIG = PORT_PCR_MUX(5)|PORT_PCR_ODE|PORT_PCR_SRE|PORT_PCR_DSE;
} else if (scl_pin_num == 7) { } else if (scl_pin_num == 7) {
CORE_PIN7_CONFIG = PORT_PCR_MUX(7)|PORT_PCR_ODE|PORT_PCR_SRE|PORT_PCR_DSE; CORE_PIN7_CONFIG = PORT_PCR_MUX(7)|PORT_PCR_ODE|PORT_PCR_SRE|PORT_PCR_DSE;
} else if (scl_pin_num == 47) {
CORE_PIN47_CONFIG = PORT_PCR_MUX(2)|PORT_PCR_ODE|PORT_PCR_SRE|PORT_PCR_DSE;
#endif #endif
} }
setClock(100000); setClock(100000);
CORE_PIN34_CONFIG = 0; CORE_PIN34_CONFIG = 0;
} else if (sda_pin_num == 8) { } else if (sda_pin_num == 8) {
CORE_PIN8_CONFIG = 0; CORE_PIN8_CONFIG = 0;
} else if (sda_pin_num == 48) {
CORE_PIN48_CONFIG = 0;
#endif #endif
} }


CORE_PIN34_CONFIG = PORT_PCR_MUX(5)|PORT_PCR_ODE|PORT_PCR_SRE|PORT_PCR_DSE; CORE_PIN34_CONFIG = PORT_PCR_MUX(5)|PORT_PCR_ODE|PORT_PCR_SRE|PORT_PCR_DSE;
} else if (pin == 8) { } else if (pin == 8) {
CORE_PIN8_CONFIG = PORT_PCR_MUX(7)|PORT_PCR_ODE|PORT_PCR_SRE|PORT_PCR_DSE; CORE_PIN8_CONFIG = PORT_PCR_MUX(7)|PORT_PCR_ODE|PORT_PCR_SRE|PORT_PCR_DSE;
} else if (pin == 48) {
CORE_PIN48_CONFIG = PORT_PCR_MUX(2)|PORT_PCR_ODE|PORT_PCR_SRE|PORT_PCR_DSE;
#endif #endif
} }
} }
CORE_PIN33_CONFIG = 0; CORE_PIN33_CONFIG = 0;
} else if (scl_pin_num == 7) { } else if (scl_pin_num == 7) {
CORE_PIN7_CONFIG = 0; CORE_PIN7_CONFIG = 0;
} else if (scl_pin_num == 47) {
CORE_PIN47_CONFIG = 0;
#endif #endif
} }


CORE_PIN33_CONFIG = PORT_PCR_MUX(5)|PORT_PCR_ODE|PORT_PCR_SRE|PORT_PCR_DSE; CORE_PIN33_CONFIG = PORT_PCR_MUX(5)|PORT_PCR_ODE|PORT_PCR_SRE|PORT_PCR_DSE;
} else if (pin == 7) { } else if (pin == 7) {
CORE_PIN7_CONFIG = PORT_PCR_MUX(7)|PORT_PCR_ODE|PORT_PCR_SRE|PORT_PCR_DSE; CORE_PIN7_CONFIG = PORT_PCR_MUX(7)|PORT_PCR_ODE|PORT_PCR_SRE|PORT_PCR_DSE;
} else if (pin == 47) {
CORE_PIN47_CONFIG = PORT_PCR_MUX(2)|PORT_PCR_ODE|PORT_PCR_SRE|PORT_PCR_DSE;
#endif #endif
} }
} }
CORE_PIN34_CONFIG = 0; CORE_PIN34_CONFIG = 0;
} else if (sda_pin_num == 8) { } else if (sda_pin_num == 8) {
CORE_PIN8_CONFIG = 0; CORE_PIN8_CONFIG = 0;
} else if (sda_pin_num == 48) {
CORE_PIN48_CONFIG = 0;
#endif #endif
} }
if (scl_pin_num == 19) { if (scl_pin_num == 19) {
CORE_PIN33_CONFIG = 0; CORE_PIN33_CONFIG = 0;
} else if (scl_pin_num == 7) { } else if (scl_pin_num == 7) {
CORE_PIN7_CONFIG = 0; CORE_PIN7_CONFIG = 0;
} else if (scl_pin_num == 47) {
CORE_PIN47_CONFIG = 0;
#endif #endif
} }
SIM_SCGC4 &= ~SIM_SCGC4_I2C0; // TODO: use bitband SIM_SCGC4 &= ~SIM_SCGC4_I2C0; // TODO: use bitband

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