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LM32_002dRegs.html 4.9KB

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  59. Next: <a href="LM32_002dModifiers.html#LM32_002dModifiers" accesskey="n" rel="next">LM32-Modifiers</a>, Up: <a href="LM32-Syntax.html#LM32-Syntax" accesskey="u" rel="up">LM32 Syntax</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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  61. <hr>
  62. <a name="Register-Names-10"></a>
  63. <h4 class="subsubsection">9.19.2.1 Register Names</h4>
  64. <a name="index-LM32-register-names"></a>
  65. <a name="index-register-names_002c-LM32"></a>
  66. <p>LM32 has 32 x 32-bit general purpose registers &lsquo;<samp>r0</samp>&rsquo;,
  67. &lsquo;<samp>r1</samp>&rsquo;, ... &lsquo;<samp>r31</samp>&rsquo;.
  68. </p>
  69. <p>The following aliases are defined: &lsquo;<samp>gp</samp>&rsquo; - &lsquo;<samp>r26</samp>&rsquo;,
  70. &lsquo;<samp>fp</samp>&rsquo; - &lsquo;<samp>r27</samp>&rsquo;, &lsquo;<samp>sp</samp>&rsquo; - &lsquo;<samp>r28</samp>&rsquo;,
  71. &lsquo;<samp>ra</samp>&rsquo; - &lsquo;<samp>r29</samp>&rsquo;, &lsquo;<samp>ea</samp>&rsquo; - &lsquo;<samp>r30</samp>&rsquo;,
  72. &lsquo;<samp>ba</samp>&rsquo; - &lsquo;<samp>r31</samp>&rsquo;.
  73. </p>
  74. <p>LM32 has the following Control and Status Registers (CSRs).
  75. </p>
  76. <dl compact="compact">
  77. <dt><code>IE</code></dt>
  78. <dd><p>Interrupt enable.
  79. </p></dd>
  80. <dt><code>IM</code></dt>
  81. <dd><p>Interrupt mask.
  82. </p></dd>
  83. <dt><code>IP</code></dt>
  84. <dd><p>Interrupt pending.
  85. </p></dd>
  86. <dt><code>ICC</code></dt>
  87. <dd><p>Instruction cache control.
  88. </p></dd>
  89. <dt><code>DCC</code></dt>
  90. <dd><p>Data cache control.
  91. </p></dd>
  92. <dt><code>CC</code></dt>
  93. <dd><p>Cycle counter.
  94. </p></dd>
  95. <dt><code>CFG</code></dt>
  96. <dd><p>Configuration.
  97. </p></dd>
  98. <dt><code>EBA</code></dt>
  99. <dd><p>Exception base address.
  100. </p></dd>
  101. <dt><code>DC</code></dt>
  102. <dd><p>Debug control.
  103. </p></dd>
  104. <dt><code>DEBA</code></dt>
  105. <dd><p>Debug exception base address.
  106. </p></dd>
  107. <dt><code>JTX</code></dt>
  108. <dd><p>JTAG transmit.
  109. </p></dd>
  110. <dt><code>JRX</code></dt>
  111. <dd><p>JTAG receive.
  112. </p></dd>
  113. <dt><code>BP0</code></dt>
  114. <dd><p>Breakpoint 0.
  115. </p></dd>
  116. <dt><code>BP1</code></dt>
  117. <dd><p>Breakpoint 1.
  118. </p></dd>
  119. <dt><code>BP2</code></dt>
  120. <dd><p>Breakpoint 2.
  121. </p></dd>
  122. <dt><code>BP3</code></dt>
  123. <dd><p>Breakpoint 3.
  124. </p></dd>
  125. <dt><code>WP0</code></dt>
  126. <dd><p>Watchpoint 0.
  127. </p></dd>
  128. <dt><code>WP1</code></dt>
  129. <dd><p>Watchpoint 1.
  130. </p></dd>
  131. <dt><code>WP2</code></dt>
  132. <dd><p>Watchpoint 2.
  133. </p></dd>
  134. <dt><code>WP3</code></dt>
  135. <dd><p>Watchpoint 3.
  136. </p></dd>
  137. </dl>
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