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- <a name="Dependent-Patterns"></a>
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- Next: <a href="Jump-Patterns.html#Jump-Patterns" accesskey="n" rel="next">Jump Patterns</a>, Previous: <a href="Pattern-Ordering.html#Pattern-Ordering" accesskey="p" rel="prev">Pattern Ordering</a>, Up: <a href="Machine-Desc.html#Machine-Desc" accesskey="u" rel="up">Machine Desc</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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- <a name="Interdependence-of-Patterns"></a>
- <h3 class="section">17.11 Interdependence of Patterns</h3>
- <a name="index-Dependent-Patterns"></a>
- <a name="index-Interdependence-of-Patterns"></a>
-
- <p>In some cases machines support instructions identical except for the
- machine mode of one or more operands. For example, there may be
- “sign-extend halfword” and “sign-extend byte” instructions whose
- patterns are
- </p>
- <div class="smallexample">
- <pre class="smallexample">(set (match_operand:SI 0 …)
- (extend:SI (match_operand:HI 1 …)))
-
- (set (match_operand:SI 0 …)
- (extend:SI (match_operand:QI 1 …)))
- </pre></div>
-
- <p>Constant integers do not specify a machine mode, so an instruction to
- extend a constant value could match either pattern. The pattern it
- actually will match is the one that appears first in the file. For correct
- results, this must be the one for the widest possible mode (<code>HImode</code>,
- here). If the pattern matches the <code>QImode</code> instruction, the results
- will be incorrect if the constant value does not actually fit that mode.
- </p>
- <p>Such instructions to extend constants are rarely generated because they are
- optimized away, but they do occasionally happen in nonoptimized
- compilations.
- </p>
- <p>If a constraint in a pattern allows a constant, the reload pass may
- replace a register with a constant permitted by the constraint in some
- cases. Similarly for memory references. Because of this substitution,
- you should not provide separate patterns for increment and decrement
- instructions. Instead, they should be generated from the same pattern
- that supports register-register add insns by examining the operands and
- generating the appropriate machine instruction.
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