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  56. <a name="AArch64-Directives"></a>
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  58. <p>
  59. Next: <a href="AArch64-Opcodes.html#AArch64-Opcodes" accesskey="n" rel="next">AArch64 Opcodes</a>, Previous: <a href="AArch64-Floating-Point.html#AArch64-Floating-Point" accesskey="p" rel="prev">AArch64 Floating Point</a>, Up: <a href="AArch64_002dDependent.html#AArch64_002dDependent" accesskey="u" rel="up">AArch64-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
  60. </div>
  61. <hr>
  62. <a name="AArch64-Machine-Directives"></a>
  63. <h4 class="subsection">9.1.5 AArch64 Machine Directives</h4>
  64. <a name="index-machine-directives_002c-AArch64"></a>
  65. <a name="index-AArch64-machine-directives"></a>
  66. <dl compact="compact">
  67. <dd>
  68. <a name="index-_002earch-directive_002c-AArch64"></a>
  69. </dd>
  70. <dt><code>.arch <var>name</var></code></dt>
  71. <dd><p>Select the target architecture. Valid values for <var>name</var> are the same as
  72. for the <samp>-march</samp> command-line option.
  73. </p>
  74. <p>Specifying <code>.arch</code> clears any previously selected architecture
  75. extensions.
  76. </p>
  77. <a name="index-_002earch_005fextension-directive_002c-AArch64"></a>
  78. </dd>
  79. <dt><code>.arch_extension <var>name</var></code></dt>
  80. <dd><p>Add or remove an architecture extension to the target architecture. Valid
  81. values for <var>name</var> are the same as those accepted as architectural
  82. extensions by the <samp>-mcpu</samp> command-line option.
  83. </p>
  84. <p><code>.arch_extension</code> may be used multiple times to add or remove extensions
  85. incrementally to the architecture being compiled for.
  86. </p>
  87. <a name="index-_002ebss-directive_002c-AArch64"></a>
  88. </dd>
  89. <dt><code>.bss</code></dt>
  90. <dd><p>This directive switches to the <code>.bss</code> section.
  91. </p>
  92. <a name="index-_002ecpu-directive_002c-AArch64"></a>
  93. </dd>
  94. <dt><code>.cpu <var>name</var></code></dt>
  95. <dd><p>Set the target processor. Valid values for <var>name</var> are the same as
  96. those accepted by the <samp>-mcpu=</samp> command-line option.
  97. </p>
  98. <a name="index-_002edword-directive_002c-AArch64"></a>
  99. </dd>
  100. <dt><code>.dword <var>expressions</var></code></dt>
  101. <dd><p>The <code>.dword</code> directive produces 64 bit values.
  102. </p>
  103. <a name="index-_002eeven-directive_002c-AArch64"></a>
  104. </dd>
  105. <dt><code>.even</code></dt>
  106. <dd><p>The <code>.even</code> directive aligns the output on the next even byte
  107. boundary.
  108. </p>
  109. <a name="index-_002efloat16-directive_002c-AArch64"></a>
  110. </dd>
  111. <dt><code>.float16 <var>value [,...,value_n]</var></code></dt>
  112. <dd><p>Place the half precision floating point representation of one or more
  113. floating-point values into the current section.
  114. The format used to encode the floating point values is always the
  115. IEEE 754-2008 half precision floating point format.
  116. </p>
  117. <a name="index-_002einst-directive_002c-AArch64"></a>
  118. </dd>
  119. <dt><code>.inst <var>expressions</var></code></dt>
  120. <dd><p>Inserts the expressions into the output as if they were instructions,
  121. rather than data.
  122. </p>
  123. <a name="index-_002eltorg-directive_002c-AArch64"></a>
  124. </dd>
  125. <dt><code>.ltorg</code></dt>
  126. <dd><p>This directive causes the current contents of the literal pool to be
  127. dumped into the current section (which is assumed to be the .text
  128. section) at the current location (aligned to a word boundary).
  129. GAS maintains a separate literal pool for each section and each
  130. sub-section. The <code>.ltorg</code> directive will only affect the literal
  131. pool of the current section and sub-section. At the end of assembly
  132. all remaining, un-empty literal pools will automatically be dumped.
  133. </p>
  134. <p>Note - older versions of GAS would dump the current literal
  135. pool any time a section change occurred. This is no longer done, since
  136. it prevents accurate control of the placement of literal pools.
  137. </p>
  138. <a name="index-_002epool-directive_002c-AArch64"></a>
  139. </dd>
  140. <dt><code>.pool</code></dt>
  141. <dd><p>This is a synonym for .ltorg.
  142. </p>
  143. <a name="index-_002ereq-directive_002c-AArch64"></a>
  144. </dd>
  145. <dt><code><var>name</var> .req <var>register name</var></code></dt>
  146. <dd><p>This creates an alias for <var>register name</var> called <var>name</var>. For
  147. example:
  148. </p>
  149. <div class="smallexample">
  150. <pre class="smallexample"> foo .req w0
  151. </pre></div>
  152. <p>ip0, ip1, lr and fp are automatically defined to
  153. alias to X16, X17, X30 and X29 respectively.
  154. </p>
  155. <a name="index-_002etlsdescadd-directive_002c-AArch64"></a>
  156. </dd>
  157. <dt><code><code>.tlsdescadd</code></code></dt>
  158. <dd><p>Emits a TLSDESC_ADD reloc on the next instruction.
  159. </p>
  160. <a name="index-_002etlsdesccall-directive_002c-AArch64"></a>
  161. </dd>
  162. <dt><code><code>.tlsdesccall</code></code></dt>
  163. <dd><p>Emits a TLSDESC_CALL reloc on the next instruction.
  164. </p>
  165. <a name="index-_002etlsdescldr-directive_002c-AArch64"></a>
  166. </dd>
  167. <dt><code><code>.tlsdescldr</code></code></dt>
  168. <dd><p>Emits a TLSDESC_LDR reloc on the next instruction.
  169. </p>
  170. <a name="index-_002eunreq-directive_002c-AArch64"></a>
  171. </dd>
  172. <dt><code>.unreq <var>alias-name</var></code></dt>
  173. <dd><p>This undefines a register alias which was previously defined using the
  174. <code>req</code> directive. For example:
  175. </p>
  176. <div class="smallexample">
  177. <pre class="smallexample"> foo .req w0
  178. .unreq foo
  179. </pre></div>
  180. <p>An error occurs if the name is undefined. Note - this pseudo op can
  181. be used to delete builtin in register name aliases (eg &rsquo;w0&rsquo;). This
  182. should only be done if it is really necessary.
  183. </p>
  184. <a name="index-_002evariant_005fpcs-directive_002c-AArch64"></a>
  185. </dd>
  186. <dt><code>.variant_pcs <var>symbol</var></code></dt>
  187. <dd><p>This directive marks <var>symbol</var> referencing a function that may
  188. follow a variant procedure call standard with different register
  189. usage convention from the base procedure call standard.
  190. </p>
  191. <a name="index-_002exword-directive_002c-AArch64"></a>
  192. </dd>
  193. <dt><code>.xword <var>expressions</var></code></dt>
  194. <dd><p>The <code>.xword</code> directive produces 64 bit values. This is the same
  195. as the <code>.dword</code> directive.
  196. </p>
  197. <a name="index-_002ecfi_005fb_005fkey_005fframe-directive_002c-AArch64"></a>
  198. </dd>
  199. <dt><code><code>.cfi_b_key_frame</code></code></dt>
  200. <dd><p>The <code>.cfi_b_key_frame</code> directive inserts a &rsquo;B&rsquo; character into the CIE
  201. corresponding to the current frame&rsquo;s FDE, meaning that its return address has
  202. been signed with the B-key. If two frames are signed with differing keys then
  203. they will not share the same CIE. This information is intended to be used by
  204. the stack unwinder in order to properly authenticate return addresses.
  205. </p>
  206. </dd>
  207. </dl>
  208. <hr>
  209. <div class="header">
  210. <p>
  211. Next: <a href="AArch64-Opcodes.html#AArch64-Opcodes" accesskey="n" rel="next">AArch64 Opcodes</a>, Previous: <a href="AArch64-Floating-Point.html#AArch64-Floating-Point" accesskey="p" rel="prev">AArch64 Floating Point</a>, Up: <a href="AArch64_002dDependent.html#AArch64_002dDependent" accesskey="u" rel="up">AArch64-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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