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M32C_002dModifiers.html 5.6KB

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  56. <a name="M32C_002dModifiers"></a>
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  59. Next: <a href="M32C_002dChars.html#M32C_002dChars" accesskey="n" rel="next">M32C-Chars</a>, Up: <a href="M32C_002dSyntax.html#M32C_002dSyntax" accesskey="u" rel="up">M32C-Syntax</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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  61. <hr>
  62. <a name="Symbolic-Operand-Modifiers"></a>
  63. <h4 class="subsubsection">9.20.2.1 Symbolic Operand Modifiers</h4>
  64. <a name="index-M32C-modifiers"></a>
  65. <a name="index-modifiers_002c-M32C"></a>
  66. <p>The assembler supports several modifiers when using symbol addresses
  67. in M32C instruction operands. The general syntax is the following:
  68. </p>
  69. <div class="smallexample">
  70. <pre class="smallexample">%modifier(symbol)
  71. </pre></div>
  72. <dl compact="compact">
  73. <dd><a name="index-symbol-modifiers-2"></a>
  74. </dd>
  75. <dt><code>%dsp8</code></dt>
  76. <dt><code>%dsp16</code></dt>
  77. <dd>
  78. <p>These modifiers override the assembler&rsquo;s assumptions about how big a
  79. symbol&rsquo;s address is. Normally, when it sees an operand like
  80. &lsquo;<samp>sym[a0]</samp>&rsquo; it assumes &lsquo;<samp>sym</samp>&rsquo; may require the widest
  81. displacement field (16 bits for &lsquo;<samp>-m16c</samp>&rsquo;, 24 bits for
  82. &lsquo;<samp>-m32c</samp>&rsquo;). These modifiers tell it to assume the address will fit
  83. in an 8 or 16 bit (respectively) unsigned displacement. Note that, of
  84. course, if it doesn&rsquo;t actually fit you will get linker errors. Example:
  85. </p>
  86. <div class="smallexample">
  87. <pre class="smallexample">mov.w %dsp8(sym)[a0],r1
  88. mov.b #0,%dsp8(sym)[a0]
  89. </pre></div>
  90. </dd>
  91. <dt><code>%hi8</code></dt>
  92. <dd>
  93. <p>This modifier allows you to load bits 16 through 23 of a 24 bit
  94. address into an 8 bit register. This is useful with, for example, the
  95. M16C &lsquo;<samp>smovf</samp>&rsquo; instruction, which expects a 20 bit address in
  96. &lsquo;<samp>r1h</samp>&rsquo; and &lsquo;<samp>a0</samp>&rsquo;. Example:
  97. </p>
  98. <div class="smallexample">
  99. <pre class="smallexample">mov.b #%hi8(sym),r1h
  100. mov.w #%lo16(sym),a0
  101. smovf.b
  102. </pre></div>
  103. </dd>
  104. <dt><code>%lo16</code></dt>
  105. <dd>
  106. <p>Likewise, this modifier allows you to load bits 0 through 15 of a 24
  107. bit address into a 16 bit register.
  108. </p>
  109. </dd>
  110. <dt><code>%hi16</code></dt>
  111. <dd>
  112. <p>This modifier allows you to load bits 16 through 31 of a 32 bit
  113. address into a 16 bit register. While the M32C family only has 24
  114. bits of address space, it does support addresses in pairs of 16 bit
  115. registers (like &lsquo;<samp>a1a0</samp>&rsquo; for the &lsquo;<samp>lde</samp>&rsquo; instruction). This
  116. modifier is for loading the upper half in such cases. Example:
  117. </p>
  118. <div class="smallexample">
  119. <pre class="smallexample">mov.w #%hi16(sym),a1
  120. mov.w #%lo16(sym),a0
  121. &hellip;
  122. lde.w [a1a0],r1
  123. </pre></div>
  124. </dd>
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