visus
/
toolchain-gcc-arm-embedded

<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html>
<!-- This file documents the GNU Assembler "as".

Copyright (C) 1991-2020 Free Software Foundation, Inc.

Permission is granted to copy, distribute and/or modify this document
under the terms of the GNU Free Documentation License, Version 1.3
or any later version published by the Free Software Foundation;
with no Invariant Sections, with no Front-Cover Texts, and with no
Back-Cover Texts.  A copy of the license is included in the
section entitled "GNU Free Documentation License".
 -->
<!-- Created by GNU Texinfo 6.5, http://www.gnu.org/software/texinfo/ -->
<head>
<meta http-equiv="Content-Type" content="text/html; charset=utf-8">
<title>M68HC11-Branch (Using as)</title>

<meta name="description" content="M68HC11-Branch (Using as)">
<meta name="keywords" content="M68HC11-Branch (Using as)">
<meta name="resource-type" content="document">
<meta name="distribution" content="global">
<meta name="Generator" content="makeinfo">
<link href="index.html#Top" rel="start" title="Top">
<link href="AS-Index.html#AS-Index" rel="index" title="AS Index">
<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">
<link href="M68HC11_002dopcodes.html#M68HC11_002dopcodes" rel="up" title="M68HC11-opcodes">
<link href="S12Z_002dDependent.html#S12Z_002dDependent" rel="next" title="S12Z-Dependent">
<link href="M68HC11_002dopcodes.html#M68HC11_002dopcodes" rel="prev" title="M68HC11-opcodes">
<style type="text/css">
<!--
a.summary-letter {text-decoration: none}
blockquote.indentedblock {margin-right: 0em}
blockquote.smallindentedblock {margin-right: 0em; font-size: smaller}
blockquote.smallquotation {font-size: smaller}
div.display {margin-left: 3.2em}
div.example {margin-left: 3.2em}
div.lisp {margin-left: 3.2em}
div.smalldisplay {margin-left: 3.2em}
div.smallexample {margin-left: 3.2em}
div.smalllisp {margin-left: 3.2em}
kbd {font-style: oblique}
pre.display {font-family: inherit}
pre.format {font-family: inherit}
pre.menu-comment {font-family: serif}
pre.menu-preformatted {font-family: serif}
pre.smalldisplay {font-family: inherit; font-size: smaller}
pre.smallexample {font-size: smaller}
pre.smallformat {font-family: inherit; font-size: smaller}
pre.smalllisp {font-size: smaller}
span.nolinebreak {white-space: nowrap}
span.roman {font-family: initial; font-weight: normal}
span.sansserif {font-family: sans-serif; font-weight: normal}
ul.no-bullet {list-style: none}
-->
</style>


</head>

<body lang="en">
<a name="M68HC11_002dBranch"></a>
<div class="header">
<p>
Up: <a href="M68HC11_002dopcodes.html#M68HC11_002dopcodes" accesskey="u" rel="up">M68HC11-opcodes</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
</div>
<hr>
<a name="Branch-Improvement-1"></a>
<h4 class="subsubsection">9.23.6.1 Branch Improvement</h4>

<a name="index-pseudo_002dopcodes_002c-M68HC11"></a>
<a name="index-M68HC11-pseudo_002dopcodes"></a>
<a name="index-branch-improvement_002c-M68HC11"></a>
<a name="index-M68HC11-branch-improvement"></a>

<p>Certain pseudo opcodes are permitted for branch instructions.
They expand to the shortest branch instruction that reach the
target. Generally these mnemonics are made by prepending &lsquo;<samp>j</samp>&rsquo; to
the start of Motorola mnemonic. These pseudo opcodes are not affected
by the &lsquo;<samp>--short-branches</samp>&rsquo; or &lsquo;<samp>--force-long-branches</samp>&rsquo; options.
</p>
<p>The following table summarizes the pseudo-operations.
</p>
<div class="smallexample">
<pre class="smallexample">                        Displacement Width
     +-------------------------------------------------------------+
     |                     Options                                 |
     |    --short-branches           --force-long-branches         |
     +--------------------------+----------------------------------+
  Op |BYTE             WORD     | BYTE          WORD               |
     +--------------------------+----------------------------------+
 bsr | bsr &lt;pc-rel&gt;    &lt;error&gt;  |               jsr &lt;abs&gt;          |
 bra | bra &lt;pc-rel&gt;    &lt;error&gt;  |               jmp &lt;abs&gt;          |
jbsr | bsr &lt;pc-rel&gt;   jsr &lt;abs&gt; | bsr &lt;pc-rel&gt;  jsr &lt;abs&gt;          |
jbra | bra &lt;pc-rel&gt;   jmp &lt;abs&gt; | bra &lt;pc-rel&gt;  jmp &lt;abs&gt;          |
 bXX | bXX &lt;pc-rel&gt;    &lt;error&gt;  |               bNX +3; jmp &lt;abs&gt;  |
jbXX | bXX &lt;pc-rel&gt;   bNX +3;   | bXX &lt;pc-rel&gt;  bNX +3; jmp &lt;abs&gt;  |
     |                jmp &lt;abs&gt; |                                  |
     +--------------------------+----------------------------------+
XX: condition
NX: negative of condition XX

</pre></div>

<dl compact="compact">
<dt><code>jbsr</code></dt>
<dt><code>jbra</code></dt>
<dd><p>These are the simplest jump pseudo-operations; they always map to one
particular machine instruction, depending on the displacement to the
branch target.
</p>
</dd>
<dt><code>jb<var>XX</var></code></dt>
<dd><p>Here, &lsquo;<samp>jb<var>XX</var></samp>&rsquo; stands for an entire family of pseudo-operations,
where <var>XX</var> is a conditional branch or condition-code test.  The full
list of pseudo-ops in this family is:
</p><div class="smallexample">
<pre class="smallexample"> jbcc   jbeq   jbge   jbgt   jbhi   jbvs   jbpl  jblo
 jbcs   jbne   jblt   jble   jbls   jbvc   jbmi
</pre></div>

<p>For the cases of non-PC relative displacements and long displacements,
<code>as</code> issues a longer code fragment in terms of
<var>NX</var>, the opposite condition to <var>XX</var>.  For example, for the
non-PC relative case:
</p><div class="smallexample">
<pre class="smallexample">    jb<var>XX</var> foo
</pre></div>
<p>gives
</p><div class="smallexample">
<pre class="smallexample">     b<var>NX</var>s oof
     jmp foo
 oof:
</pre></div>

</dd>
</dl>


</body>
</html>