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toolchain-gcc-arm-embedded

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<a name="Opcodes-20"></a>
<h4 class="subsection">9.51.3 Opcodes</h4>
<p>All the standard opcodes of the architecture are implemented, along with the
following three pseudo-instructions: <code>cmp</code>, <code>cmpc</code>, <code>move</code>.
</p>
<p>In addition, the following two illegal opcodes are implemented and used by the simulation:
</p>
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<pre class="example">stop    5-bit immediate, SourceA
trace   5-bit immediate, SourceA
</pre></div>


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