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- <a name="MIPS"></a>
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- <p>
- Next: <a href="MMIX.html#MMIX" accesskey="n" rel="next">MMIX</a>, Previous: <a href="M68K.html#M68K" accesskey="p" rel="prev">M68K</a>, Up: <a href="Machine-Dependent.html#Machine-Dependent" accesskey="u" rel="up">Machine Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="LD-Index.html#LD-Index" title="Index" rel="index">Index</a>]</p>
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- <hr>
- <a name="ld-and-the-MIPS-family"></a>
- <h3 class="section">4.6 <code>ld</code> and the MIPS family</h3>
-
- <a name="index-MIPS-microMIPS-instruction-choice-selection"></a>
- <a name="index-_002d_002dinsn32-1"></a>
- <a name="index-_002d_002dno_002dinsn32-1"></a>
- <p>The ‘<samp>--insn32</samp>’ and ‘<samp>--no-insn32</samp>’ options control the choice of
- microMIPS instructions used in code generated by the linker, such as that
- in the PLT or lazy binding stubs, or in relaxation. If ‘<samp>--insn32</samp>’ is
- used, then the linker only uses 32-bit instruction encodings. By default
- or if ‘<samp>--no-insn32</samp>’ is used, all instruction encodings are used,
- including 16-bit ones where possible.
- </p>
- <a name="index-MIPS-branch-relocation-check-control"></a>
- <a name="index-_002d_002dignore_002dbranch_002disa-1"></a>
- <a name="index-_002d_002dno_002dignore_002dbranch_002disa-1"></a>
- <p>The ‘<samp>--ignore-branch-isa</samp>’ and ‘<samp>--no-ignore-branch-isa</samp>’ options
- control branch relocation checks for invalid ISA mode transitions. If
- ‘<samp>--ignore-branch-isa</samp>’ is used, then the linker accepts any branch
- relocations and any ISA mode transition required is lost in relocation
- calculation, except for some cases of <code>BAL</code> instructions which meet
- relaxation conditions and are converted to equivalent <code>JALX</code>
- instructions as the associated relocation is calculated. By default
- or if ‘<samp>--no-ignore-branch-isa</samp>’ is used a check is made causing
- the loss of an ISA mode transition to produce an error.
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