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<a name="AArch64-Options"></a>
<div class="header">
<p>
Next: <a href="AArch64-Extensions.html#AArch64-Extensions" accesskey="n" rel="next">AArch64 Extensions</a>, Up: <a href="AArch64_002dDependent.html#AArch64_002dDependent" accesskey="u" rel="up">AArch64-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
</div>
<hr>
<a name="Options"></a>
<h4 class="subsection">9.1.1 Options</h4>
<a name="index-AArch64-options-_0028none_0029"></a>
<a name="index-options-for-AArch64-_0028none_0029"></a>

<dl compact="compact">
<dd>
<a name="index-_002dEB-command_002dline-option_002c-AArch64"></a>
</dd>
<dt><code>-EB</code></dt>
<dd><p>This option specifies that the output generated by the assembler should
be marked as being encoded for a big-endian processor.
</p>
<a name="index-_002dEL-command_002dline-option_002c-AArch64"></a>
</dd>
<dt><code>-EL</code></dt>
<dd><p>This option specifies that the output generated by the assembler should
be marked as being encoded for a little-endian processor.
</p>
<a name="index-_002dmabi_003d-command_002dline-option_002c-AArch64"></a>
</dd>
<dt><code>-mabi=<var>abi</var></code></dt>
<dd><p>Specify which ABI the source code uses.  The recognized arguments
are: <code>ilp32</code> and <code>lp64</code>, which decides the generated object
file in ELF32 and ELF64 format respectively.  The default is <code>lp64</code>.
</p>
<a name="index-_002dmcpu_003d-command_002dline-option_002c-AArch64"></a>
</dd>
<dt><code>-mcpu=<var>processor</var>[+<var>extension</var>&hellip;]</code></dt>
<dd><p>This option specifies the target processor.  The assembler will issue an error
message if an attempt is made to assemble an instruction which will not execute
on the target processor.  The following processor names are recognized:
<code>cortex-a34</code>,
<code>cortex-a35</code>,
<code>cortex-a53</code>,
<code>cortex-a55</code>,
<code>cortex-a57</code>,
<code>cortex-a65</code>,
<code>cortex-a65ae</code>,
<code>cortex-a72</code>,
<code>cortex-a73</code>,
<code>cortex-a75</code>,
<code>cortex-a76</code>,
<code>cortex-a76ae</code>,
<code>cortex-a77</code>,
<code>ares</code>,
<code>exynos-m1</code>,
<code>falkor</code>,
<code>neoverse-n1</code>,
<code>neoverse-v1</code>,
<code>neoverse-e1</code>,
<code>qdf24xx</code>,
<code>saphira</code>,
<code>thunderx</code>,
<code>vulcan</code>,
<code>xgene1</code>
and
<code>xgene2</code>.
The special name <code>all</code> may be used to allow the assembler to accept
instructions valid for any supported processor, including all optional
extensions.
</p>
<p>In addition to the basic instruction set, the assembler can be told to
accept, or restrict, various extension mnemonics that extend the
processor.  See <a href="AArch64-Extensions.html#AArch64-Extensions">AArch64 Extensions</a>.
</p>
<p>If some implementations of a particular processor can have an
extension, then then those extensions are automatically enabled.
Consequently, you will not normally have to specify any additional
extensions.
</p>
<a name="index-_002dmarch_003d-command_002dline-option_002c-AArch64"></a>
</dd>
<dt><code>-march=<var>architecture</var>[+<var>extension</var>&hellip;]</code></dt>
<dd><p>This option specifies the target architecture.  The assembler will
issue an error message if an attempt is made to assemble an
instruction which will not execute on the target architecture.  The
following architecture names are recognized: <code>armv8-a</code>,
<code>armv8.1-a</code>, <code>armv8.2-a</code>, <code>armv8.3-a</code>, <code>armv8.4-a</code>
<code>armv8.5-a</code>, and <code>armv8.6-a</code>.
</p>
<p>If both <samp>-mcpu</samp> and <samp>-march</samp> are specified, the
assembler will use the setting for <samp>-mcpu</samp>.  If neither are
specified, the assembler will default to <samp>-mcpu=all</samp>.
</p>
<p>The architecture option can be extended with the same instruction set
extension options as the <samp>-mcpu</samp> option.  Unlike
<samp>-mcpu</samp>, extensions are not always enabled by default,
See <a href="AArch64-Extensions.html#AArch64-Extensions">AArch64 Extensions</a>.
</p>
<a name="index-_002dmverbose_002derror-command_002dline-option_002c-AArch64"></a>
</dd>
<dt><code>-mverbose-error</code></dt>
<dd><p>This option enables verbose error messages for AArch64 gas.  This option
is enabled by default.
</p>
<a name="index-_002dmno_002dverbose_002derror-command_002dline-option_002c-AArch64"></a>
</dd>
<dt><code>-mno-verbose-error</code></dt>
<dd><p>This option disables verbose error messages in AArch64 gas.
</p>
</dd>
</dl>

<hr>
<div class="header">
<p>
Next: <a href="AArch64-Extensions.html#AArch64-Extensions" accesskey="n" rel="next">AArch64 Extensions</a>, Up: <a href="AArch64_002dDependent.html#AArch64_002dDependent" accesskey="u" rel="up">AArch64-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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