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<title>SH Opcodes (Using as)</title>

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<a name="SH-Opcodes"></a>
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<p>
Previous: <a href="SH-Directives.html#SH-Directives" accesskey="p" rel="prev">SH Directives</a>, Up: <a href="SH_002dDependent.html#SH_002dDependent" accesskey="u" rel="up">SH-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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<hr>
<a name="Opcodes-18"></a>
<h4 class="subsection">9.43.5 Opcodes</h4>

<a name="index-SH-opcode-summary"></a>
<a name="index-opcode-summary_002c-SH"></a>
<a name="index-mnemonics_002c-SH"></a>
<a name="index-instruction-summary_002c-SH"></a>
<p>For detailed information on the SH machine instruction set, see
<cite>SH-Microcomputer User&rsquo;s Manual</cite> (Renesas) or
<cite>SH-4 32-bit CPU Core Architecture</cite> (SuperH) and
<cite>SuperH (SH) 64-Bit RISC Series</cite> (SuperH).
</p>
<p><code>as</code> implements all the standard SH opcodes.  No additional
pseudo-instructions are needed on this family.  Note, however, that
because <code>as</code> supports a simpler form of PC-relative
addressing, you may simply write (for example)
</p>
<div class="example">
<pre class="example">mov.l  bar,r0
</pre></div>

<p>where other assemblers might require an explicit displacement to
<code>bar</code> from the program counter:
</p>
<div class="example">
<pre class="example">mov.l  @(<var>disp</var>, PC)
</pre></div>


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