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<a name="TILEPro-Syntax"></a>
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<p>
Next: <a href="TILEPro-Directives.html#TILEPro-Directives" accesskey="n" rel="next">TILEPro Directives</a>, Previous: <a href="TILEPro-Options.html#TILEPro-Options" accesskey="p" rel="prev">TILEPro Options</a>, Up: <a href="TILEPro_002dDependent.html#TILEPro_002dDependent" accesskey="u" rel="up">TILEPro-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
</div>
<hr>
<a name="Syntax-29"></a>
<h4 class="subsection">9.48.2 Syntax</h4>
<a name="index-TILEPro-syntax"></a>
<a name="index-syntax_002c-TILEPro"></a>

<p>Block comments are delimited by &lsquo;<samp>/*</samp>&rsquo; and &lsquo;<samp>*/</samp>&rsquo;.  End of line
comments may be introduced by &lsquo;<samp>#</samp>&rsquo;.
</p>
<p>Instructions consist of a leading opcode or macro name followed by
whitespace and an optional comma-separated list of operands:
</p>
<div class="smallexample">
<pre class="smallexample"><var>opcode</var> [<var>operand</var>, &hellip;]
</pre></div>

<p>Instructions must be separated by a newline or semicolon.
</p>
<p>There are two ways to write code: either write naked instructions,
which the assembler is free to combine into VLIW bundles, or specify
the VLIW bundles explicitly.
</p>
<p>Bundles are specified using curly braces:
</p>
<div class="smallexample">
<pre class="smallexample">{ <var>add</var> r3,r4,r5 ; <var>add</var> r7,r8,r9 ; <var>lw</var> r10,r11 }
</pre></div>

<p>A bundle can span multiple lines. If you want to put multiple
instructions on a line, whether in a bundle or not, you need to
separate them with semicolons as in this example.
</p>
<p>A bundle may contain one or more instructions, up to the limit
specified by the ISA (currently three). If fewer instructions are
specified than the hardware supports in a bundle, the assembler
inserts <code>fnop</code> instructions automatically.
</p>
<p>The assembler will prefer to preserve the ordering of instructions
within the bundle, putting the first instruction in a lower-numbered
pipeline than the next one, etc.  This fact, combined with the
optional use of explicit <code>fnop</code> or <code>nop</code> instructions,
allows precise control over which pipeline executes each instruction.
</p>
<p>If the instructions cannot be bundled in the listed order, the
assembler will automatically try to find a valid pipeline
assignment. If there is no way to bundle the instructions together,
the assembler reports an error.
</p>
<p>The assembler does not yet auto-bundle (automatically combine multiple
instructions into one bundle), but it reserves the right to do so in
the future.  If you want to force an instruction to run by itself, put
it in a bundle explicitly with curly braces and use <code>nop</code>
instructions (not <code>fnop</code>) to fill the remaining pipeline slots in
that bundle.
</p>
<table class="menu" border="0" cellspacing="0">
<tr><td align="left" valign="top">&bull; <a href="TILEPro-Opcodes.html#TILEPro-Opcodes" accesskey="1">TILEPro Opcodes</a>:</td><td>&nbsp;&nbsp;</td><td align="left" valign="top">Opcode Naming Conventions.
</td></tr>
<tr><td align="left" valign="top">&bull; <a href="TILEPro-Registers.html#TILEPro-Registers" accesskey="2">TILEPro Registers</a>:</td><td>&nbsp;&nbsp;</td><td align="left" valign="top">Register Naming.
</td></tr>
<tr><td align="left" valign="top">&bull; <a href="TILEPro-Modifiers.html#TILEPro-Modifiers" accesskey="3">TILEPro Modifiers</a>:</td><td>&nbsp;&nbsp;</td><td align="left" valign="top">Symbolic Operand Modifiers.
</td></tr>
</table>

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