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  1. <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
  2. <html>
  3. <!-- This file documents the GNU Assembler "as".
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  15. <title>Z8000-Addressing (Using as)</title>
  16. <meta name="description" content="Z8000-Addressing (Using as)">
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  21. <link href="index.html#Top" rel="start" title="Top">
  22. <link href="AS-Index.html#AS-Index" rel="index" title="AS Index">
  23. <link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">
  24. <link href="Z8000-Syntax.html#Z8000-Syntax" rel="up" title="Z8000 Syntax">
  25. <link href="Z8000-Directives.html#Z8000-Directives" rel="next" title="Z8000 Directives">
  26. <link href="Z8000_002dRegs.html#Z8000_002dRegs" rel="prev" title="Z8000-Regs">
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  56. <a name="Z8000_002dAddressing"></a>
  57. <div class="header">
  58. <p>
  59. Previous: <a href="Z8000_002dRegs.html#Z8000_002dRegs" accesskey="p" rel="prev">Z8000-Regs</a>, Up: <a href="Z8000-Syntax.html#Z8000-Syntax" accesskey="u" rel="up">Z8000 Syntax</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
  60. </div>
  61. <hr>
  62. <a name="Addressing-Modes-5"></a>
  63. <h4 class="subsubsection">9.57.2.3 Addressing Modes</h4>
  64. <a name="index-addressing-modes_002c-Z8000"></a>
  65. <a name="index-Z800-addressing-modes"></a>
  66. <p>as understands the following addressing modes for the Z8000:
  67. </p>
  68. <dl compact="compact">
  69. <dt><code>rl<var>n</var></code></dt>
  70. <dt><code>rh<var>n</var></code></dt>
  71. <dt><code>r<var>n</var></code></dt>
  72. <dt><code>rr<var>n</var></code></dt>
  73. <dt><code>rq<var>n</var></code></dt>
  74. <dd><p>Register direct: 8bit, 16bit, 32bit, and 64bit registers.
  75. </p>
  76. </dd>
  77. <dt><code>@r<var>n</var></code></dt>
  78. <dt><code>@rr<var>n</var></code></dt>
  79. <dd><p>Indirect register: @rr<var>n</var> in segmented mode, @r<var>n</var> in unsegmented
  80. mode.
  81. </p>
  82. </dd>
  83. <dt><code><var>addr</var></code></dt>
  84. <dd><p>Direct: the 16 bit or 24 bit address (depending on whether the assembler
  85. is in segmented or unsegmented mode) of the operand is in the instruction.
  86. </p>
  87. </dd>
  88. <dt><code>address(r<var>n</var>)</code></dt>
  89. <dd><p>Indexed: the 16 or 24 bit address is added to the 16 bit register to produce
  90. the final address in memory of the operand.
  91. </p>
  92. </dd>
  93. <dt><code>r<var>n</var>(#<var>imm</var>)</code></dt>
  94. <dt><code>rr<var>n</var>(#<var>imm</var>)</code></dt>
  95. <dd><p>Base Address: the 16 or 24 bit register is added to the 16 bit sign
  96. extended immediate displacement to produce the final address in memory
  97. of the operand.
  98. </p>
  99. </dd>
  100. <dt><code>r<var>n</var>(r<var>m</var>)</code></dt>
  101. <dt><code>rr<var>n</var>(r<var>m</var>)</code></dt>
  102. <dd><p>Base Index: the 16 or 24 bit register r<var>n</var> or rr<var>n</var> is added to
  103. the sign extended 16 bit index register r<var>m</var> to produce the final
  104. address in memory of the operand.
  105. </p>
  106. </dd>
  107. <dt><code>#<var>xx</var></code></dt>
  108. <dd><p>Immediate data <var>xx</var>.
  109. </p></dd>
  110. </dl>
  111. </body>
  112. </html>