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toolchain-gcc-arm-embedded/share/doc/gcc-arm-none-eabi/html/as.html/i386_002d16bit.html

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  1. <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">

  2. <html>

  3. <!-- This file documents the GNU Assembler "as".

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  7. Permission is granted to copy, distribute and/or modify this document

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  17. <title>i386-16bit (Using as)</title>

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  26. <link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">

  27. <link href="i386_002dDependent.html#i386_002dDependent" rel="up" title="i386-Dependent">

  28. <link href="i386_002dArch.html#i386_002dArch" rel="next" title="i386-Arch">

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  61. <body lang="en">

  62. <a name="i386_002d16bit"></a>

  63. <div class="header">

  64. <p>

  65. Next: <a href="i386_002dArch.html#i386_002dArch" accesskey="n" rel="next">i386-Arch</a>, Previous: <a href="i386_002dTBM.html#i386_002dTBM" accesskey="p" rel="prev">i386-TBM</a>, Up: <a href="i386_002dDependent.html#i386_002dDependent" accesskey="u" rel="up">i386-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>

  66. </div>

  67. <hr>

  68. <a name="Writing-16_002dbit-Code"></a>

  69. <h4 class="subsection">9.16.14 Writing 16-bit Code</h4>

  70. 

  71. <a name="index-i386-16_002dbit-code"></a>

  72. <a name="index-16_002dbit-code_002c-i386"></a>

  73. <a name="index-real_002dmode-code_002c-i386"></a>

  74. <a name="index-code16gcc-directive_002c-i386"></a>

  75. <a name="index-code16-directive_002c-i386"></a>

  76. <a name="index-code32-directive_002c-i386"></a>

  77. <a name="index-code64-directive_002c-i386"></a>

  78. <a name="index-code64-directive_002c-x86_002d64"></a>

  79. <p>While <code>as</code> normally writes only &ldquo;pure&rdquo; 32-bit i386 code

  80. or 64-bit x86-64 code depending on the default configuration,

  81. it also supports writing code to run in real mode or in 16-bit protected

  82. mode code segments.  To do this, put a &lsquo;<samp>.code16</samp>&rsquo; or

  83. &lsquo;<samp>.code16gcc</samp>&rsquo; directive before the assembly language instructions to

  84. be run in 16-bit mode.  You can switch <code>as</code> to writing

  85. 32-bit code with the &lsquo;<samp>.code32</samp>&rsquo; directive or 64-bit code with the

  86. &lsquo;<samp>.code64</samp>&rsquo; directive.

  87. </p>

  88. <p>&lsquo;<samp>.code16gcc</samp>&rsquo; provides experimental support for generating 16-bit

  89. code from gcc, and differs from &lsquo;<samp>.code16</samp>&rsquo; in that &lsquo;<samp>call</samp>&rsquo;,

  90. &lsquo;<samp>ret</samp>&rsquo;, &lsquo;<samp>enter</samp>&rsquo;, &lsquo;<samp>leave</samp>&rsquo;, &lsquo;<samp>push</samp>&rsquo;, &lsquo;<samp>pop</samp>&rsquo;,

  91. &lsquo;<samp>pusha</samp>&rsquo;, &lsquo;<samp>popa</samp>&rsquo;, &lsquo;<samp>pushf</samp>&rsquo;, and &lsquo;<samp>popf</samp>&rsquo; instructions

  92. default to 32-bit size.  This is so that the stack pointer is

  93. manipulated in the same way over function calls, allowing access to

  94. function parameters at the same stack offsets as in 32-bit mode.

  95. &lsquo;<samp>.code16gcc</samp>&rsquo; also automatically adds address size prefixes where

  96. necessary to use the 32-bit addressing modes that gcc generates.

  97. </p>

  98. <p>The code which <code>as</code> generates in 16-bit mode will not

  99. necessarily run on a 16-bit pre-80386 processor.  To write code that

  100. runs on such a processor, you must refrain from using <em>any</em> 32-bit

  101. constructs which require <code>as</code> to output address or operand

  102. size prefixes.

  103. </p>

  104. <p>Note that writing 16-bit code instructions by explicitly specifying a

  105. prefix or an instruction mnemonic suffix within a 32-bit code section

  106. generates different machine instructions than those generated for a

  107. 16-bit code segment.  In a 32-bit code section, the following code

  108. generates the machine opcode bytes &lsquo;<samp>66 6a 04</samp>&rsquo;, which pushes the

  109. value &lsquo;<samp>4</samp>&rsquo; onto the stack, decrementing &lsquo;<samp>%esp</samp>&rsquo; by 2.

  110. </p>

  111. <div class="smallexample">

  112. <pre class="smallexample">        pushw $4

  113. </pre></div>

  114. 

  115. <p>The same code in a 16-bit code section would generate the machine

  116. opcode bytes &lsquo;<samp>6a 04</samp>&rsquo; (i.e., without the operand size prefix), which

  117. is correct since the processor default operand size is assumed to be 16

  118. bits in a 16-bit code section.

  119. </p>

  120. <hr>

  121. <div class="header">

  122. <p>

  123. Next: <a href="i386_002dArch.html#i386_002dArch" accesskey="n" rel="next">i386-Arch</a>, Previous: <a href="i386_002dTBM.html#i386_002dTBM" accesskey="p" rel="prev">i386-TBM</a>, Up: <a href="i386_002dDependent.html#i386_002dDependent" accesskey="u" rel="up">i386-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>

  124. </div>

  125. 

  126. 

  127. 

  128. </body>

  129. </html>