選択できるのは25トピックまでです。 トピックは、先頭が英数字で、英数字とダッシュ('-')を使用した35文字以内のものにしてください。

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  56. <a name="s390-Mnemonics"></a>
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  58. <p>
  59. Next: <a href="s390-Operands.html#s390-Operands" accesskey="n" rel="next">s390 Operands</a>, Previous: <a href="s390-Register.html#s390-Register" accesskey="p" rel="prev">s390 Register</a>, Up: <a href="s390-Syntax.html#s390-Syntax" accesskey="u" rel="up">s390 Syntax</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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  62. <a name="Instruction-Mnemonics"></a>
  63. <h4 class="subsubsection">9.41.3.2 Instruction Mnemonics</h4>
  64. <a name="index-instruction-mnemonics_002c-s390"></a>
  65. <a name="index-s390-instruction-mnemonics"></a>
  66. <p>All instructions documented in the Principles of Operation are supported
  67. with the mnemonic and order of operands as described.
  68. The instruction mnemonic identifies the instruction format
  69. (<a href="s390-Formats.html#s390-Formats">s390 Formats</a>) and the specific operation code for the instruction.
  70. For example, the &lsquo;<samp>lr</samp>&rsquo; mnemonic denotes the instruction format &lsquo;<samp>RR</samp>&rsquo;
  71. with the operation code &lsquo;<samp>0x18</samp>&rsquo;.
  72. </p>
  73. <p>The definition of the various mnemonics follows a scheme, where the first
  74. character usually hint at the type of the instruction:
  75. </p>
  76. <div class="display">
  77. <table>
  78. <tr><td><pre class="display">a</pre></td><td><pre class="display">add instruction, for example &lsquo;<samp>al</samp>&rsquo; for add logical 32-bit</pre></td></tr>
  79. <tr><td><pre class="display">b</pre></td><td><pre class="display">branch instruction, for example &lsquo;<samp>bc</samp>&rsquo; for branch on condition</pre></td></tr>
  80. <tr><td><pre class="display">c</pre></td><td><pre class="display">compare or convert instruction, for example &lsquo;<samp>cr</samp>&rsquo; for compare
  81. register 32-bit</pre></td></tr>
  82. <tr><td><pre class="display">d</pre></td><td><pre class="display">divide instruction, for example &lsquo;<samp>dlr</samp>&rsquo; devide logical register
  83. 64-bit to 32-bit</pre></td></tr>
  84. <tr><td><pre class="display">i</pre></td><td><pre class="display">insert instruction, for example &lsquo;<samp>ic</samp>&rsquo; insert character</pre></td></tr>
  85. <tr><td><pre class="display">l</pre></td><td><pre class="display">load instruction, for example &lsquo;<samp>ltr</samp>&rsquo; load and test register</pre></td></tr>
  86. <tr><td><pre class="display">mv</pre></td><td><pre class="display">move instruction, for example &lsquo;<samp>mvc</samp>&rsquo; move character</pre></td></tr>
  87. <tr><td><pre class="display">m</pre></td><td><pre class="display">multiply instruction, for example &lsquo;<samp>mh</samp>&rsquo; multiply halfword</pre></td></tr>
  88. <tr><td><pre class="display">n</pre></td><td><pre class="display">and instruction, for example &lsquo;<samp>ni</samp>&rsquo; and immediate</pre></td></tr>
  89. <tr><td><pre class="display">o</pre></td><td><pre class="display">or instruction, for example &lsquo;<samp>oc</samp>&rsquo; or character</pre></td></tr>
  90. <tr><td><pre class="display">sla, sll</pre></td><td><pre class="display">shift left single instruction</pre></td></tr>
  91. <tr><td><pre class="display">sra, srl</pre></td><td><pre class="display">shift right single instruction</pre></td></tr>
  92. <tr><td><pre class="display">st</pre></td><td><pre class="display">store instruction, for example &lsquo;<samp>stm</samp>&rsquo; store multiple</pre></td></tr>
  93. <tr><td><pre class="display">s</pre></td><td><pre class="display">subtract instruction, for example &lsquo;<samp>slr</samp>&rsquo; subtract
  94. logical 32-bit</pre></td></tr>
  95. <tr><td><pre class="display">t</pre></td><td><pre class="display">test or translate instruction, of example &lsquo;<samp>tm</samp>&rsquo; test under mask</pre></td></tr>
  96. <tr><td><pre class="display">x</pre></td><td><pre class="display">exclusive or instruction, for example &lsquo;<samp>xc</samp>&rsquo; exclusive or
  97. character</pre></td></tr>
  98. </table>
  99. </div>
  100. <p>Certain characters at the end of the mnemonic may describe a property
  101. of the instruction:
  102. </p>
  103. <div class="display">
  104. <table>
  105. <tr><td><pre class="display">c</pre></td><td><pre class="display">the instruction uses a 8-bit character operand</pre></td></tr>
  106. <tr><td><pre class="display">f</pre></td><td><pre class="display">the instruction extends a 32-bit operand to 64 bit</pre></td></tr>
  107. <tr><td><pre class="display">g</pre></td><td><pre class="display">the operands are treated as 64-bit values</pre></td></tr>
  108. <tr><td><pre class="display">h</pre></td><td><pre class="display">the operand uses a 16-bit halfword operand</pre></td></tr>
  109. <tr><td><pre class="display">i</pre></td><td><pre class="display">the instruction uses an immediate operand</pre></td></tr>
  110. <tr><td><pre class="display">l</pre></td><td><pre class="display">the instruction uses unsigned, logical operands</pre></td></tr>
  111. <tr><td><pre class="display">m</pre></td><td><pre class="display">the instruction uses a mask or operates on multiple values</pre></td></tr>
  112. <tr><td><pre class="display">r</pre></td><td><pre class="display">if r is the last character, the instruction operates on registers</pre></td></tr>
  113. <tr><td><pre class="display">y</pre></td><td><pre class="display">the instruction uses 20-bit displacements</pre></td></tr>
  114. </table>
  115. </div>
  116. <p>There are many exceptions to the scheme outlined in the above lists, in
  117. particular for the privileged instructions. For non-privileged
  118. instruction it works quite well, for example the instruction &lsquo;<samp>clgfr</samp>&rsquo;
  119. c: compare instruction, l: unsigned operands, g: 64-bit operands,
  120. f: 32- to 64-bit extension, r: register operands. The instruction compares
  121. an 64-bit value in a register with the zero extended 32-bit value from
  122. a second register.
  123. For a complete list of all mnemonics see appendix B in the Principles
  124. of Operation.
  125. </p>
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