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  25. <title>Blackfin Options (Using the GNU Compiler Collection (GCC))</title>

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  34. <link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">

  35. <link href="Submodel-Options.html#Submodel-Options" rel="up" title="Submodel Options">

  36. <link href="C6X-Options.html#C6X-Options" rel="next" title="C6X Options">

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  70. <a name="Blackfin-Options"></a>

  71. <div class="header">

  72. <p>

  73. Next: <a href="C6X-Options.html#C6X-Options" accesskey="n" rel="next">C6X Options</a>, Previous: <a href="AVR-Options.html#AVR-Options" accesskey="p" rel="prev">AVR Options</a>, Up: <a href="Submodel-Options.html#Submodel-Options" accesskey="u" rel="up">Submodel Options</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>

  74. </div>

  75. <hr>

  76. <a name="Blackfin-Options-1"></a>

  77. <h4 class="subsection">3.19.7 Blackfin Options</h4>

  78. <a name="index-Blackfin-Options"></a>

  79. 

  80. <dl compact="compact">

  81. <dt><code>-mcpu=<var>cpu</var><span class="roman">[</span>-<var>sirevision</var><span class="roman">]</span></code></dt>

  82. <dd><a name="index-mcpu_003d"></a>

  83. <p>Specifies the name of the target Blackfin processor.  Currently, <var>cpu</var>

  84. can be one of &lsquo;<samp>bf512</samp>&rsquo;, &lsquo;<samp>bf514</samp>&rsquo;, &lsquo;<samp>bf516</samp>&rsquo;, &lsquo;<samp>bf518</samp>&rsquo;,

  85. &lsquo;<samp>bf522</samp>&rsquo;, &lsquo;<samp>bf523</samp>&rsquo;, &lsquo;<samp>bf524</samp>&rsquo;, &lsquo;<samp>bf525</samp>&rsquo;, &lsquo;<samp>bf526</samp>&rsquo;,

  86. &lsquo;<samp>bf527</samp>&rsquo;, &lsquo;<samp>bf531</samp>&rsquo;, &lsquo;<samp>bf532</samp>&rsquo;, &lsquo;<samp>bf533</samp>&rsquo;,

  87. &lsquo;<samp>bf534</samp>&rsquo;, &lsquo;<samp>bf536</samp>&rsquo;, &lsquo;<samp>bf537</samp>&rsquo;, &lsquo;<samp>bf538</samp>&rsquo;, &lsquo;<samp>bf539</samp>&rsquo;,

  88. &lsquo;<samp>bf542</samp>&rsquo;, &lsquo;<samp>bf544</samp>&rsquo;, &lsquo;<samp>bf547</samp>&rsquo;, &lsquo;<samp>bf548</samp>&rsquo;, &lsquo;<samp>bf549</samp>&rsquo;,

  89. &lsquo;<samp>bf542m</samp>&rsquo;, &lsquo;<samp>bf544m</samp>&rsquo;, &lsquo;<samp>bf547m</samp>&rsquo;, &lsquo;<samp>bf548m</samp>&rsquo;, &lsquo;<samp>bf549m</samp>&rsquo;,

  90. &lsquo;<samp>bf561</samp>&rsquo;, &lsquo;<samp>bf592</samp>&rsquo;.

  91. </p>

  92. <p>The optional <var>sirevision</var> specifies the silicon revision of the target

  93. Blackfin processor.  Any workarounds available for the targeted silicon revision

  94. are enabled.  If <var>sirevision</var> is &lsquo;<samp>none</samp>&rsquo;, no workarounds are enabled.

  95. If <var>sirevision</var> is &lsquo;<samp>any</samp>&rsquo;, all workarounds for the targeted processor

  96. are enabled.  The <code>__SILICON_REVISION__</code> macro is defined to two

  97. hexadecimal digits representing the major and minor numbers in the silicon

  98. revision.  If <var>sirevision</var> is &lsquo;<samp>none</samp>&rsquo;, the <code>__SILICON_REVISION__</code>

  99. is not defined.  If <var>sirevision</var> is &lsquo;<samp>any</samp>&rsquo;, the

  100. <code>__SILICON_REVISION__</code> is defined to be <code>0xffff</code>.

  101. If this optional <var>sirevision</var> is not used, GCC assumes the latest known

  102. silicon revision of the targeted Blackfin processor.

  103. </p>

  104. <p>GCC defines a preprocessor macro for the specified <var>cpu</var>.

  105. For the &lsquo;<samp>bfin-elf</samp>&rsquo; toolchain, this option causes the hardware BSP

  106. provided by libgloss to be linked in if <samp>-msim</samp> is not given.

  107. </p>

  108. <p>Without this option, &lsquo;<samp>bf532</samp>&rsquo; is used as the processor by default.

  109. </p>

  110. <p>Note that support for &lsquo;<samp>bf561</samp>&rsquo; is incomplete.  For &lsquo;<samp>bf561</samp>&rsquo;,

  111. only the preprocessor macro is defined.

  112. </p>

  113. </dd>

  114. <dt><code>-msim</code></dt>

  115. <dd><a name="index-msim"></a>

  116. <p>Specifies that the program will be run on the simulator.  This causes

  117. the simulator BSP provided by libgloss to be linked in.  This option

  118. has effect only for &lsquo;<samp>bfin-elf</samp>&rsquo; toolchain.

  119. Certain other options, such as <samp>-mid-shared-library</samp> and

  120. <samp>-mfdpic</samp>, imply <samp>-msim</samp>.

  121. </p>

  122. </dd>

  123. <dt><code>-momit-leaf-frame-pointer</code></dt>

  124. <dd><a name="index-momit_002dleaf_002dframe_002dpointer-1"></a>

  125. <p>Don&rsquo;t keep the frame pointer in a register for leaf functions.  This

  126. avoids the instructions to save, set up and restore frame pointers and

  127. makes an extra register available in leaf functions.

  128. </p>

  129. </dd>

  130. <dt><code>-mspecld-anomaly</code></dt>

  131. <dd><a name="index-mspecld_002danomaly"></a>

  132. <p>When enabled, the compiler ensures that the generated code does not

  133. contain speculative loads after jump instructions. If this option is used,

  134. <code>__WORKAROUND_SPECULATIVE_LOADS</code> is defined.

  135. </p>

  136. </dd>

  137. <dt><code>-mno-specld-anomaly</code></dt>

  138. <dd><a name="index-mno_002dspecld_002danomaly"></a>

  139. <a name="index-mspecld_002danomaly-1"></a>

  140. <p>Don&rsquo;t generate extra code to prevent speculative loads from occurring.

  141. </p>

  142. </dd>

  143. <dt><code>-mcsync-anomaly</code></dt>

  144. <dd><a name="index-mcsync_002danomaly"></a>

  145. <p>When enabled, the compiler ensures that the generated code does not

  146. contain CSYNC or SSYNC instructions too soon after conditional branches.

  147. If this option is used, <code>__WORKAROUND_SPECULATIVE_SYNCS</code> is defined.

  148. </p>

  149. </dd>

  150. <dt><code>-mno-csync-anomaly</code></dt>

  151. <dd><a name="index-mno_002dcsync_002danomaly"></a>

  152. <a name="index-mcsync_002danomaly-1"></a>

  153. <p>Don&rsquo;t generate extra code to prevent CSYNC or SSYNC instructions from

  154. occurring too soon after a conditional branch.

  155. </p>

  156. </dd>

  157. <dt><code>-mlow64k</code></dt>

  158. <dd><a name="index-mlow64k"></a>

  159. <p>When enabled, the compiler is free to take advantage of the knowledge that

  160. the entire program fits into the low 64k of memory.

  161. </p>

  162. </dd>

  163. <dt><code>-mno-low64k</code></dt>

  164. <dd><a name="index-mno_002dlow64k"></a>

  165. <p>Assume that the program is arbitrarily large.  This is the default.

  166. </p>

  167. </dd>

  168. <dt><code>-mstack-check-l1</code></dt>

  169. <dd><a name="index-mstack_002dcheck_002dl1"></a>

  170. <p>Do stack checking using information placed into L1 scratchpad memory by the

  171. uClinux kernel.

  172. </p>

  173. </dd>

  174. <dt><code>-mid-shared-library</code></dt>

  175. <dd><a name="index-mid_002dshared_002dlibrary"></a>

  176. <p>Generate code that supports shared libraries via the library ID method.

  177. This allows for execute in place and shared libraries in an environment

  178. without virtual memory management.  This option implies <samp>-fPIC</samp>.

  179. With a &lsquo;<samp>bfin-elf</samp>&rsquo; target, this option implies <samp>-msim</samp>.

  180. </p>

  181. </dd>

  182. <dt><code>-mno-id-shared-library</code></dt>

  183. <dd><a name="index-mno_002did_002dshared_002dlibrary"></a>

  184. <a name="index-mid_002dshared_002dlibrary-1"></a>

  185. <p>Generate code that doesn&rsquo;t assume ID-based shared libraries are being used.

  186. This is the default.

  187. </p>

  188. </dd>

  189. <dt><code>-mleaf-id-shared-library</code></dt>

  190. <dd><a name="index-mleaf_002did_002dshared_002dlibrary"></a>

  191. <p>Generate code that supports shared libraries via the library ID method,

  192. but assumes that this library or executable won&rsquo;t link against any other

  193. ID shared libraries.  That allows the compiler to use faster code for jumps

  194. and calls.

  195. </p>

  196. </dd>

  197. <dt><code>-mno-leaf-id-shared-library</code></dt>

  198. <dd><a name="index-mno_002dleaf_002did_002dshared_002dlibrary"></a>

  199. <a name="index-mleaf_002did_002dshared_002dlibrary-1"></a>

  200. <p>Do not assume that the code being compiled won&rsquo;t link against any ID shared

  201. libraries.  Slower code is generated for jump and call insns.

  202. </p>

  203. </dd>

  204. <dt><code>-mshared-library-id=n</code></dt>

  205. <dd><a name="index-mshared_002dlibrary_002did"></a>

  206. <p>Specifies the identification number of the ID-based shared library being

  207. compiled.  Specifying a value of 0 generates more compact code; specifying

  208. other values forces the allocation of that number to the current

  209. library but is no more space- or time-efficient than omitting this option.

  210. </p>

  211. </dd>

  212. <dt><code>-msep-data</code></dt>

  213. <dd><a name="index-msep_002ddata"></a>

  214. <p>Generate code that allows the data segment to be located in a different

  215. area of memory from the text segment.  This allows for execute in place in

  216. an environment without virtual memory management by eliminating relocations

  217. against the text section.

  218. </p>

  219. </dd>

  220. <dt><code>-mno-sep-data</code></dt>

  221. <dd><a name="index-mno_002dsep_002ddata"></a>

  222. <a name="index-msep_002ddata-1"></a>

  223. <p>Generate code that assumes that the data segment follows the text segment.

  224. This is the default.

  225. </p>

  226. </dd>

  227. <dt><code>-mlong-calls</code></dt>

  228. <dt><code>-mno-long-calls</code></dt>

  229. <dd><a name="index-mlong_002dcalls-3"></a>

  230. <a name="index-mno_002dlong_002dcalls-1"></a>

  231. <p>Tells the compiler to perform function calls by first loading the

  232. address of the function into a register and then performing a subroutine

  233. call on this register.  This switch is needed if the target function

  234. lies outside of the 24-bit addressing range of the offset-based

  235. version of subroutine call instruction.

  236. </p>

  237. <p>This feature is not enabled by default.  Specifying

  238. <samp>-mno-long-calls</samp> restores the default behavior.  Note these

  239. switches have no effect on how the compiler generates code to handle

  240. function calls via function pointers.

  241. </p>

  242. </dd>

  243. <dt><code>-mfast-fp</code></dt>

  244. <dd><a name="index-mfast_002dfp"></a>

  245. <p>Link with the fast floating-point library. This library relaxes some of

  246. the IEEE floating-point standard&rsquo;s rules for checking inputs against

  247. Not-a-Number (NAN), in the interest of performance.

  248. </p>

  249. </dd>

  250. <dt><code>-minline-plt</code></dt>

  251. <dd><a name="index-minline_002dplt"></a>

  252. <p>Enable inlining of PLT entries in function calls to functions that are

  253. not known to bind locally.  It has no effect without <samp>-mfdpic</samp>.

  254. </p>

  255. </dd>

  256. <dt><code>-mmulticore</code></dt>

  257. <dd><a name="index-mmulticore"></a>

  258. <p>Build a standalone application for multicore Blackfin processors. 

  259. This option causes proper start files and link scripts supporting 

  260. multicore to be used, and defines the macro <code>__BFIN_MULTICORE</code>. 

  261. It can only be used with <samp>-mcpu=bf561<span class="roman">[</span>-<var>sirevision</var><span class="roman">]</span></samp>. 

  262. </p>

  263. <p>This option can be used with <samp>-mcorea</samp> or <samp>-mcoreb</samp>, which

  264. selects the one-application-per-core programming model.  Without

  265. <samp>-mcorea</samp> or <samp>-mcoreb</samp>, the single-application/dual-core

  266. programming model is used. In this model, the main function of Core B

  267. should be named as <code>coreb_main</code>.

  268. </p>

  269. <p>If this option is not used, the single-core application programming

  270. model is used.

  271. </p>

  272. </dd>

  273. <dt><code>-mcorea</code></dt>

  274. <dd><a name="index-mcorea"></a>

  275. <p>Build a standalone application for Core A of BF561 when using

  276. the one-application-per-core programming model. Proper start files

  277. and link scripts are used to support Core A, and the macro

  278. <code>__BFIN_COREA</code> is defined.

  279. This option can only be used in conjunction with <samp>-mmulticore</samp>.

  280. </p>

  281. </dd>

  282. <dt><code>-mcoreb</code></dt>

  283. <dd><a name="index-mcoreb"></a>

  284. <p>Build a standalone application for Core B of BF561 when using

  285. the one-application-per-core programming model. Proper start files

  286. and link scripts are used to support Core B, and the macro

  287. <code>__BFIN_COREB</code> is defined. When this option is used, <code>coreb_main</code>

  288. should be used instead of <code>main</code>. 

  289. This option can only be used in conjunction with <samp>-mmulticore</samp>.

  290. </p>

  291. </dd>

  292. <dt><code>-msdram</code></dt>

  293. <dd><a name="index-msdram"></a>

  294. <p>Build a standalone application for SDRAM. Proper start files and

  295. link scripts are used to put the application into SDRAM, and the macro

  296. <code>__BFIN_SDRAM</code> is defined.

  297. The loader should initialize SDRAM before loading the application.

  298. </p>

  299. </dd>

  300. <dt><code>-micplb</code></dt>

  301. <dd><a name="index-micplb"></a>

  302. <p>Assume that ICPLBs are enabled at run time.  This has an effect on certain

  303. anomaly workarounds.  For Linux targets, the default is to assume ICPLBs

  304. are enabled; for standalone applications the default is off.

  305. </p></dd>

  306. </dl>

  307. 

  308. <hr>

  309. <div class="header">

  310. <p>

  311. Next: <a href="C6X-Options.html#C6X-Options" accesskey="n" rel="next">C6X Options</a>, Previous: <a href="AVR-Options.html#AVR-Options" accesskey="p" rel="prev">AVR Options</a>, Up: <a href="Submodel-Options.html#Submodel-Options" accesskey="u" rel="up">Submodel Options</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>

  312. </div>

  313. 

  314. 

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