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  20. <title>MIPS Paired-Single Support (Using the GNU Compiler Collection (GCC))</title>
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  61. <a name="MIPS-Paired_002dSingle-Support"></a>
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  64. Next: <a href="MIPS-Loongson-Built_002din-Functions.html#MIPS-Loongson-Built_002din-Functions" accesskey="n" rel="next">MIPS Loongson Built-in Functions</a>, Previous: <a href="MIPS-DSP-Built_002din-Functions.html#MIPS-DSP-Built_002din-Functions" accesskey="p" rel="prev">MIPS DSP Built-in Functions</a>, Up: <a href="Target-Builtins.html#Target-Builtins" accesskey="u" rel="up">Target Builtins</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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  67. <a name="MIPS-Paired_002dSingle-Support-1"></a>
  68. <h4 class="subsection">6.60.15 MIPS Paired-Single Support</h4>
  69. <p>The MIPS64 architecture includes a number of instructions that
  70. operate on pairs of single-precision floating-point values.
  71. Each pair is packed into a 64-bit floating-point register,
  72. with one element being designated the &ldquo;upper half&rdquo; and
  73. the other being designated the &ldquo;lower half&rdquo;.
  74. </p>
  75. <p>GCC supports paired-single operations using both the generic
  76. vector extensions (see <a href="Vector-Extensions.html#Vector-Extensions">Vector Extensions</a>) and a collection of
  77. MIPS-specific built-in functions. Both kinds of support are
  78. enabled by the <samp>-mpaired-single</samp> command-line option.
  79. </p>
  80. <p>The vector type associated with paired-single values is usually
  81. called <code>v2sf</code>. It can be defined in C as follows:
  82. </p>
  83. <div class="smallexample">
  84. <pre class="smallexample">typedef float v2sf __attribute__ ((vector_size (8)));
  85. </pre></div>
  86. <p><code>v2sf</code> values are initialized in the same way as aggregates.
  87. For example:
  88. </p>
  89. <div class="smallexample">
  90. <pre class="smallexample">v2sf a = {1.5, 9.1};
  91. v2sf b;
  92. float e, f;
  93. b = (v2sf) {e, f};
  94. </pre></div>
  95. <p><em>Note:</em> The CPU&rsquo;s endianness determines which value is stored in
  96. the upper half of a register and which value is stored in the lower half.
  97. On little-endian targets, the first value is the lower one and the second
  98. value is the upper one. The opposite order applies to big-endian targets.
  99. For example, the code above sets the lower half of <code>a</code> to
  100. <code>1.5</code> on little-endian targets and <code>9.1</code> on big-endian targets.
  101. </p>
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