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  61. <a name="RX-Options"></a>
  62. <div class="header">
  63. <p>
  64. Next: <a href="S_002f390-and-zSeries-Options.html#S_002f390-and-zSeries-Options" accesskey="n" rel="next">S/390 and zSeries Options</a>, Previous: <a href="RS_002f6000-and-PowerPC-Options.html#RS_002f6000-and-PowerPC-Options" accesskey="p" rel="prev">RS/6000 and PowerPC Options</a>, Up: <a href="Submodel-Options.html#Submodel-Options" accesskey="u" rel="up">Submodel Options</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
  65. </div>
  66. <hr>
  67. <a name="RX-Options-1"></a>
  68. <h4 class="subsection">3.19.45 RX Options</h4>
  69. <a name="index-RX-Options"></a>
  70. <p>These command-line options are defined for RX targets:
  71. </p>
  72. <dl compact="compact">
  73. <dt><code>-m64bit-doubles</code></dt>
  74. <dt><code>-m32bit-doubles</code></dt>
  75. <dd><a name="index-m64bit_002ddoubles-1"></a>
  76. <a name="index-m32bit_002ddoubles-1"></a>
  77. <p>Make the <code>double</code> data type be 64 bits (<samp>-m64bit-doubles</samp>)
  78. or 32 bits (<samp>-m32bit-doubles</samp>) in size. The default is
  79. <samp>-m32bit-doubles</samp>. <em>Note</em> RX floating-point hardware only
  80. works on 32-bit values, which is why the default is
  81. <samp>-m32bit-doubles</samp>.
  82. </p>
  83. </dd>
  84. <dt><code>-fpu</code></dt>
  85. <dt><code>-nofpu</code></dt>
  86. <dd><a name="index-fpu"></a>
  87. <a name="index-nofpu"></a>
  88. <p>Enables (<samp>-fpu</samp>) or disables (<samp>-nofpu</samp>) the use of RX
  89. floating-point hardware. The default is enabled for the RX600
  90. series and disabled for the RX200 series.
  91. </p>
  92. <p>Floating-point instructions are only generated for 32-bit floating-point
  93. values, however, so the FPU hardware is not used for doubles if the
  94. <samp>-m64bit-doubles</samp> option is used.
  95. </p>
  96. <p><em>Note</em> If the <samp>-fpu</samp> option is enabled then
  97. <samp>-funsafe-math-optimizations</samp> is also enabled automatically.
  98. This is because the RX FPU instructions are themselves unsafe.
  99. </p>
  100. </dd>
  101. <dt><code>-mcpu=<var>name</var></code></dt>
  102. <dd><a name="index-mcpu-10"></a>
  103. <p>Selects the type of RX CPU to be targeted. Currently three types are
  104. supported, the generic &lsquo;<samp>RX600</samp>&rsquo; and &lsquo;<samp>RX200</samp>&rsquo; series hardware and
  105. the specific &lsquo;<samp>RX610</samp>&rsquo; CPU. The default is &lsquo;<samp>RX600</samp>&rsquo;.
  106. </p>
  107. <p>The only difference between &lsquo;<samp>RX600</samp>&rsquo; and &lsquo;<samp>RX610</samp>&rsquo; is that the
  108. &lsquo;<samp>RX610</samp>&rsquo; does not support the <code>MVTIPL</code> instruction.
  109. </p>
  110. <p>The &lsquo;<samp>RX200</samp>&rsquo; series does not have a hardware floating-point unit
  111. and so <samp>-nofpu</samp> is enabled by default when this type is
  112. selected.
  113. </p>
  114. </dd>
  115. <dt><code>-mbig-endian-data</code></dt>
  116. <dt><code>-mlittle-endian-data</code></dt>
  117. <dd><a name="index-mbig_002dendian_002ddata"></a>
  118. <a name="index-mlittle_002dendian_002ddata"></a>
  119. <p>Store data (but not code) in the big-endian format. The default is
  120. <samp>-mlittle-endian-data</samp>, i.e. to store data in the little-endian
  121. format.
  122. </p>
  123. </dd>
  124. <dt><code>-msmall-data-limit=<var>N</var></code></dt>
  125. <dd><a name="index-msmall_002ddata_002dlimit-1"></a>
  126. <p>Specifies the maximum size in bytes of global and static variables
  127. which can be placed into the small data area. Using the small data
  128. area can lead to smaller and faster code, but the size of area is
  129. limited and it is up to the programmer to ensure that the area does
  130. not overflow. Also when the small data area is used one of the RX&rsquo;s
  131. registers (usually <code>r13</code>) is reserved for use pointing to this
  132. area, so it is no longer available for use by the compiler. This
  133. could result in slower and/or larger code if variables are pushed onto
  134. the stack instead of being held in this register.
  135. </p>
  136. <p>Note, common variables (variables that have not been initialized) and
  137. constants are not placed into the small data area as they are assigned
  138. to other sections in the output executable.
  139. </p>
  140. <p>The default value is zero, which disables this feature. Note, this
  141. feature is not enabled by default with higher optimization levels
  142. (<samp>-O2</samp> etc) because of the potentially detrimental effects of
  143. reserving a register. It is up to the programmer to experiment and
  144. discover whether this feature is of benefit to their program. See the
  145. description of the <samp>-mpid</samp> option for a description of how the
  146. actual register to hold the small data area pointer is chosen.
  147. </p>
  148. </dd>
  149. <dt><code>-msim</code></dt>
  150. <dt><code>-mno-sim</code></dt>
  151. <dd><a name="index-msim-9"></a>
  152. <a name="index-mno_002dsim"></a>
  153. <p>Use the simulator runtime. The default is to use the libgloss
  154. board-specific runtime.
  155. </p>
  156. </dd>
  157. <dt><code>-mas100-syntax</code></dt>
  158. <dt><code>-mno-as100-syntax</code></dt>
  159. <dd><a name="index-mas100_002dsyntax"></a>
  160. <a name="index-mno_002das100_002dsyntax"></a>
  161. <p>When generating assembler output use a syntax that is compatible with
  162. Renesas&rsquo;s AS100 assembler. This syntax can also be handled by the GAS
  163. assembler, but it has some restrictions so it is not generated by default.
  164. </p>
  165. </dd>
  166. <dt><code>-mmax-constant-size=<var>N</var></code></dt>
  167. <dd><a name="index-mmax_002dconstant_002dsize"></a>
  168. <p>Specifies the maximum size, in bytes, of a constant that can be used as
  169. an operand in a RX instruction. Although the RX instruction set does
  170. allow constants of up to 4 bytes in length to be used in instructions,
  171. a longer value equates to a longer instruction. Thus in some
  172. circumstances it can be beneficial to restrict the size of constants
  173. that are used in instructions. Constants that are too big are instead
  174. placed into a constant pool and referenced via register indirection.
  175. </p>
  176. <p>The value <var>N</var> can be between 0 and 4. A value of 0 (the default)
  177. or 4 means that constants of any size are allowed.
  178. </p>
  179. </dd>
  180. <dt><code>-mrelax</code></dt>
  181. <dd><a name="index-mrelax-5"></a>
  182. <p>Enable linker relaxation. Linker relaxation is a process whereby the
  183. linker attempts to reduce the size of a program by finding shorter
  184. versions of various instructions. Disabled by default.
  185. </p>
  186. </dd>
  187. <dt><code>-mint-register=<var>N</var></code></dt>
  188. <dd><a name="index-mint_002dregister"></a>
  189. <p>Specify the number of registers to reserve for fast interrupt handler
  190. functions. The value <var>N</var> can be between 0 and 4. A value of 1
  191. means that register <code>r13</code> is reserved for the exclusive use
  192. of fast interrupt handlers. A value of 2 reserves <code>r13</code> and
  193. <code>r12</code>. A value of 3 reserves <code>r13</code>, <code>r12</code> and
  194. <code>r11</code>, and a value of 4 reserves <code>r13</code> through <code>r10</code>.
  195. A value of 0, the default, does not reserve any registers.
  196. </p>
  197. </dd>
  198. <dt><code>-msave-acc-in-interrupts</code></dt>
  199. <dd><a name="index-msave_002dacc_002din_002dinterrupts"></a>
  200. <p>Specifies that interrupt handler functions should preserve the
  201. accumulator register. This is only necessary if normal code might use
  202. the accumulator register, for example because it performs 64-bit
  203. multiplications. The default is to ignore the accumulator as this
  204. makes the interrupt handlers faster.
  205. </p>
  206. </dd>
  207. <dt><code>-mpid</code></dt>
  208. <dt><code>-mno-pid</code></dt>
  209. <dd><a name="index-mpid"></a>
  210. <a name="index-mno_002dpid"></a>
  211. <p>Enables the generation of position independent data. When enabled any
  212. access to constant data is done via an offset from a base address
  213. held in a register. This allows the location of constant data to be
  214. determined at run time without requiring the executable to be
  215. relocated, which is a benefit to embedded applications with tight
  216. memory constraints. Data that can be modified is not affected by this
  217. option.
  218. </p>
  219. <p>Note, using this feature reserves a register, usually <code>r13</code>, for
  220. the constant data base address. This can result in slower and/or
  221. larger code, especially in complicated functions.
  222. </p>
  223. <p>The actual register chosen to hold the constant data base address
  224. depends upon whether the <samp>-msmall-data-limit</samp> and/or the
  225. <samp>-mint-register</samp> command-line options are enabled. Starting
  226. with register <code>r13</code> and proceeding downwards, registers are
  227. allocated first to satisfy the requirements of <samp>-mint-register</samp>,
  228. then <samp>-mpid</samp> and finally <samp>-msmall-data-limit</samp>. Thus it
  229. is possible for the small data area register to be <code>r8</code> if both
  230. <samp>-mint-register=4</samp> and <samp>-mpid</samp> are specified on the
  231. command line.
  232. </p>
  233. <p>By default this feature is not enabled. The default can be restored
  234. via the <samp>-mno-pid</samp> command-line option.
  235. </p>
  236. </dd>
  237. <dt><code>-mno-warn-multiple-fast-interrupts</code></dt>
  238. <dt><code>-mwarn-multiple-fast-interrupts</code></dt>
  239. <dd><a name="index-mno_002dwarn_002dmultiple_002dfast_002dinterrupts"></a>
  240. <a name="index-mwarn_002dmultiple_002dfast_002dinterrupts"></a>
  241. <p>Prevents GCC from issuing a warning message if it finds more than one
  242. fast interrupt handler when it is compiling a file. The default is to
  243. issue a warning for each extra fast interrupt handler found, as the RX
  244. only supports one such interrupt.
  245. </p>
  246. </dd>
  247. <dt><code>-mallow-string-insns</code></dt>
  248. <dt><code>-mno-allow-string-insns</code></dt>
  249. <dd><a name="index-mallow_002dstring_002dinsns"></a>
  250. <a name="index-mno_002dallow_002dstring_002dinsns"></a>
  251. <p>Enables or disables the use of the string manipulation instructions
  252. <code>SMOVF</code>, <code>SCMPU</code>, <code>SMOVB</code>, <code>SMOVU</code>, <code>SUNTIL</code>
  253. <code>SWHILE</code> and also the <code>RMPA</code> instruction. These
  254. instructions may prefetch data, which is not safe to do if accessing
  255. an I/O register. (See section 12.2.7 of the RX62N Group User&rsquo;s Manual
  256. for more information).
  257. </p>
  258. <p>The default is to allow these instructions, but it is not possible for
  259. GCC to reliably detect all circumstances where a string instruction
  260. might be used to access an I/O register, so their use cannot be
  261. disabled automatically. Instead it is reliant upon the programmer to
  262. use the <samp>-mno-allow-string-insns</samp> option if their program
  263. accesses I/O space.
  264. </p>
  265. <p>When the instructions are enabled GCC defines the C preprocessor
  266. symbol <code>__RX_ALLOW_STRING_INSNS__</code>, otherwise it defines the
  267. symbol <code>__RX_DISALLOW_STRING_INSNS__</code>.
  268. </p>
  269. </dd>
  270. <dt><code>-mjsr</code></dt>
  271. <dt><code>-mno-jsr</code></dt>
  272. <dd><a name="index-mjsr"></a>
  273. <a name="index-mno_002djsr"></a>
  274. <p>Use only (or not only) <code>JSR</code> instructions to access functions.
  275. This option can be used when code size exceeds the range of <code>BSR</code>
  276. instructions. Note that <samp>-mno-jsr</samp> does not mean to not use
  277. <code>JSR</code> but instead means that any type of branch may be used.
  278. </p></dd>
  279. </dl>
  280. <p><em>Note:</em> The generic GCC command-line option <samp>-ffixed-<var>reg</var></samp>
  281. has special significance to the RX port when used with the
  282. <code>interrupt</code> function attribute. This attribute indicates a
  283. function intended to process fast interrupts. GCC ensures
  284. that it only uses the registers <code>r10</code>, <code>r11</code>, <code>r12</code>
  285. and/or <code>r13</code> and only provided that the normal use of the
  286. corresponding registers have been restricted via the
  287. <samp>-ffixed-<var>reg</var></samp> or <samp>-mint-register</samp> command-line
  288. options.
  289. </p>
  290. <hr>
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  292. <p>
  293. Next: <a href="S_002f390-and-zSeries-Options.html#S_002f390-and-zSeries-Options" accesskey="n" rel="next">S/390 and zSeries Options</a>, Previous: <a href="RS_002f6000-and-PowerPC-Options.html#RS_002f6000-and-PowerPC-Options" accesskey="p" rel="prev">RS/6000 and PowerPC Options</a>, Up: <a href="Submodel-Options.html#Submodel-Options" accesskey="u" rel="up">Submodel Options</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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