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  20. <title>Visium Options (Using the GNU Compiler Collection (GCC))</title>
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  28. <link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">
  29. <link href="Submodel-Options.html#Submodel-Options" rel="up" title="Submodel Options">
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  61. <a name="Visium-Options"></a>
  62. <div class="header">
  63. <p>
  64. Next: <a href="VMS-Options.html#VMS-Options" accesskey="n" rel="next">VMS Options</a>, Previous: <a href="VAX-Options.html#VAX-Options" accesskey="p" rel="prev">VAX Options</a>, Up: <a href="Submodel-Options.html#Submodel-Options" accesskey="u" rel="up">Submodel Options</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
  65. </div>
  66. <hr>
  67. <a name="Visium-Options-1"></a>
  68. <h4 class="subsection">3.19.56 Visium Options</h4>
  69. <a name="index-Visium-options"></a>
  70. <dl compact="compact">
  71. <dt><code>-mdebug</code></dt>
  72. <dd><a name="index-mdebug-2"></a>
  73. <p>A program which performs file I/O and is destined to run on an MCM target
  74. should be linked with this option. It causes the libraries libc.a and
  75. libdebug.a to be linked. The program should be run on the target under
  76. the control of the GDB remote debugging stub.
  77. </p>
  78. </dd>
  79. <dt><code>-msim</code></dt>
  80. <dd><a name="index-msim-10"></a>
  81. <p>A program which performs file I/O and is destined to run on the simulator
  82. should be linked with option. This causes libraries libc.a and libsim.a to
  83. be linked.
  84. </p>
  85. </dd>
  86. <dt><code>-mfpu</code></dt>
  87. <dt><code>-mhard-float</code></dt>
  88. <dd><a name="index-mfpu-4"></a>
  89. <a name="index-mhard_002dfloat-10"></a>
  90. <p>Generate code containing floating-point instructions. This is the
  91. default.
  92. </p>
  93. </dd>
  94. <dt><code>-mno-fpu</code></dt>
  95. <dt><code>-msoft-float</code></dt>
  96. <dd><a name="index-mno_002dfpu-1"></a>
  97. <a name="index-msoft_002dfloat-14"></a>
  98. <p>Generate code containing library calls for floating-point.
  99. </p>
  100. <p><samp>-msoft-float</samp> changes the calling convention in the output file;
  101. therefore, it is only useful if you compile <em>all</em> of a program with
  102. this option. In particular, you need to compile <samp>libgcc.a</samp>, the
  103. library that comes with GCC, with <samp>-msoft-float</samp> in order for
  104. this to work.
  105. </p>
  106. </dd>
  107. <dt><code>-mcpu=<var>cpu_type</var></code></dt>
  108. <dd><a name="index-mcpu-14"></a>
  109. <p>Set the instruction set, register set, and instruction scheduling parameters
  110. for machine type <var>cpu_type</var>. Supported values for <var>cpu_type</var> are
  111. &lsquo;<samp>mcm</samp>&rsquo;, &lsquo;<samp>gr5</samp>&rsquo; and &lsquo;<samp>gr6</samp>&rsquo;.
  112. </p>
  113. <p>&lsquo;<samp>mcm</samp>&rsquo; is a synonym of &lsquo;<samp>gr5</samp>&rsquo; present for backward compatibility.
  114. </p>
  115. <p>By default (unless configured otherwise), GCC generates code for the GR5
  116. variant of the Visium architecture.
  117. </p>
  118. <p>With <samp>-mcpu=gr6</samp>, GCC generates code for the GR6 variant of the Visium
  119. architecture. The only difference from GR5 code is that the compiler will
  120. generate block move instructions.
  121. </p>
  122. </dd>
  123. <dt><code>-mtune=<var>cpu_type</var></code></dt>
  124. <dd><a name="index-mtune-15"></a>
  125. <p>Set the instruction scheduling parameters for machine type <var>cpu_type</var>,
  126. but do not set the instruction set or register set that the option
  127. <samp>-mcpu=<var>cpu_type</var></samp> would.
  128. </p>
  129. </dd>
  130. <dt><code>-msv-mode</code></dt>
  131. <dd><a name="index-msv_002dmode"></a>
  132. <p>Generate code for the supervisor mode, where there are no restrictions on
  133. the access to general registers. This is the default.
  134. </p>
  135. </dd>
  136. <dt><code>-muser-mode</code></dt>
  137. <dd><a name="index-muser_002dmode-1"></a>
  138. <p>Generate code for the user mode, where the access to some general registers
  139. is forbidden: on the GR5, registers r24 to r31 cannot be accessed in this
  140. mode; on the GR6, only registers r29 to r31 are affected.
  141. </p></dd>
  142. </dl>
  143. <hr>
  144. <div class="header">
  145. <p>
  146. Next: <a href="VMS-Options.html#VMS-Options" accesskey="n" rel="next">VMS Options</a>, Previous: <a href="VAX-Options.html#VAX-Options" accesskey="p" rel="prev">VAX Options</a>, Up: <a href="Submodel-Options.html#Submodel-Options" accesskey="u" rel="up">Submodel Options</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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