visus
/
toolchain-gcc-arm-embedded


			
							<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html>
<!-- Copyright (C) 1988-2020 Free Software Foundation, Inc.

Permission is granted to copy, distribute and/or modify this document
under the terms of the GNU Free Documentation License, Version 1.3 or
any later version published by the Free Software Foundation; with the
Invariant Sections being "Funding Free Software", the Front-Cover
Texts being (a) (see below), and with the Back-Cover Texts being (b)
(see below).  A copy of the license is included in the section entitled
"GNU Free Documentation License".

(a) The FSF's Front-Cover Text is:

A GNU Manual

(b) The FSF's Back-Cover Text is:

You have freedom to copy and modify this GNU Manual, like GNU
     software.  Copies published by the Free Software Foundation raise
     funds for GNU development. -->
<!-- Created by GNU Texinfo 6.5, http://www.gnu.org/software/texinfo/ -->
<head>
<meta http-equiv="Content-Type" content="text/html; charset=utf-8">
<title>Example (GNU Compiler Collection (GCC) Internals)</title>

<meta name="description" content="Example (GNU Compiler Collection (GCC) Internals)">
<meta name="keywords" content="Example (GNU Compiler Collection (GCC) Internals)">
<meta name="resource-type" content="document">
<meta name="distribution" content="global">
<meta name="Generator" content="makeinfo">
<link href="index.html#Top" rel="start" title="Top">
<link href="Option-Index.html#Option-Index" rel="index" title="Option Index">
<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">
<link href="Machine-Desc.html#Machine-Desc" rel="up" title="Machine Desc">
<link href="RTL-Template.html#RTL-Template" rel="next" title="RTL Template">
<link href="Patterns.html#Patterns" rel="prev" title="Patterns">
<style type="text/css">
<!--
a.summary-letter {text-decoration: none}
blockquote.indentedblock {margin-right: 0em}
blockquote.smallindentedblock {margin-right: 0em; font-size: smaller}
blockquote.smallquotation {font-size: smaller}
div.display {margin-left: 3.2em}
div.example {margin-left: 3.2em}
div.lisp {margin-left: 3.2em}
div.smalldisplay {margin-left: 3.2em}
div.smallexample {margin-left: 3.2em}
div.smalllisp {margin-left: 3.2em}
kbd {font-style: oblique}
pre.display {font-family: inherit}
pre.format {font-family: inherit}
pre.menu-comment {font-family: serif}
pre.menu-preformatted {font-family: serif}
pre.smalldisplay {font-family: inherit; font-size: smaller}
pre.smallexample {font-size: smaller}
pre.smallformat {font-family: inherit; font-size: smaller}
pre.smalllisp {font-size: smaller}
span.nolinebreak {white-space: nowrap}
span.roman {font-family: initial; font-weight: normal}
span.sansserif {font-family: sans-serif; font-weight: normal}
ul.no-bullet {list-style: none}
-->
</style>


</head>

<body lang="en">
<a name="Example"></a>
<div class="header">
<p>
Next: <a href="RTL-Template.html#RTL-Template" accesskey="n" rel="next">RTL Template</a>, Previous: <a href="Patterns.html#Patterns" accesskey="p" rel="prev">Patterns</a>, Up: <a href="Machine-Desc.html#Machine-Desc" accesskey="u" rel="up">Machine Desc</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
</div>
<hr>
<a name="Example-of-define_005finsn"></a>
<h3 class="section">17.3 Example of <code>define_insn</code></h3>
<a name="index-define_005finsn-example"></a>

<p>Here is an example of an instruction pattern, taken from the machine
description for the 68000/68020.
</p>
<div class="smallexample">
<pre class="smallexample">(define_insn &quot;tstsi&quot;
  [(set (cc0)
        (match_operand:SI 0 &quot;general_operand&quot; &quot;rm&quot;))]
  &quot;&quot;
  &quot;*
{
  if (TARGET_68020 || ! ADDRESS_REG_P (operands[0]))
    return \&quot;tstl %0\&quot;;
  return \&quot;cmpl #0,%0\&quot;;
}&quot;)
</pre></div>

<p>This can also be written using braced strings:
</p>
<div class="smallexample">
<pre class="smallexample">(define_insn &quot;tstsi&quot;
  [(set (cc0)
        (match_operand:SI 0 &quot;general_operand&quot; &quot;rm&quot;))]
  &quot;&quot;
{
  if (TARGET_68020 || ! ADDRESS_REG_P (operands[0]))
    return &quot;tstl %0&quot;;
  return &quot;cmpl #0,%0&quot;;
})
</pre></div>

<p>This describes an instruction which sets the condition codes based on the
value of a general operand.  It has no condition, so any insn with an RTL
description of the form shown may be matched to this pattern.  The name
&lsquo;<samp>tstsi</samp>&rsquo; means &ldquo;test a <code>SImode</code> value&rdquo; and tells the RTL
generation pass that, when it is necessary to test such a value, an insn
to do so can be constructed using this pattern.
</p>
<p>The output control string is a piece of C code which chooses which
output template to return based on the kind of operand and the specific
type of CPU for which code is being generated.
</p>
<p>&lsquo;<samp>&quot;rm&quot;</samp>&rsquo; is an operand constraint.  Its meaning is explained below.
</p>


</body>
</html>