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<a name="Parameterized-Names"></a>
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<p>
Previous: <a href="Subst-Iterators.html#Subst-Iterators" accesskey="p" rel="prev">Subst Iterators</a>, Up: <a href="Iterators.html#Iterators" accesskey="u" rel="up">Iterators</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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<hr>
<a name="Parameterized-Names-1"></a>
<h4 class="subsection">17.23.5 Parameterized Names</h4>
<a name="index-_0040-in-instruction-pattern-names"></a>
<p>Ports sometimes need to apply iterators using C++ code, in order to
get the code or RTL pattern for a specific instruction.  For example,
suppose we have the &lsquo;<samp>neon_vq&lt;absneg&gt;&lt;mode&gt;</samp>&rsquo; pattern given above:
</p>
<div class="smallexample">
<pre class="smallexample">(define_int_iterator QABSNEG [UNSPEC_VQABS UNSPEC_VQNEG])

(define_int_attr absneg [(UNSPEC_VQABS &quot;abs&quot;) (UNSPEC_VQNEG &quot;neg&quot;)])

(define_insn &quot;neon_vq&lt;absneg&gt;&lt;mode&gt;&quot;
  [(set (match_operand:VDQIW 0 &quot;s_register_operand&quot; &quot;=w&quot;)
	(unspec:VDQIW [(match_operand:VDQIW 1 &quot;s_register_operand&quot; &quot;w&quot;)
		       (match_operand:SI 2 &quot;immediate_operand&quot; &quot;i&quot;)]
		      QABSNEG))]
  &hellip;
)
</pre></div>

<p>A port might need to generate this pattern for a variable
&lsquo;<samp>QABSNEG</samp>&rsquo; value and a variable &lsquo;<samp>VDQIW</samp>&rsquo; mode.  There are two
ways of doing this.  The first is to build the rtx for the pattern
directly from C++ code; this is a valid technique and avoids any risk
of combinatorial explosion.  The second is to prefix the instruction
name with the special character &lsquo;<samp>@</samp>&rsquo;, which tells GCC to generate
the four additional functions below.  In each case, <var>name</var> is the
name of the instruction without the leading &lsquo;<samp>@</samp>&rsquo; character,
without the &lsquo;<samp>&lt;&hellip;&gt;</samp>&rsquo; placeholders, and with any underscore
before a &lsquo;<samp>&lt;&hellip;&gt;</samp>&rsquo; placeholder removed if keeping it would
lead to a double or trailing underscore.
</p>
<dl compact="compact">
<dt>&lsquo;<samp>insn_code maybe_code_for_<var>name</var> (<var>i1</var>, <var>i2</var>, &hellip;)</samp>&rsquo;</dt>
<dd><p>See whether replacing the first &lsquo;<samp>&lt;&hellip;&gt;</samp>&rsquo; placeholder with
iterator value <var>i1</var>, the second with iterator value <var>i2</var>, and
so on, gives a valid instruction.  Return its code if so, otherwise
return <code>CODE_FOR_nothing</code>.
</p>
</dd>
<dt>&lsquo;<samp>insn_code code_for_<var>name</var> (<var>i1</var>, <var>i2</var>, &hellip;)</samp>&rsquo;</dt>
<dd><p>Same, but abort the compiler if the requested instruction does not exist.
</p>
</dd>
<dt>&lsquo;<samp>rtx maybe_gen_<var>name</var> (<var>i1</var>, <var>i2</var>, &hellip;, <var>op0</var>, <var>op1</var>, &hellip;)</samp>&rsquo;</dt>
<dd><p>Check for a valid instruction in the same way as
<code>maybe_code_for_<var>name</var></code>.  If the instruction exists,
generate an instance of it using the operand values given by <var>op0</var>,
<var>op1</var>, and so on, otherwise return null.
</p>
</dd>
<dt>&lsquo;<samp>rtx gen_<var>name</var> (<var>i1</var>, <var>i2</var>, &hellip;, <var>op0</var>, <var>op1</var>, &hellip;)</samp>&rsquo;</dt>
<dd><p>Same, but abort the compiler if the requested instruction does not exist,
or if the instruction generator invoked the <code>FAIL</code> macro.
</p></dd>
</dl>

<p>For example, changing the pattern above to:
</p>
<div class="smallexample">
<pre class="smallexample">(define_insn &quot;@neon_vq&lt;absneg&gt;&lt;mode&gt;&quot;
  [(set (match_operand:VDQIW 0 &quot;s_register_operand&quot; &quot;=w&quot;)
	(unspec:VDQIW [(match_operand:VDQIW 1 &quot;s_register_operand&quot; &quot;w&quot;)
		       (match_operand:SI 2 &quot;immediate_operand&quot; &quot;i&quot;)]
		      QABSNEG))]
  &hellip;
)
</pre></div>

<p>would define the same patterns as before, but in addition would generate
the four functions below:
</p>
<div class="smallexample">
<pre class="smallexample">insn_code maybe_code_for_neon_vq (int, machine_mode);
insn_code code_for_neon_vq (int, machine_mode);
rtx maybe_gen_neon_vq (int, machine_mode, rtx, rtx, rtx);
rtx gen_neon_vq (int, machine_mode, rtx, rtx, rtx);
</pre></div>

<p>Calling &lsquo;<samp>code_for_neon_vq (UNSPEC_VQABS, V8QImode)</samp>&rsquo;
would then give <code>CODE_FOR_neon_vqabsv8qi</code>.
</p>
<p>It is possible to have multiple &lsquo;<samp>@</samp>&rsquo; patterns with the same
name and same types of iterator.  For example:
</p>
<div class="smallexample">
<pre class="smallexample">(define_insn &quot;@some_arithmetic_op&lt;mode&gt;&quot;
  [(set (match_operand:INTEGER_MODES 0 &quot;register_operand&quot;) &hellip;)]
  &hellip;
)

(define_insn &quot;@some_arithmetic_op&lt;mode&gt;&quot;
  [(set (match_operand:FLOAT_MODES 0 &quot;register_operand&quot;) &hellip;)]
  &hellip;
)
</pre></div>

<p>would produce a single set of functions that handles both
<code>INTEGER_MODES</code> and <code>FLOAT_MODES</code>.
</p>
<p>It is also possible for these &lsquo;<samp>@</samp>&rsquo; patterns to have different
numbers of operands from each other.  For example, patterns with
a binary rtl code might take three operands (one output and two inputs)
while patterns with a ternary rtl code might take four operands (one
output and three inputs).  This combination would produce separate
&lsquo;<samp>maybe_gen_<var>name</var></samp>&rsquo; and &lsquo;<samp>gen_<var>name</var></samp>&rsquo; functions for
each operand count, but it would still produce a single
&lsquo;<samp>maybe_code_for_<var>name</var></samp>&rsquo; and a single &lsquo;<samp>code_for_<var>name</var></samp>&rsquo;.
</p>

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