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  16. <title>MIPS Features (Debugging with GDB)</title>
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  60. Next: <a href="M68K-Features.html#M68K-Features" accesskey="n" rel="next">M68K Features</a>, Previous: <a href="MicroBlaze-Features.html#MicroBlaze-Features" accesskey="p" rel="prev">MicroBlaze Features</a>, Up: <a href="Standard-Target-Features.html#Standard-Target-Features" accesskey="u" rel="up">Standard Target Features</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Concept-Index.html#Concept-Index" title="Index" rel="index">Index</a>]</p>
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  63. <a name="MIPS-Features-1"></a>
  64. <h4 class="subsection">G.5.6 <acronym>MIPS</acronym> Features</h4>
  65. <a name="index-target-descriptions_002c-MIPS-features"></a>
  66. <p>The &lsquo;<samp>org.gnu.gdb.mips.cpu</samp>&rsquo; feature is required for <acronym>MIPS</acronym> targets.
  67. It should contain registers &lsquo;<samp>r0</samp>&rsquo; through &lsquo;<samp>r31</samp>&rsquo;, &lsquo;<samp>lo</samp>&rsquo;,
  68. &lsquo;<samp>hi</samp>&rsquo;, and &lsquo;<samp>pc</samp>&rsquo;. They may be 32-bit or 64-bit depending
  69. on the target.
  70. </p>
  71. <p>The &lsquo;<samp>org.gnu.gdb.mips.cp0</samp>&rsquo; feature is also required. It should
  72. contain at least the &lsquo;<samp>status</samp>&rsquo;, &lsquo;<samp>badvaddr</samp>&rsquo;, and &lsquo;<samp>cause</samp>&rsquo;
  73. registers. They may be 32-bit or 64-bit depending on the target.
  74. </p>
  75. <p>The &lsquo;<samp>org.gnu.gdb.mips.fpu</samp>&rsquo; feature is currently required, though
  76. it may be optional in a future version of <small>GDB</small>. It should
  77. contain registers &lsquo;<samp>f0</samp>&rsquo; through &lsquo;<samp>f31</samp>&rsquo;, &lsquo;<samp>fcsr</samp>&rsquo;, and
  78. &lsquo;<samp>fir</samp>&rsquo;. They may be 32-bit or 64-bit depending on the target.
  79. </p>
  80. <p>The &lsquo;<samp>org.gnu.gdb.mips.dsp</samp>&rsquo; feature is optional. It should
  81. contain registers &lsquo;<samp>hi1</samp>&rsquo; through &lsquo;<samp>hi3</samp>&rsquo;, &lsquo;<samp>lo1</samp>&rsquo; through
  82. &lsquo;<samp>lo3</samp>&rsquo;, and &lsquo;<samp>dspctl</samp>&rsquo;. The &lsquo;<samp>dspctl</samp>&rsquo; register should
  83. be 32-bit and the rest may be 32-bit or 64-bit depending on the target.
  84. </p>
  85. <p>The &lsquo;<samp>org.gnu.gdb.mips.linux</samp>&rsquo; feature is optional. It should
  86. contain a single register, &lsquo;<samp>restart</samp>&rsquo;, which is used by the
  87. Linux kernel to control restartable syscalls.
  88. </p>
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