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  61. <hr>
  62. <a name="M32R-Directives"></a>
  63. <h4 class="subsection">9.21.2 M32R Directives</h4>
  64. <a name="index-directives_002c-M32R"></a>
  65. <a name="index-M32R-directives"></a>
  66. <p>The Renesas M32R version of <code>as</code> has a few architecture
  67. specific directives:
  68. </p>
  69. <dl compact="compact">
  70. <dd>
  71. <a name="index-low-directive_002c-M32R"></a>
  72. </dd>
  73. <dt><code>low <var>expression</var></code></dt>
  74. <dd><p>The <code>low</code> directive computes the value of its expression and
  75. places the lower 16-bits of the result into the immediate-field of the
  76. instruction. For example:
  77. </p>
  78. <div class="smallexample">
  79. <pre class="smallexample"> or3 r0, r0, #low(0x12345678) ; compute r0 = r0 | 0x5678
  80. add3, r0, r0, #low(fred) ; compute r0 = r0 + low 16-bits of address of fred
  81. </pre></div>
  82. </dd>
  83. <dt><code>high <var>expression</var></code></dt>
  84. <dd><a name="index-high-directive_002c-M32R"></a>
  85. <p>The <code>high</code> directive computes the value of its expression and
  86. places the upper 16-bits of the result into the immediate-field of the
  87. instruction. For example:
  88. </p>
  89. <div class="smallexample">
  90. <pre class="smallexample"> seth r0, #high(0x12345678) ; compute r0 = 0x12340000
  91. seth, r0, #high(fred) ; compute r0 = upper 16-bits of address of fred
  92. </pre></div>
  93. </dd>
  94. <dt><code>shigh <var>expression</var></code></dt>
  95. <dd><a name="index-shigh-directive_002c-M32R"></a>
  96. <p>The <code>shigh</code> directive is very similar to the <code>high</code>
  97. directive. It also computes the value of its expression and places
  98. the upper 16-bits of the result into the immediate-field of the
  99. instruction. The difference is that <code>shigh</code> also checks to see
  100. if the lower 16-bits could be interpreted as a signed number, and if
  101. so it assumes that a borrow will occur from the upper-16 bits. To
  102. compensate for this the <code>shigh</code> directive pre-biases the upper
  103. 16 bit value by adding one to it. For example:
  104. </p>
  105. <p>For example:
  106. </p>
  107. <div class="smallexample">
  108. <pre class="smallexample"> seth r0, #shigh(0x12345678) ; compute r0 = 0x12340000
  109. seth r0, #shigh(0x00008000) ; compute r0 = 0x00010000
  110. </pre></div>
  111. <p>In the second example the lower 16-bits are 0x8000. If these are
  112. treated as a signed value and sign extended to 32-bits then the value
  113. becomes 0xffff8000. If this value is then added to 0x00010000 then
  114. the result is 0x00008000.
  115. </p>
  116. <p>This behaviour is to allow for the different semantics of the
  117. <code>or3</code> and <code>add3</code> instructions. The <code>or3</code> instruction
  118. treats its 16-bit immediate argument as unsigned whereas the
  119. <code>add3</code> treats its 16-bit immediate as a signed value. So for
  120. example:
  121. </p>
  122. <div class="smallexample">
  123. <pre class="smallexample"> seth r0, #shigh(0x00008000)
  124. add3 r0, r0, #low(0x00008000)
  125. </pre></div>
  126. <p>Produces the correct result in r0, whereas:
  127. </p>
  128. <div class="smallexample">
  129. <pre class="smallexample"> seth r0, #shigh(0x00008000)
  130. or3 r0, r0, #low(0x00008000)
  131. </pre></div>
  132. <p>Stores 0xffff8000 into r0.
  133. </p>
  134. <p>Note - the <code>shigh</code> directive does not know where in the assembly
  135. source code the lower 16-bits of the value are going set, so it cannot
  136. check to make sure that an <code>or3</code> instruction is being used rather
  137. than an <code>add3</code> instruction. It is up to the programmer to make
  138. sure that correct directives are used.
  139. </p>
  140. <a name="index-_002em32r-directive_002c-M32R"></a>
  141. </dd>
  142. <dt><code>.m32r</code></dt>
  143. <dd><p>The directive performs a similar thing as the <em>-m32r</em> command
  144. line option. It tells the assembler to only accept M32R instructions
  145. from now on. An instructions from later M32R architectures are
  146. refused.
  147. </p>
  148. <a name="index-_002em32rx-directive_002c-M32RX"></a>
  149. </dd>
  150. <dt><code>.m32rx</code></dt>
  151. <dd><p>The directive performs a similar thing as the <em>-m32rx</em> command
  152. line option. It tells the assembler to start accepting the extra
  153. instructions in the M32RX ISA as well as the ordinary M32R ISA.
  154. </p>
  155. <a name="index-_002em32r2-directive_002c-M32R2"></a>
  156. </dd>
  157. <dt><code>.m32r2</code></dt>
  158. <dd><p>The directive performs a similar thing as the <em>-m32r2</em> command
  159. line option. It tells the assembler to start accepting the extra
  160. instructions in the M32R2 ISA as well as the ordinary M32R ISA.
  161. </p>
  162. <a name="index-_002elittle-directive_002c-M32RX"></a>
  163. </dd>
  164. <dt><code>.little</code></dt>
  165. <dd><p>The directive performs a similar thing as the <em>-little</em> command
  166. line option. It tells the assembler to start producing little-endian
  167. code and data. This option should be used with care as producing
  168. mixed-endian binary files is fraught with danger.
  169. </p>
  170. <a name="index-_002ebig-directive_002c-M32RX"></a>
  171. </dd>
  172. <dt><code>.big</code></dt>
  173. <dd><p>The directive performs a similar thing as the <em>-big</em> command
  174. line option. It tells the assembler to start producing big-endian
  175. code and data. This option should be used with care as producing
  176. mixed-endian binary files is fraught with danger.
  177. </p>
  178. </dd>
  179. </dl>
  180. <hr>
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