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  1. <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">

  2. <html>

  3. <!-- This file documents the GNU Assembler "as".

  4. 

  5. Copyright (C) 1991-2020 Free Software Foundation, Inc.

  6. 

  7. Permission is granted to copy, distribute and/or modify this document

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  15. <head>

  16. <meta http-equiv="Content-Type" content="text/html; charset=utf-8">

  17. <title>M68HC11-Opts (Using as)</title>

  18. 

  19. <meta name="description" content="M68HC11-Opts (Using as)">

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  26. <link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">

  27. <link href="M68HC11_002dDependent.html#M68HC11_002dDependent" rel="up" title="M68HC11-Dependent">

  28. <link href="M68HC11_002dSyntax.html#M68HC11_002dSyntax" rel="next" title="M68HC11-Syntax">

  29. <link href="M68HC11_002dDependent.html#M68HC11_002dDependent" rel="prev" title="M68HC11-Dependent">

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  60. 

  61. <body lang="en">

  62. <a name="M68HC11_002dOpts"></a>

  63. <div class="header">

  64. <p>

  65. Next: <a href="M68HC11_002dSyntax.html#M68HC11_002dSyntax" accesskey="n" rel="next">M68HC11-Syntax</a>, Up: <a href="M68HC11_002dDependent.html#M68HC11_002dDependent" accesskey="u" rel="up">M68HC11-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>

  66. </div>

  67. <hr>

  68. <a name="M68HC11-and-M68HC12-Options"></a>

  69. <h4 class="subsection">9.23.1 M68HC11 and M68HC12 Options</h4>

  70. 

  71. <a name="index-options_002c-M68HC11"></a>

  72. <a name="index-M68HC11-options"></a>

  73. <p>The Motorola 68HC11 and 68HC12 version of <code>as</code> have a few machine

  74. dependent options.

  75. </p>

  76. <dl compact="compact">

  77. <dd>

  78. <a name="index-_002dm68hc11"></a>

  79. </dd>

  80. <dt><code>-m68hc11</code></dt>

  81. <dd><p>This option switches the assembler into the M68HC11 mode. In this mode,

  82. the assembler only accepts 68HC11 operands and mnemonics. It produces

  83. code for the 68HC11.

  84. </p>

  85. <a name="index-_002dm68hc12"></a>

  86. </dd>

  87. <dt><code>-m68hc12</code></dt>

  88. <dd><p>This option switches the assembler into the M68HC12 mode. In this mode,

  89. the assembler also accepts 68HC12 operands and mnemonics. It produces

  90. code for the 68HC12. A few 68HC11 instructions are replaced by

  91. some 68HC12 instructions as recommended by Motorola specifications.

  92. </p>

  93. <a name="index-_002dm68hcs12"></a>

  94. </dd>

  95. <dt><code>-m68hcs12</code></dt>

  96. <dd><p>This option switches the assembler into the M68HCS12 mode.  This mode is

  97. similar to &lsquo;<samp>-m68hc12</samp>&rsquo; but specifies to assemble for the 68HCS12

  98. series.  The only difference is on the assembling of the &lsquo;<samp>movb</samp>&rsquo;

  99. and &lsquo;<samp>movw</samp>&rsquo; instruction when a PC-relative operand is used.

  100. </p>

  101. <a name="index-_002dmm9s12x"></a>

  102. </dd>

  103. <dt><code>-mm9s12x</code></dt>

  104. <dd><p>This option switches the assembler into the M9S12X mode.  This mode is

  105. similar to &lsquo;<samp>-m68hc12</samp>&rsquo; but specifies to assemble for the S12X

  106. series which is a superset of the HCS12.

  107. </p>

  108. <a name="index-_002dmm9s12xg"></a>

  109. </dd>

  110. <dt><code>-mm9s12xg</code></dt>

  111. <dd><p>This option switches the assembler into the XGATE mode for the RISC

  112. co-processor featured on some S12X-family chips.

  113. </p>

  114. <a name="index-_002d_002dxgate_002dramoffset"></a>

  115. </dd>

  116. <dt><code>--xgate-ramoffset</code></dt>

  117. <dd><p>This option instructs the linker to offset RAM addresses from S12X address

  118. space into XGATE address space.

  119. </p>

  120. <a name="index-_002dmshort"></a>

  121. </dd>

  122. <dt><code>-mshort</code></dt>

  123. <dd><p>This option controls the ABI and indicates to use a 16-bit integer ABI.

  124. It has no effect on the assembled instructions.

  125. This is the default.

  126. </p>

  127. <a name="index-_002dmlong"></a>

  128. </dd>

  129. <dt><code>-mlong</code></dt>

  130. <dd><p>This option controls the ABI and indicates to use a 32-bit integer ABI.

  131. </p>

  132. <a name="index-_002dmshort_002ddouble"></a>

  133. </dd>

  134. <dt><code>-mshort-double</code></dt>

  135. <dd><p>This option controls the ABI and indicates to use a 32-bit float ABI.

  136. This is the default.

  137. </p>

  138. <a name="index-_002dmlong_002ddouble"></a>

  139. </dd>

  140. <dt><code>-mlong-double</code></dt>

  141. <dd><p>This option controls the ABI and indicates to use a 64-bit float ABI.

  142. </p>

  143. <a name="index-_002d_002dstrict_002ddirect_002dmode"></a>

  144. </dd>

  145. <dt><code>--strict-direct-mode</code></dt>

  146. <dd><p>You can use the &lsquo;<samp>--strict-direct-mode</samp>&rsquo; option to disable

  147. the automatic translation of direct page mode addressing into

  148. extended mode when the instruction does not support direct mode.

  149. For example, the &lsquo;<samp>clr</samp>&rsquo; instruction does not support direct page

  150. mode addressing. When it is used with the direct page mode,

  151. <code>as</code> will ignore it and generate an absolute addressing.

  152. This option prevents <code>as</code> from doing this, and the wrong

  153. usage of the direct page mode will raise an error.

  154. </p>

  155. <a name="index-_002d_002dshort_002dbranches"></a>

  156. </dd>

  157. <dt><code>--short-branches</code></dt>

  158. <dd><p>The &lsquo;<samp>--short-branches</samp>&rsquo; option turns off the translation of

  159. relative branches into absolute branches when the branch offset is

  160. out of range. By default <code>as</code> transforms the relative

  161. branch (&lsquo;<samp>bsr</samp>&rsquo;, &lsquo;<samp>bgt</samp>&rsquo;, &lsquo;<samp>bge</samp>&rsquo;, &lsquo;<samp>beq</samp>&rsquo;, &lsquo;<samp>bne</samp>&rsquo;,

  162. &lsquo;<samp>ble</samp>&rsquo;, &lsquo;<samp>blt</samp>&rsquo;, &lsquo;<samp>bhi</samp>&rsquo;, &lsquo;<samp>bcc</samp>&rsquo;, &lsquo;<samp>bls</samp>&rsquo;,

  163. &lsquo;<samp>bcs</samp>&rsquo;, &lsquo;<samp>bmi</samp>&rsquo;, &lsquo;<samp>bvs</samp>&rsquo;, &lsquo;<samp>bvs</samp>&rsquo;, &lsquo;<samp>bra</samp>&rsquo;) into

  164. an absolute branch when the offset is out of the -128 .. 127 range.

  165. In that case, the &lsquo;<samp>bsr</samp>&rsquo; instruction is translated into a

  166. &lsquo;<samp>jsr</samp>&rsquo;, the &lsquo;<samp>bra</samp>&rsquo; instruction is translated into a

  167. &lsquo;<samp>jmp</samp>&rsquo; and the conditional branches instructions are inverted and

  168. followed by a &lsquo;<samp>jmp</samp>&rsquo;. This option disables these translations

  169. and <code>as</code> will generate an error if a relative branch

  170. is out of range. This option does not affect the optimization

  171. associated to the &lsquo;<samp>jbra</samp>&rsquo;, &lsquo;<samp>jbsr</samp>&rsquo; and &lsquo;<samp>jbXX</samp>&rsquo; pseudo opcodes.

  172. </p>

  173. <a name="index-_002d_002dforce_002dlong_002dbranches"></a>

  174. </dd>

  175. <dt><code>--force-long-branches</code></dt>

  176. <dd><p>The &lsquo;<samp>--force-long-branches</samp>&rsquo; option forces the translation of

  177. relative branches into absolute branches. This option does not affect

  178. the optimization associated to the &lsquo;<samp>jbra</samp>&rsquo;, &lsquo;<samp>jbsr</samp>&rsquo; and

  179. &lsquo;<samp>jbXX</samp>&rsquo; pseudo opcodes.

  180. </p>

  181. <a name="index-_002d_002dprint_002dinsn_002dsyntax"></a>

  182. </dd>

  183. <dt><code>--print-insn-syntax</code></dt>

  184. <dd><p>You can use the &lsquo;<samp>--print-insn-syntax</samp>&rsquo; option to obtain the

  185. syntax description of the instruction when an error is detected.

  186. </p>

  187. <a name="index-_002d_002dprint_002dopcodes"></a>

  188. </dd>

  189. <dt><code>--print-opcodes</code></dt>

  190. <dd><p>The &lsquo;<samp>--print-opcodes</samp>&rsquo; option prints the list of all the

  191. instructions with their syntax. The first item of each line

  192. represents the instruction name and the rest of the line indicates

  193. the possible operands for that instruction. The list is printed

  194. in alphabetical order. Once the list is printed <code>as</code>

  195. exits.

  196. </p>

  197. <a name="index-_002d_002dgenerate_002dexample"></a>

  198. </dd>

  199. <dt><code>--generate-example</code></dt>

  200. <dd><p>The &lsquo;<samp>--generate-example</samp>&rsquo; option is similar to &lsquo;<samp>--print-opcodes</samp>&rsquo;

  201. but it generates an example for each instruction instead.

  202. </p></dd>

  203. </dl>

  204. 

  205. <hr>

  206. <div class="header">

  207. <p>

  208. Next: <a href="M68HC11_002dSyntax.html#M68HC11_002dSyntax" accesskey="n" rel="next">M68HC11-Syntax</a>, Up: <a href="M68HC11_002dDependent.html#M68HC11_002dDependent" accesskey="u" rel="up">M68HC11-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>

  209. </div>

  210. 

  211. 

  212. 

  213. </body>

  214. </html>