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<a name="Nios-II-Options"></a>
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<p>
Next: <a href="Nios-II-Syntax.html#Nios-II-Syntax" accesskey="n" rel="next">Nios II Syntax</a>, Up: <a href="NiosII_002dDependent.html#NiosII_002dDependent" accesskey="u" rel="up">NiosII-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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<hr>
<a name="Options-16"></a>
<h4 class="subsection">9.31.1 Options</h4>
<a name="index-Nios-II-options"></a>
<a name="index-options-for-Nios-II"></a>

<dl compact="compact">
<dd>
<a name="index-relax_002dsection-command_002dline-option_002c-Nios-II"></a>
</dd>
<dt><code>-relax-section</code></dt>
<dd><p>Replace identified out-of-range branches with PC-relative <code>jmp</code>
sequences when possible.  The generated code sequences are suitable
for use in position-independent code, but there is a practical limit
on the extended branch range because of the length of the sequences.
This option is the default.
</p>
<a name="index-relax_002dall-command_002dline-option_002c-Nios-II"></a>
</dd>
<dt><code>-relax-all</code></dt>
<dd><p>Replace branch instructions not determinable to be in range
and all call instructions with <code>jmp</code> and <code>callr</code> sequences
(respectively).  This option generates absolute relocations against the
target symbols and is not appropriate for position-independent code.
</p>
<a name="index-no_002drelax-command_002dline-option_002c-Nios-II"></a>
</dd>
<dt><code>-no-relax</code></dt>
<dd><p>Do not replace any branches or calls.
</p>
<a name="index-EB-command_002dline-option_002c-Nios-II"></a>
</dd>
<dt><code>-EB</code></dt>
<dd><p>Generate big-endian output.
</p>
<a name="index-EL-command_002dline-option_002c-Nios-II"></a>
</dd>
<dt><code>-EL</code></dt>
<dd><p>Generate little-endian output.  This is the default.
</p>
<a name="index-march-command_002dline-option_002c-Nios-II"></a>
</dd>
<dt><code>-march=<var>architecture</var></code></dt>
<dd><p>This option specifies the target architecture.  The assembler issues
an error message if an attempt is made to assemble an instruction which
will not execute on the target architecture.  The following architecture
names are recognized:
<code>r1</code>,
<code>r2</code>.  
The default is <code>r1</code>.
</p>
</dd>
</dl>


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