visus
/
toolchain-gcc-arm-embedded
Beobachten 1
Favorisieren 0
Fork 0
Code Issues 0 Pull-Requests 0 Releases 0 Wiki Aktivität
Du kannst nicht mehr als 25 Themen auswählen Themen müssen entweder mit einem Buchstaben oder einer Ziffer beginnen. Sie können Bindestriche („-“) enthalten und bis zu 35 Zeichen lang sein.
2 Commits
1 Branch
Struktur: 898a39b5ab
Branches Tags
${ item.name }
Erstelle Branch ${ searchTerm }
von „898a39b5ab“
${ noResults }
toolchain-gcc-arm-embedded/share/doc/gcc-arm-none-eabi/html/as.html/Overview.html

1608 Zeilen
62KB
Originalformat Blame Verlauf 

  1. <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">

  2. <html>

  3. <!-- This file documents the GNU Assembler "as".

  4. 

  5. Copyright (C) 1991-2020 Free Software Foundation, Inc.

  6. 

  7. Permission is granted to copy, distribute and/or modify this document

  8. under the terms of the GNU Free Documentation License, Version 1.3

  9. or any later version published by the Free Software Foundation;

  10. with no Invariant Sections, with no Front-Cover Texts, and with no

  11. Back-Cover Texts.  A copy of the license is included in the

  12. section entitled "GNU Free Documentation License".

  13.  -->

  14. <!-- Created by GNU Texinfo 6.5, http://www.gnu.org/software/texinfo/ -->

  15. <head>

  16. <meta http-equiv="Content-Type" content="text/html; charset=utf-8">

  17. <title>Overview (Using as)</title>

  18. 

  19. <meta name="description" content="Overview (Using as)">

  20. <meta name="keywords" content="Overview (Using as)">

  21. <meta name="resource-type" content="document">

  22. <meta name="distribution" content="global">

  23. <meta name="Generator" content="makeinfo">

  24. <link href="index.html#Top" rel="start" title="Top">

  25. <link href="AS-Index.html#AS-Index" rel="index" title="AS Index">

  26. <link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">

  27. <link href="index.html#Top" rel="up" title="Top">

  28. <link href="Manual.html#Manual" rel="next" title="Manual">

  29. <link href="index.html#Top" rel="prev" title="Top">

  30. <style type="text/css">

  31. <!--

  32. a.summary-letter {text-decoration: none}

  33. blockquote.indentedblock {margin-right: 0em}

  34. blockquote.smallindentedblock {margin-right: 0em; font-size: smaller}

  35. blockquote.smallquotation {font-size: smaller}

  36. div.display {margin-left: 3.2em}

  37. div.example {margin-left: 3.2em}

  38. div.lisp {margin-left: 3.2em}

  39. div.smalldisplay {margin-left: 3.2em}

  40. div.smallexample {margin-left: 3.2em}

  41. div.smalllisp {margin-left: 3.2em}

  42. kbd {font-style: oblique}

  43. pre.display {font-family: inherit}

  44. pre.format {font-family: inherit}

  45. pre.menu-comment {font-family: serif}

  46. pre.menu-preformatted {font-family: serif}

  47. pre.smalldisplay {font-family: inherit; font-size: smaller}

  48. pre.smallexample {font-size: smaller}

  49. pre.smallformat {font-family: inherit; font-size: smaller}

  50. pre.smalllisp {font-size: smaller}

  51. span.nolinebreak {white-space: nowrap}

  52. span.roman {font-family: initial; font-weight: normal}

  53. span.sansserif {font-family: sans-serif; font-weight: normal}

  54. ul.no-bullet {list-style: none}

  55. -->

  56. </style>

  57. 

  58. 

  59. </head>

  60. 

  61. <body lang="en">

  62. <a name="Overview"></a>

  63. <div class="header">

  64. <p>

  65. Next: <a href="Invoking.html#Invoking" accesskey="n" rel="next">Invoking</a>, Previous: <a href="index.html#Top" accesskey="p" rel="prev">Top</a>, Up: <a href="index.html#Top" accesskey="u" rel="up">Top</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>

  66. </div>

  67. <hr>

  68. <a name="Overview-1"></a>

  69. <h2 class="chapter">1 Overview</h2>

  70. 

  71. <a name="index-invocation-summary"></a>

  72. <a name="index-option-summary"></a>

  73. <a name="index-summary-of-options"></a>

  74. <p>Here is a brief summary of how to invoke <code>as</code>.  For details,

  75. see <a href="Invoking.html#Invoking">Command-Line Options</a>.

  76. </p>

  77. 

  78. 

  79. <div class="smallexample">

  80. <pre class="smallexample">as [<b>-a</b>[<b>cdghlns</b>][=<var>file</var>]] [<b>&ndash;alternate</b>] [<b>-D</b>]

  81.  [<b>&ndash;compress-debug-sections</b>]  [<b>&ndash;nocompress-debug-sections</b>]

  82.  [<b>&ndash;debug-prefix-map</b> <var>old</var>=<var>new</var>]

  83.  [<b>&ndash;defsym</b> <var>sym</var>=<var>val</var>] [<b>-f</b>] [<b>-g</b>] [<b>&ndash;gstabs</b>]

  84.  [<b>&ndash;gstabs+</b>] [<b>&ndash;gdwarf-&lt;N&gt;</b>] [<b>&ndash;gdwarf-sections</b>]

  85.  [<b>&ndash;gdwarf-cie-version</b>=<var>VERSION</var>]

  86.  [<b>&ndash;help</b>] [<b>-I</b> <var>dir</var>] [<b>-J</b>]

  87.  [<b>-K</b>] [<b>-L</b>] [<b>&ndash;listing-lhs-width</b>=<var>NUM</var>]

  88.  [<b>&ndash;listing-lhs-width2</b>=<var>NUM</var>] [<b>&ndash;listing-rhs-width</b>=<var>NUM</var>]

  89.  [<b>&ndash;listing-cont-lines</b>=<var>NUM</var>] [<b>&ndash;keep-locals</b>]

  90.  [<b>&ndash;no-pad-sections</b>]

  91.  [<b>-o</b> <var>objfile</var>] [<b>-R</b>]

  92.  [<b>&ndash;hash-size</b>=<var>NUM</var>] [<b>&ndash;reduce-memory-overheads</b>]

  93.  [<b>&ndash;statistics</b>]

  94.  [<b>-v</b>] [<b>-version</b>] [<b>&ndash;version</b>]

  95.  [<b>-W</b>] [<b>&ndash;warn</b>] [<b>&ndash;fatal-warnings</b>] [<b>-w</b>] [<b>-x</b>]

  96.  [<b>-Z</b>] [<b>@<var>FILE</var></b>]

  97.  [<b>&ndash;sectname-subst</b>] [<b>&ndash;size-check=[error|warning]</b>]

  98.  [<b>&ndash;elf-stt-common=[no|yes]</b>]

  99.  [<b>&ndash;generate-missing-build-notes=[no|yes]</b>]

  100.  [<b>&ndash;target-help</b>] [<var>target-options</var>]

  101.  [<b>&ndash;</b>|<var>files</var> &hellip;]

  102. 

  103. <em>Target AArch64 options:</em>

  104.    [<b>-EB</b>|<b>-EL</b>]

  105.    [<b>-mabi</b>=<var>ABI</var>]

  106. 

  107. <em>Target Alpha options:</em>

  108.    [<b>-m<var>cpu</var></b>]

  109.    [<b>-mdebug</b> | <b>-no-mdebug</b>]

  110.    [<b>-replace</b> | <b>-noreplace</b>]

  111.    [<b>-relax</b>] [<b>-g</b>] [<b>-G<var>size</var></b>]

  112.    [<b>-F</b>] [<b>-32addr</b>]

  113. 

  114. <em>Target ARC options:</em>

  115.    [<b>-mcpu=<var>cpu</var></b>]

  116.    [<b>-mA6</b>|<b>-mARC600</b>|<b>-mARC601</b>|<b>-mA7</b>|<b>-mARC700</b>|<b>-mEM</b>|<b>-mHS</b>]

  117.    [<b>-mcode-density</b>]

  118.    [<b>-mrelax</b>]

  119.    [<b>-EB</b>|<b>-EL</b>]

  120. 

  121. <em>Target ARM options:</em>

  122.    [<b>-mcpu</b>=<var>processor</var>[+<var>extension</var>&hellip;]]

  123.    [<b>-march</b>=<var>architecture</var>[+<var>extension</var>&hellip;]]

  124.    [<b>-mfpu</b>=<var>floating-point-format</var>]

  125.    [<b>-mfloat-abi</b>=<var>abi</var>]

  126.    [<b>-meabi</b>=<var>ver</var>]

  127.    [<b>-mthumb</b>]

  128.    [<b>-EB</b>|<b>-EL</b>]

  129.    [<b>-mapcs-32</b>|<b>-mapcs-26</b>|<b>-mapcs-float</b>|

  130.     <b>-mapcs-reentrant</b>]

  131.    [<b>-mthumb-interwork</b>] [<b>-k</b>]

  132. 

  133. <em>Target Blackfin options:</em>

  134.    [<b>-mcpu</b>=<var>processor</var>[-<var>sirevision</var>]]

  135.    [<b>-mfdpic</b>]

  136.    [<b>-mno-fdpic</b>]

  137.    [<b>-mnopic</b>]

  138. 

  139. <em>Target BPF options:</em>

  140.    [<b>-EL</b>] [<b>-EB</b>]

  141. 

  142. <em>Target CRIS options:</em>

  143.    [<b>&ndash;underscore</b> | <b>&ndash;no-underscore</b>]

  144.    [<b>&ndash;pic</b>] [<b>-N</b>]

  145.    [<b>&ndash;emulation=criself</b> | <b>&ndash;emulation=crisaout</b>]

  146.    [<b>&ndash;march=v0_v10</b> | <b>&ndash;march=v10</b> | <b>&ndash;march=v32</b> | <b>&ndash;march=common_v10_v32</b>]

  147. 

  148. <em>Target C-SKY options:</em>

  149.    [<b>-march=<var>arch</var></b>] [<b>-mcpu=<var>cpu</var></b>]

  150.    [<b>-EL</b>] [<b>-mlittle-endian</b>] [<b>-EB</b>] [<b>-mbig-endian</b>]

  151.    [<b>-fpic</b>] [<b>-pic</b>]

  152.    [<b>-mljump</b>] [<b>-mno-ljump</b>]

  153.    [<b>-force2bsr</b>] [<b>-mforce2bsr</b>] [<b>-no-force2bsr</b>] [<b>-mno-force2bsr</b>]

  154.    [<b>-jsri2bsr</b>] [<b>-mjsri2bsr</b>] [<b>-no-jsri2bsr </b>] [<b>-mno-jsri2bsr</b>]

  155.    [<b>-mnolrw </b>] [<b>-mno-lrw</b>]

  156.    [<b>-melrw</b>] [<b>-mno-elrw</b>]

  157.    [<b>-mlaf </b>] [<b>-mliterals-after-func</b>]

  158.    [<b>-mno-laf</b>] [<b>-mno-literals-after-func</b>]

  159.    [<b>-mlabr</b>] [<b>-mliterals-after-br</b>]

  160.    [<b>-mno-labr</b>] [<b>-mnoliterals-after-br</b>]

  161.    [<b>-mistack</b>] [<b>-mno-istack</b>]

  162.    [<b>-mhard-float</b>] [<b>-mmp</b>] [<b>-mcp</b>] [<b>-mcache</b>]

  163.    [<b>-msecurity</b>] [<b>-mtrust</b>]

  164.    [<b>-mdsp</b>] [<b>-medsp</b>] [<b>-mvdsp</b>]

  165. 

  166. <em>Target D10V options:</em>

  167.    [<b>-O</b>]

  168. 

  169. <em>Target D30V options:</em>

  170.    [<b>-O</b>|<b>-n</b>|<b>-N</b>]

  171. 

  172. <em>Target EPIPHANY options:</em>

  173.    [<b>-mepiphany</b>|<b>-mepiphany16</b>]

  174. 

  175. <em>Target H8/300 options:</em>

  176.    [-h-tick-hex]

  177. 

  178. <em>Target i386 options:</em>

  179.    [<b>&ndash;32</b>|<b>&ndash;x32</b>|<b>&ndash;64</b>] [<b>-n</b>]

  180.    [<b>-march</b>=<var>CPU</var>[+<var>EXTENSION</var>&hellip;]] [<b>-mtune</b>=<var>CPU</var>]

  181. 

  182. <em>Target IA-64 options:</em>

  183.    [<b>-mconstant-gp</b>|<b>-mauto-pic</b>]

  184.    [<b>-milp32</b>|<b>-milp64</b>|<b>-mlp64</b>|<b>-mp64</b>]

  185.    [<b>-mle</b>|<b>mbe</b>]

  186.    [<b>-mtune=itanium1</b>|<b>-mtune=itanium2</b>]

  187.    [<b>-munwind-check=warning</b>|<b>-munwind-check=error</b>]

  188.    [<b>-mhint.b=ok</b>|<b>-mhint.b=warning</b>|<b>-mhint.b=error</b>]

  189.    [<b>-x</b>|<b>-xexplicit</b>] [<b>-xauto</b>] [<b>-xdebug</b>]

  190. 

  191. <em>Target IP2K options:</em>

  192.    [<b>-mip2022</b>|<b>-mip2022ext</b>]

  193. 

  194. <em>Target M32C options:</em>

  195.    [<b>-m32c</b>|<b>-m16c</b>] [-relax] [-h-tick-hex]

  196. 

  197. <em>Target M32R options:</em>

  198.    [<b>&ndash;m32rx</b>|<b>&ndash;[no-]warn-explicit-parallel-conflicts</b>|

  199.    <b>&ndash;W[n]p</b>]

  200. 

  201. <em>Target M680X0 options:</em>

  202.    [<b>-l</b>] [<b>-m68000</b>|<b>-m68010</b>|<b>-m68020</b>|&hellip;]

  203. 

  204. <em>Target M68HC11 options:</em>

  205.    [<b>-m68hc11</b>|<b>-m68hc12</b>|<b>-m68hcs12</b>|<b>-mm9s12x</b>|<b>-mm9s12xg</b>]

  206.    [<b>-mshort</b>|<b>-mlong</b>]

  207.    [<b>-mshort-double</b>|<b>-mlong-double</b>]

  208.    [<b>&ndash;force-long-branches</b>] [<b>&ndash;short-branches</b>]

  209.    [<b>&ndash;strict-direct-mode</b>] [<b>&ndash;print-insn-syntax</b>]

  210.    [<b>&ndash;print-opcodes</b>] [<b>&ndash;generate-example</b>]

  211. 

  212. <em>Target MCORE options:</em>

  213.    [<b>-jsri2bsr</b>] [<b>-sifilter</b>] [<b>-relax</b>]

  214.    [<b>-mcpu=[210|340]</b>]

  215. 

  216. <em>Target Meta options:</em>

  217.    [<b>-mcpu=<var>cpu</var></b>] [<b>-mfpu=<var>cpu</var></b>] [<b>-mdsp=<var>cpu</var></b>]

  218. <em>Target MICROBLAZE options:</em>

  219. 

  220. <em>Target MIPS options:</em>

  221.    [<b>-nocpp</b>] [<b>-EL</b>] [<b>-EB</b>] [<b>-O</b>[<var>optimization level</var>]]

  222.    [<b>-g</b>[<var>debug level</var>]] [<b>-G</b> <var>num</var>] [<b>-KPIC</b>] [<b>-call_shared</b>]

  223.    [<b>-non_shared</b>] [<b>-xgot</b> [<b>-mvxworks-pic</b>]

  224.    [<b>-mabi</b>=<var>ABI</var>] [<b>-32</b>] [<b>-n32</b>] [<b>-64</b>] [<b>-mfp32</b>] [<b>-mgp32</b>]

  225.    [<b>-mfp64</b>] [<b>-mgp64</b>] [<b>-mfpxx</b>]

  226.    [<b>-modd-spreg</b>] [<b>-mno-odd-spreg</b>]

  227.    [<b>-march</b>=<var>CPU</var>] [<b>-mtune</b>=<var>CPU</var>] [<b>-mips1</b>] [<b>-mips2</b>]

  228.    [<b>-mips3</b>] [<b>-mips4</b>] [<b>-mips5</b>] [<b>-mips32</b>] [<b>-mips32r2</b>]

  229.    [<b>-mips32r3</b>] [<b>-mips32r5</b>] [<b>-mips32r6</b>] [<b>-mips64</b>] [<b>-mips64r2</b>]

  230.    [<b>-mips64r3</b>] [<b>-mips64r5</b>] [<b>-mips64r6</b>]

  231.    [<b>-construct-floats</b>] [<b>-no-construct-floats</b>]

  232.    [<b>-mignore-branch-isa</b>] [<b>-mno-ignore-branch-isa</b>]

  233.    [<b>-mnan=<var>encoding</var></b>]

  234.    [<b>-trap</b>] [<b>-no-break</b>] [<b>-break</b>] [<b>-no-trap</b>]

  235.    [<b>-mips16</b>] [<b>-no-mips16</b>]

  236.    [<b>-mmips16e2</b>] [<b>-mno-mips16e2</b>]

  237.    [<b>-mmicromips</b>] [<b>-mno-micromips</b>]

  238.    [<b>-msmartmips</b>] [<b>-mno-smartmips</b>]

  239.    [<b>-mips3d</b>] [<b>-no-mips3d</b>]

  240.    [<b>-mdmx</b>] [<b>-no-mdmx</b>]

  241.    [<b>-mdsp</b>] [<b>-mno-dsp</b>]

  242.    [<b>-mdspr2</b>] [<b>-mno-dspr2</b>]

  243.    [<b>-mdspr3</b>] [<b>-mno-dspr3</b>]

  244.    [<b>-mmsa</b>] [<b>-mno-msa</b>]

  245.    [<b>-mxpa</b>] [<b>-mno-xpa</b>]

  246.    [<b>-mmt</b>] [<b>-mno-mt</b>]

  247.    [<b>-mmcu</b>] [<b>-mno-mcu</b>]

  248.    [<b>-mcrc</b>] [<b>-mno-crc</b>]

  249.    [<b>-mginv</b>] [<b>-mno-ginv</b>]

  250.    [<b>-mloongson-mmi</b>] [<b>-mno-loongson-mmi</b>]

  251.    [<b>-mloongson-cam</b>] [<b>-mno-loongson-cam</b>]

  252.    [<b>-mloongson-ext</b>] [<b>-mno-loongson-ext</b>]

  253.    [<b>-mloongson-ext2</b>] [<b>-mno-loongson-ext2</b>]

  254.    [<b>-minsn32</b>] [<b>-mno-insn32</b>]

  255.    [<b>-mfix7000</b>] [<b>-mno-fix7000</b>]

  256.    [<b>-mfix-rm7000</b>] [<b>-mno-fix-rm7000</b>]

  257.    [<b>-mfix-vr4120</b>] [<b>-mno-fix-vr4120</b>]

  258.    [<b>-mfix-vr4130</b>] [<b>-mno-fix-vr4130</b>]

  259.    [<b>-mfix-r5900</b>] [<b>-mno-fix-r5900</b>]

  260.    [<b>-mdebug</b>] [<b>-no-mdebug</b>]

  261.    [<b>-mpdr</b>] [<b>-mno-pdr</b>]

  262. 

  263. <em>Target MMIX options:</em>

  264.    [<b>&ndash;fixed-special-register-names</b>] [<b>&ndash;globalize-symbols</b>]

  265.    [<b>&ndash;gnu-syntax</b>] [<b>&ndash;relax</b>] [<b>&ndash;no-predefined-symbols</b>]

  266.    [<b>&ndash;no-expand</b>] [<b>&ndash;no-merge-gregs</b>] [<b>-x</b>]

  267.    [<b>&ndash;linker-allocated-gregs</b>]

  268. 

  269. <em>Target Nios II options:</em>

  270.    [<b>-relax-all</b>] [<b>-relax-section</b>] [<b>-no-relax</b>]

  271.    [<b>-EB</b>] [<b>-EL</b>]

  272. 

  273. <em>Target NDS32 options:</em>

  274.     [<b>-EL</b>] [<b>-EB</b>] [<b>-O</b>] [<b>-Os</b>] [<b>-mcpu=<var>cpu</var></b>]

  275.     [<b>-misa=<var>isa</var></b>] [<b>-mabi=<var>abi</var></b>] [<b>-mall-ext</b>]

  276.     [<b>-m[no-]16-bit</b>]  [<b>-m[no-]perf-ext</b>] [<b>-m[no-]perf2-ext</b>]

  277.     [<b>-m[no-]string-ext</b>] [<b>-m[no-]dsp-ext</b>] [<b>-m[no-]mac</b>] [<b>-m[no-]div</b>]

  278.     [<b>-m[no-]audio-isa-ext</b>] [<b>-m[no-]fpu-sp-ext</b>] [<b>-m[no-]fpu-dp-ext</b>]

  279.     [<b>-m[no-]fpu-fma</b>] [<b>-mfpu-freg=<var>FREG</var></b>] [<b>-mreduced-regs</b>]

  280.     [<b>-mfull-regs</b>] [<b>-m[no-]dx-regs</b>] [<b>-mpic</b>] [<b>-mno-relax</b>]

  281.     [<b>-mb2bb</b>]

  282. 

  283. <em>Target PDP11 options:</em>

  284.    [<b>-mpic</b>|<b>-mno-pic</b>] [<b>-mall</b>] [<b>-mno-extensions</b>]

  285.    [<b>-m</b><var>extension</var>|<b>-mno-</b><var>extension</var>]

  286.    [<b>-m</b><var>cpu</var>] [<b>-m</b><var>machine</var>]

  287. 

  288. <em>Target picoJava options:</em>

  289.    [<b>-mb</b>|<b>-me</b>]

  290. 

  291. <em>Target PowerPC options:</em>

  292.    [<b>-a32</b>|<b>-a64</b>]

  293.    [<b>-mpwrx</b>|<b>-mpwr2</b>|<b>-mpwr</b>|<b>-m601</b>|<b>-mppc</b>|<b>-mppc32</b>|<b>-m603</b>|<b>-m604</b>|<b>-m403</b>|<b>-m405</b>|

  294.     <b>-m440</b>|<b>-m464</b>|<b>-m476</b>|<b>-m7400</b>|<b>-m7410</b>|<b>-m7450</b>|<b>-m7455</b>|<b>-m750cl</b>|<b>-mgekko</b>|

  295.     <b>-mbroadway</b>|<b>-mppc64</b>|<b>-m620</b>|<b>-me500</b>|<b>-e500x2</b>|<b>-me500mc</b>|<b>-me500mc64</b>|<b>-me5500</b>|

  296.     <b>-me6500</b>|<b>-mppc64bridge</b>|<b>-mbooke</b>|<b>-mpower4</b>|<b>-mpwr4</b>|<b>-mpower5</b>|<b>-mpwr5</b>|<b>-mpwr5x</b>|

  297.     <b>-mpower6</b>|<b>-mpwr6</b>|<b>-mpower7</b>|<b>-mpwr7</b>|<b>-mpower8</b>|<b>-mpwr8</b>|<b>-mpower9</b>|<b>-mpwr9</b><b>-ma2</b>|

  298.     <b>-mcell</b>|<b>-mspe</b>|<b>-mspe2</b>|<b>-mtitan</b>|<b>-me300</b>|<b>-mcom</b>]

  299.    [<b>-many</b>] [<b>-maltivec</b>|<b>-mvsx</b>|<b>-mhtm</b>|<b>-mvle</b>]

  300.    [<b>-mregnames</b>|<b>-mno-regnames</b>]

  301.    [<b>-mrelocatable</b>|<b>-mrelocatable-lib</b>|<b>-K PIC</b>] [<b>-memb</b>]

  302.    [<b>-mlittle</b>|<b>-mlittle-endian</b>|<b>-le</b>|<b>-mbig</b>|<b>-mbig-endian</b>|<b>-be</b>]

  303.    [<b>-msolaris</b>|<b>-mno-solaris</b>]

  304.    [<b>-nops=<var>count</var></b>]

  305. 

  306. <em>Target PRU options:</em>

  307.    [<b>-link-relax</b>]

  308.    [<b>-mnolink-relax</b>]

  309.    [<b>-mno-warn-regname-label</b>]

  310. 

  311. <em>Target RISC-V options:</em>

  312.    [<b>-fpic</b>|<b>-fPIC</b>|<b>-fno-pic</b>]

  313.    [<b>-march</b>=<var>ISA</var>]

  314.    [<b>-mabi</b>=<var>ABI</var>]

  315. 

  316. <em>Target RL78 options:</em>

  317.    [<b>-mg10</b>]

  318.    [<b>-m32bit-doubles</b>|<b>-m64bit-doubles</b>]

  319. 

  320. <em>Target RX options:</em>

  321.    [<b>-mlittle-endian</b>|<b>-mbig-endian</b>]

  322.    [<b>-m32bit-doubles</b>|<b>-m64bit-doubles</b>]

  323.    [<b>-muse-conventional-section-names</b>]

  324.    [<b>-msmall-data-limit</b>]

  325.    [<b>-mpid</b>]

  326.    [<b>-mrelax</b>]

  327.    [<b>-mint-register=<var>number</var></b>]

  328.    [<b>-mgcc-abi</b>|<b>-mrx-abi</b>]

  329. 

  330. <em>Target s390 options:</em>

  331.    [<b>-m31</b>|<b>-m64</b>] [<b>-mesa</b>|<b>-mzarch</b>] [<b>-march</b>=<var>CPU</var>]

  332.    [<b>-mregnames</b>|<b>-mno-regnames</b>]

  333.    [<b>-mwarn-areg-zero</b>]

  334. 

  335. <em>Target SCORE options:</em>

  336.    [<b>-EB</b>][<b>-EL</b>][<b>-FIXDD</b>][<b>-NWARN</b>]

  337.    [<b>-SCORE5</b>][<b>-SCORE5U</b>][<b>-SCORE7</b>][<b>-SCORE3</b>]

  338.    [<b>-march=score7</b>][<b>-march=score3</b>]

  339.    [<b>-USE_R1</b>][<b>-KPIC</b>][<b>-O0</b>][<b>-G</b> <var>num</var>][<b>-V</b>]

  340. 

  341. <em>Target SPARC options:</em>

  342.    [<b>-Av6</b>|<b>-Av7</b>|<b>-Av8</b>|<b>-Aleon</b>|<b>-Asparclet</b>|<b>-Asparclite</b>

  343.     <b>-Av8plus</b>|<b>-Av8plusa</b>|<b>-Av8plusb</b>|<b>-Av8plusc</b>|<b>-Av8plusd</b>

  344.     <b>-Av8plusv</b>|<b>-Av8plusm</b>|<b>-Av9</b>|<b>-Av9a</b>|<b>-Av9b</b>|<b>-Av9c</b>

  345.     <b>-Av9d</b>|<b>-Av9e</b>|<b>-Av9v</b>|<b>-Av9m</b>|<b>-Asparc</b>|<b>-Asparcvis</b>

  346.     <b>-Asparcvis2</b>|<b>-Asparcfmaf</b>|<b>-Asparcima</b>|<b>-Asparcvis3</b>

  347.     <b>-Asparcvisr</b>|<b>-Asparc5</b>]

  348.    [<b>-xarch=v8plus</b>|<b>-xarch=v8plusa</b>]|<b>-xarch=v8plusb</b>|<b>-xarch=v8plusc</b>

  349.     <b>-xarch=v8plusd</b>|<b>-xarch=v8plusv</b>|<b>-xarch=v8plusm</b>|<b>-xarch=v9</b>

  350.     <b>-xarch=v9a</b>|<b>-xarch=v9b</b>|<b>-xarch=v9c</b>|<b>-xarch=v9d</b>|<b>-xarch=v9e</b>

  351.     <b>-xarch=v9v</b>|<b>-xarch=v9m</b>|<b>-xarch=sparc</b>|<b>-xarch=sparcvis</b>

  352.     <b>-xarch=sparcvis2</b>|<b>-xarch=sparcfmaf</b>|<b>-xarch=sparcima</b>

  353.     <b>-xarch=sparcvis3</b>|<b>-xarch=sparcvisr</b>|<b>-xarch=sparc5</b>

  354.     <b>-bump</b>]

  355.    [<b>-32</b>|<b>-64</b>]

  356.    [<b>&ndash;enforce-aligned-data</b>][<b>&ndash;dcti-couples-detect</b>]

  357. 

  358. <em>Target TIC54X options:</em>

  359.  [<b>-mcpu=54[123589]</b>|<b>-mcpu=54[56]lp</b>] [<b>-mfar-mode</b>|<b>-mf</b>]

  360.  [<b>-merrors-to-file</b> <var>&lt;filename&gt;</var>|<b>-me</b> <var>&lt;filename&gt;</var>]

  361. 

  362. <em>Target TIC6X options:</em>

  363.    [<b>-march=<var>arch</var></b>] [<b>-mbig-endian</b>|<b>-mlittle-endian</b>]

  364.    [<b>-mdsbt</b>|<b>-mno-dsbt</b>] [<b>-mpid=no</b>|<b>-mpid=near</b>|<b>-mpid=far</b>]

  365.    [<b>-mpic</b>|<b>-mno-pic</b>]

  366. 

  367. <em>Target TILE-Gx options:</em>

  368.    [<b>-m32</b>|<b>-m64</b>][<b>-EB</b>][<b>-EL</b>]

  369. 

  370. <em>Target Visium options:</em>

  371.    [<b>-mtune=<var>arch</var></b>]

  372. 

  373. <em>Target Xtensa options:</em>

  374.  [<b>&ndash;[no-]text-section-literals</b>] [<b>&ndash;[no-]auto-litpools</b>]

  375.  [<b>&ndash;[no-]absolute-literals</b>]

  376.  [<b>&ndash;[no-]target-align</b>] [<b>&ndash;[no-]longcalls</b>]

  377.  [<b>&ndash;[no-]transform</b>]

  378.  [<b>&ndash;rename-section</b> <var>oldname</var>=<var>newname</var>]

  379.  [<b>&ndash;[no-]trampolines</b>]

  380.  [<b>&ndash;abi-windowed</b>|<b>&ndash;abi-call0</b>]

  381. 

  382. <em>Target Z80 options:</em>

  383.   [<b>-march=<var>CPU</var><var>[-EXT]</var><var>[+EXT]</var></b>]

  384.   [<b>-local-prefix=</b><var>PREFIX</var>]

  385.   [<b>-colonless</b>]

  386.   [<b>-sdcc</b>]

  387.   [<b>-fp-s=</b><var>FORMAT</var>]

  388.   [<b>-fp-d=</b><var>FORMAT</var>]

  389. 

  390. 

  391. </pre></div>

  392. 

  393. 

  394. <dl compact="compact">

  395. <dt><code>@<var>file</var></code></dt>

  396. <dd><p>Read command-line options from <var>file</var>.  The options read are

  397. inserted in place of the original @<var>file</var> option.  If <var>file</var>

  398. does not exist, or cannot be read, then the option will be treated

  399. literally, and not removed.  

  400. </p>

  401. <p>Options in <var>file</var> are separated by whitespace.  A whitespace

  402. character may be included in an option by surrounding the entire

  403. option in either single or double quotes.  Any character (including a

  404. backslash) may be included by prefixing the character to be included

  405. with a backslash.  The <var>file</var> may itself contain additional

  406. @<var>file</var> options; any such options will be processed recursively.

  407. </p>

  408. </dd>

  409. <dt><code>-a[cdghlmns]</code></dt>

  410. <dd><p>Turn on listings, in any of a variety of ways:

  411. </p>

  412. <dl compact="compact">

  413. <dt><code>-ac</code></dt>

  414. <dd><p>omit false conditionals

  415. </p>

  416. </dd>

  417. <dt><code>-ad</code></dt>

  418. <dd><p>omit debugging directives

  419. </p>

  420. </dd>

  421. <dt><code>-ag</code></dt>

  422. <dd><p>include general information, like as version and options passed

  423. </p>

  424. </dd>

  425. <dt><code>-ah</code></dt>

  426. <dd><p>include high-level source

  427. </p>

  428. </dd>

  429. <dt><code>-al</code></dt>

  430. <dd><p>include assembly

  431. </p>

  432. </dd>

  433. <dt><code>-am</code></dt>

  434. <dd><p>include macro expansions

  435. </p>

  436. </dd>

  437. <dt><code>-an</code></dt>

  438. <dd><p>omit forms processing

  439. </p>

  440. </dd>

  441. <dt><code>-as</code></dt>

  442. <dd><p>include symbols

  443. </p>

  444. </dd>

  445. <dt><code>=file</code></dt>

  446. <dd><p>set the name of the listing file

  447. </p></dd>

  448. </dl>

  449. 

  450. <p>You may combine these options; for example, use &lsquo;<samp>-aln</samp>&rsquo; for assembly

  451. listing without forms processing.  The &lsquo;<samp>=file</samp>&rsquo; option, if used, must be

  452. the last one.  By itself, &lsquo;<samp>-a</samp>&rsquo; defaults to &lsquo;<samp>-ahls</samp>&rsquo;.

  453. </p>

  454. </dd>

  455. <dt><code>--alternate</code></dt>

  456. <dd><p>Begin in alternate macro mode.

  457. See <a href="Altmacro.html#Altmacro"><code>.altmacro</code></a>.

  458. </p>

  459. </dd>

  460. <dt><code>--compress-debug-sections</code></dt>

  461. <dd><p>Compress DWARF debug sections using zlib with SHF_COMPRESSED from the

  462. ELF ABI.  The resulting object file may not be compatible with older

  463. linkers and object file utilities.  Note if compression would make a

  464. given section <em>larger</em> then it is not compressed.

  465. </p>

  466. <a name="index-_002d_002dcompress_002ddebug_002dsections_003d-option"></a>

  467. </dd>

  468. <dt><code>--compress-debug-sections=none</code></dt>

  469. <dt><code>--compress-debug-sections=zlib</code></dt>

  470. <dt><code>--compress-debug-sections=zlib-gnu</code></dt>

  471. <dt><code>--compress-debug-sections=zlib-gabi</code></dt>

  472. <dd><p>These options control how DWARF debug sections are compressed.

  473. <samp>--compress-debug-sections=none</samp> is equivalent to

  474. <samp>--nocompress-debug-sections</samp>.

  475. <samp>--compress-debug-sections=zlib</samp> and

  476. <samp>--compress-debug-sections=zlib-gabi</samp> are equivalent to

  477. <samp>--compress-debug-sections</samp>.

  478. <samp>--compress-debug-sections=zlib-gnu</samp> compresses DWARF debug

  479. sections using zlib.  The debug sections are renamed to begin with

  480. &lsquo;<samp>.zdebug</samp>&rsquo;.  Note if compression would make a given section

  481. <em>larger</em> then it is not compressed nor renamed.

  482. </p>

  483. 

  484. </dd>

  485. <dt><code>--nocompress-debug-sections</code></dt>

  486. <dd><p>Do not compress DWARF debug sections.  This is usually the default for all

  487. targets except the x86/x86_64, but a configure time option can be used to

  488. override this.

  489. </p>

  490. </dd>

  491. <dt><code>-D</code></dt>

  492. <dd><p>Ignored.  This option is accepted for script compatibility with calls to

  493. other assemblers.

  494. </p>

  495. </dd>

  496. <dt><code>--debug-prefix-map <var>old</var>=<var>new</var></code></dt>

  497. <dd><p>When assembling files in directory <samp><var>old</var></samp>, record debugging

  498. information describing them as in <samp><var>new</var></samp> instead.

  499. </p>

  500. </dd>

  501. <dt><code>--defsym <var>sym</var>=<var>value</var></code></dt>

  502. <dd><p>Define the symbol <var>sym</var> to be <var>value</var> before assembling the input file.

  503. <var>value</var> must be an integer constant.  As in C, a leading &lsquo;<samp>0x</samp>&rsquo;

  504. indicates a hexadecimal value, and a leading &lsquo;<samp>0</samp>&rsquo; indicates an octal

  505. value.  The value of the symbol can be overridden inside a source file via the

  506. use of a <code>.set</code> pseudo-op.

  507. </p>

  508. </dd>

  509. <dt><code>-f</code></dt>

  510. <dd><p>&ldquo;fast&rdquo;&mdash;skip whitespace and comment preprocessing (assume source is

  511. compiler output).

  512. </p>

  513. </dd>

  514. <dt><code>-g</code></dt>

  515. <dt><code>--gen-debug</code></dt>

  516. <dd><p>Generate debugging information for each assembler source line using whichever

  517. debug format is preferred by the target.  This currently means either STABS,

  518. ECOFF or DWARF2.  When the debug format is DWARF then a <code>.debug_info</code> and

  519. <code>.debug_line</code> section is only emitted when the assembly file doesn&rsquo;t

  520. generate one itself.

  521. </p>

  522. </dd>

  523. <dt><code>--gstabs</code></dt>

  524. <dd><p>Generate stabs debugging information for each assembler line.  This

  525. may help debugging assembler code, if the debugger can handle it.

  526. </p>

  527. </dd>

  528. <dt><code>--gstabs+</code></dt>

  529. <dd><p>Generate stabs debugging information for each assembler line, with GNU

  530. extensions that probably only gdb can handle, and that could make other

  531. debuggers crash or refuse to read your program.  This

  532. may help debugging assembler code.  Currently the only GNU extension is

  533. the location of the current working directory at assembling time.

  534. </p>

  535. </dd>

  536. <dt><code>--gdwarf-2</code></dt>

  537. <dd><p>Generate DWARF2 debugging information for each assembler line.  This

  538. may help debugging assembler code, if the debugger can handle it.  Note&mdash;this

  539. option is only supported by some targets, not all of them.

  540. </p>

  541. </dd>

  542. <dt><code>--gdwarf-3</code></dt>

  543. <dd><p>This option is the same as the <samp>--gdwarf-2</samp> option, except that it

  544. allows for the possibility of the generation of extra debug information as per

  545. version 3 of the DWARF specification.  Note - enabling this option does not

  546. guarantee the generation of any extra infortmation, the choice to do so is on a

  547. per target basis.

  548. </p>

  549. </dd>

  550. <dt><code>--gdwarf-4</code></dt>

  551. <dd><p>This option is the same as the <samp>--gdwarf-2</samp> option, except that it

  552. allows for the possibility of the generation of extra debug information as per

  553. version 4 of the DWARF specification.  Note - enabling this option does not

  554. guarantee the generation of any extra infortmation, the choice to do so is on a

  555. per target basis.

  556. </p>

  557. </dd>

  558. <dt><code>--gdwarf-5</code></dt>

  559. <dd><p>This option is the same as the <samp>--gdwarf-2</samp> option, except that it

  560. allows for the possibility of the generation of extra debug information as per

  561. version 5 of the DWARF specification.  Note - enabling this option does not

  562. guarantee the generation of any extra infortmation, the choice to do so is on a

  563. per target basis.

  564. </p>

  565. </dd>

  566. <dt><code>--gdwarf-sections</code></dt>

  567. <dd><p>Instead of creating a .debug_line section, create a series of

  568. .debug_line.<var>foo</var> sections where <var>foo</var> is the name of the

  569. corresponding code section.  For example a code section called <var>.text.func</var>

  570. will have its dwarf line number information placed into a section called

  571. <var>.debug_line.text.func</var>.  If the code section is just called <var>.text</var>

  572. then debug line section will still be called just <var>.debug_line</var> without any

  573. suffix.

  574. </p>

  575. </dd>

  576. <dt><code>--gdwarf-cie-version=<var>version</var></code></dt>

  577. <dd><p>Control which version of DWARF Common Information Entries (CIEs) are produced.

  578. When this flag is not specificed the default is version 1, though some targets

  579. can modify this default.  Other possible values for <var>version</var> are 3 or 4.

  580. </p>

  581. </dd>

  582. <dt><code>--size-check=error</code></dt>

  583. <dt><code>--size-check=warning</code></dt>

  584. <dd><p>Issue an error or warning for invalid ELF .size directive.

  585. </p>

  586. </dd>

  587. <dt><code>--elf-stt-common=no</code></dt>

  588. <dt><code>--elf-stt-common=yes</code></dt>

  589. <dd><p>These options control whether the ELF assembler should generate common

  590. symbols with the <code>STT_COMMON</code> type.  The default can be controlled

  591. by a configure option <samp>--enable-elf-stt-common</samp>.

  592. </p>

  593. </dd>

  594. <dt><code>--generate-missing-build-notes=yes</code></dt>

  595. <dt><code>--generate-missing-build-notes=no</code></dt>

  596. <dd><p>These options control whether the ELF assembler should generate GNU Build

  597. attribute notes if none are present in the input sources.

  598. The default can be controlled by the <samp>--enable-generate-build-notes</samp>

  599. configure option.

  600. </p>

  601. 

  602. </dd>

  603. <dt><code>--help</code></dt>

  604. <dd><p>Print a summary of the command-line options and exit.

  605. </p>

  606. </dd>

  607. <dt><code>--target-help</code></dt>

  608. <dd><p>Print a summary of all target specific options and exit.

  609. </p>

  610. </dd>

  611. <dt><code>-I <var>dir</var></code></dt>

  612. <dd><p>Add directory <var>dir</var> to the search list for <code>.include</code> directives.

  613. </p>

  614. </dd>

  615. <dt><code>-J</code></dt>

  616. <dd><p>Don&rsquo;t warn about signed overflow.

  617. </p>

  618. </dd>

  619. <dt><code>-K</code></dt>

  620. <dd><p>Issue warnings when difference tables altered for long displacements.

  621. </p>

  622. </dd>

  623. <dt><code>-L</code></dt>

  624. <dt><code>--keep-locals</code></dt>

  625. <dd><p>Keep (in the symbol table) local symbols.  These symbols start with

  626. system-specific local label prefixes, typically &lsquo;<samp>.L</samp>&rsquo; for ELF systems

  627. or &lsquo;<samp>L</samp>&rsquo; for traditional a.out systems.

  628. See <a href="Symbol-Names.html#Symbol-Names">Symbol Names</a>.

  629. </p>

  630. </dd>

  631. <dt><code>--listing-lhs-width=<var>number</var></code></dt>

  632. <dd><p>Set the maximum width, in words, of the output data column for an assembler

  633. listing to <var>number</var>.

  634. </p>

  635. </dd>

  636. <dt><code>--listing-lhs-width2=<var>number</var></code></dt>

  637. <dd><p>Set the maximum width, in words, of the output data column for continuation

  638. lines in an assembler listing to <var>number</var>.

  639. </p>

  640. </dd>

  641. <dt><code>--listing-rhs-width=<var>number</var></code></dt>

  642. <dd><p>Set the maximum width of an input source line, as displayed in a listing, to

  643. <var>number</var> bytes.

  644. </p>

  645. </dd>

  646. <dt><code>--listing-cont-lines=<var>number</var></code></dt>

  647. <dd><p>Set the maximum number of lines printed in a listing for a single line of input

  648. to <var>number</var> + 1.

  649. </p>

  650. </dd>

  651. <dt><code>--no-pad-sections</code></dt>

  652. <dd><p>Stop the assembler for padding the ends of output sections to the alignment

  653. of that section.  The default is to pad the sections, but this can waste space

  654. which might be needed on targets which have tight memory constraints.

  655. </p>

  656. </dd>

  657. <dt><code>-o <var>objfile</var></code></dt>

  658. <dd><p>Name the object-file output from <code>as</code> <var>objfile</var>.

  659. </p>

  660. </dd>

  661. <dt><code>-R</code></dt>

  662. <dd><p>Fold the data section into the text section.

  663. </p>

  664. </dd>

  665. <dt><code>--hash-size=<var>number</var></code></dt>

  666. <dd><p>Set the default size of GAS&rsquo;s hash tables to a prime number close to

  667. <var>number</var>.  Increasing this value can reduce the length of time it takes the

  668. assembler to perform its tasks, at the expense of increasing the assembler&rsquo;s

  669. memory requirements.  Similarly reducing this value can reduce the memory

  670. requirements at the expense of speed.

  671. </p>

  672. </dd>

  673. <dt><code>--reduce-memory-overheads</code></dt>

  674. <dd><p>This option reduces GAS&rsquo;s memory requirements, at the expense of making the

  675. assembly processes slower.  Currently this switch is a synonym for

  676. &lsquo;<samp>--hash-size=4051</samp>&rsquo;, but in the future it may have other effects as well.

  677. </p>

  678. </dd>

  679. <dt><code>--sectname-subst</code></dt>

  680. <dd><p>Honor substitution sequences in section names.

  681. See <a href="Section.html#Section-Name-Substitutions"><code>.section <var>name</var></code></a>.

  682. </p>

  683. </dd>

  684. <dt><code>--statistics</code></dt>

  685. <dd><p>Print the maximum space (in bytes) and total time (in seconds) used by

  686. assembly.

  687. </p>

  688. </dd>

  689. <dt><code>--strip-local-absolute</code></dt>

  690. <dd><p>Remove local absolute symbols from the outgoing symbol table.

  691. </p>

  692. </dd>

  693. <dt><code>-v</code></dt>

  694. <dt><code>-version</code></dt>

  695. <dd><p>Print the <code>as</code> version.

  696. </p>

  697. </dd>

  698. <dt><code>--version</code></dt>

  699. <dd><p>Print the <code>as</code> version and exit.

  700. </p>

  701. </dd>

  702. <dt><code>-W</code></dt>

  703. <dt><code>--no-warn</code></dt>

  704. <dd><p>Suppress warning messages.

  705. </p>

  706. </dd>

  707. <dt><code>--fatal-warnings</code></dt>

  708. <dd><p>Treat warnings as errors.

  709. </p>

  710. </dd>

  711. <dt><code>--warn</code></dt>

  712. <dd><p>Don&rsquo;t suppress warning messages or treat them as errors.

  713. </p>

  714. </dd>

  715. <dt><code>-w</code></dt>

  716. <dd><p>Ignored.

  717. </p>

  718. </dd>

  719. <dt><code>-x</code></dt>

  720. <dd><p>Ignored.

  721. </p>

  722. </dd>

  723. <dt><code>-Z</code></dt>

  724. <dd><p>Generate an object file even after errors.

  725. </p>

  726. </dd>

  727. <dt><code>-- | <var>files</var> &hellip;</code></dt>

  728. <dd><p>Standard input, or source files to assemble.

  729. </p>

  730. </dd>

  731. </dl>

  732. 

  733. 

  734. <p>See <a href="AArch64-Options.html#AArch64-Options">AArch64 Options</a>, for the options available when as is configured

  735. for the 64-bit mode of the ARM Architecture (AArch64).

  736. </p>

  737. 

  738. 

  739. 

  740. <p>See <a href="Alpha-Options.html#Alpha-Options">Alpha Options</a>, for the options available when as is configured

  741. for an Alpha processor.

  742. </p>

  743. 

  744. 

  745. <p>The following options are available when as is configured for an ARC

  746. processor.

  747. </p>

  748. <dl compact="compact">

  749. <dt><code>-mcpu=<var>cpu</var></code></dt>

  750. <dd><p>This option selects the core processor variant.

  751. </p></dd>

  752. <dt><code>-EB | -EL</code></dt>

  753. <dd><p>Select either big-endian (-EB) or little-endian (-EL) output.

  754. </p></dd>

  755. <dt><code>-mcode-density</code></dt>

  756. <dd><p>Enable Code Density extenssion instructions.

  757. </p></dd>

  758. </dl>

  759. 

  760. <p>The following options are available when as is configured for the ARM

  761. processor family.

  762. </p>

  763. <dl compact="compact">

  764. <dt><code>-mcpu=<var>processor</var>[+<var>extension</var>&hellip;]</code></dt>

  765. <dd><p>Specify which ARM processor variant is the target.

  766. </p></dd>

  767. <dt><code>-march=<var>architecture</var>[+<var>extension</var>&hellip;]</code></dt>

  768. <dd><p>Specify which ARM architecture variant is used by the target.

  769. </p></dd>

  770. <dt><code>-mfpu=<var>floating-point-format</var></code></dt>

  771. <dd><p>Select which Floating Point architecture is the target.

  772. </p></dd>

  773. <dt><code>-mfloat-abi=<var>abi</var></code></dt>

  774. <dd><p>Select which floating point ABI is in use.

  775. </p></dd>

  776. <dt><code>-mthumb</code></dt>

  777. <dd><p>Enable Thumb only instruction decoding.

  778. </p></dd>

  779. <dt><code>-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant</code></dt>

  780. <dd><p>Select which procedure calling convention is in use.

  781. </p></dd>

  782. <dt><code>-EB | -EL</code></dt>

  783. <dd><p>Select either big-endian (-EB) or little-endian (-EL) output.

  784. </p></dd>

  785. <dt><code>-mthumb-interwork</code></dt>

  786. <dd><p>Specify that the code has been generated with interworking between Thumb and

  787. ARM code in mind.

  788. </p></dd>

  789. <dt><code>-mccs</code></dt>

  790. <dd><p>Turns on CodeComposer Studio assembly syntax compatibility mode.

  791. </p></dd>

  792. <dt><code>-k</code></dt>

  793. <dd><p>Specify that PIC code has been generated.

  794. </p></dd>

  795. </dl>

  796. 

  797. 

  798. <p>See <a href="Blackfin-Options.html#Blackfin-Options">Blackfin Options</a>, for the options available when as is

  799. configured for the Blackfin processor family.

  800. </p>

  801. 

  802. 

  803. 

  804. <p>See <a href="BPF-Options.html#BPF-Options">BPF Options</a>, for the options available when as is

  805. configured for the Linux kernel BPF processor family.

  806. </p>

  807. 

  808. 

  809. <p>See the info pages for documentation of the CRIS-specific options.

  810. </p>

  811. 

  812. <p>See <a href="C_002dSKY-Options.html#C_002dSKY-Options">C-SKY Options</a>, for the options available when as is

  813. configured for the C-SKY processor family.

  814. </p>

  815. 

  816. 

  817. <p>The following options are available when as is configured for

  818. a D10V processor.

  819. </p><dl compact="compact">

  820. <dd><a name="index-D10V-optimization"></a>

  821. <a name="index-optimization_002c-D10V"></a>

  822. </dd>

  823. <dt><code>-O</code></dt>

  824. <dd><p>Optimize output by parallelizing instructions.

  825. </p></dd>

  826. </dl>

  827. 

  828. <p>The following options are available when as is configured for a D30V

  829. processor.

  830. </p><dl compact="compact">

  831. <dd><a name="index-D30V-optimization"></a>

  832. <a name="index-optimization_002c-D30V"></a>

  833. </dd>

  834. <dt><code>-O</code></dt>

  835. <dd><p>Optimize output by parallelizing instructions.

  836. </p>

  837. <a name="index-D30V-nops"></a>

  838. </dd>

  839. <dt><code>-n</code></dt>

  840. <dd><p>Warn when nops are generated.

  841. </p>

  842. <a name="index-D30V-nops-after-32_002dbit-multiply"></a>

  843. </dd>

  844. <dt><code>-N</code></dt>

  845. <dd><p>Warn when a nop after a 32-bit multiply instruction is generated.

  846. </p></dd>

  847. </dl>

  848. 

  849. <p>The following options are available when as is configured for the

  850. Adapteva EPIPHANY series.

  851. </p>

  852. <p>See <a href="Epiphany-Options.html#Epiphany-Options">Epiphany Options</a>, for the options available when as is

  853. configured for an Epiphany processor.

  854. </p>

  855. 

  856. 

  857. 

  858. 

  859. <p>See <a href="i386_002dOptions.html#i386_002dOptions">i386-Options</a>, for the options available when as is

  860. configured for an i386 processor.

  861. </p>

  862. 

  863. 

  864. <p>The following options are available when as is configured for the

  865. Ubicom IP2K series.

  866. </p>

  867. <dl compact="compact">

  868. <dt><code>-mip2022ext</code></dt>

  869. <dd><p>Specifies that the extended IP2022 instructions are allowed.

  870. </p>

  871. </dd>

  872. <dt><code>-mip2022</code></dt>

  873. <dd><p>Restores the default behaviour, which restricts the permitted instructions to

  874. just the basic IP2022 ones.

  875. </p>

  876. </dd>

  877. </dl>

  878. 

  879. <p>The following options are available when as is configured for the

  880. Renesas M32C and M16C processors.

  881. </p>

  882. <dl compact="compact">

  883. <dt><code>-m32c</code></dt>

  884. <dd><p>Assemble M32C instructions.

  885. </p>

  886. </dd>

  887. <dt><code>-m16c</code></dt>

  888. <dd><p>Assemble M16C instructions (the default).

  889. </p>

  890. </dd>

  891. <dt><code>-relax</code></dt>

  892. <dd><p>Enable support for link-time relaxations.

  893. </p>

  894. </dd>

  895. <dt><code>-h-tick-hex</code></dt>

  896. <dd><p>Support H&rsquo;00 style hex constants in addition to 0x00 style.

  897. </p>

  898. </dd>

  899. </dl>

  900. 

  901. <p>The following options are available when as is configured for the

  902. Renesas M32R (formerly Mitsubishi M32R) series.

  903. </p>

  904. <dl compact="compact">

  905. <dt><code>--m32rx</code></dt>

  906. <dd><p>Specify which processor in the M32R family is the target.  The default

  907. is normally the M32R, but this option changes it to the M32RX.

  908. </p>

  909. </dd>

  910. <dt><code>--warn-explicit-parallel-conflicts or --Wp</code></dt>

  911. <dd><p>Produce warning messages when questionable parallel constructs are

  912. encountered.

  913. </p>

  914. </dd>

  915. <dt><code>--no-warn-explicit-parallel-conflicts or --Wnp</code></dt>

  916. <dd><p>Do not produce warning messages when questionable parallel constructs are

  917. encountered.

  918. </p>

  919. </dd>

  920. </dl>

  921. 

  922. <p>The following options are available when as is configured for the

  923. Motorola 68000 series.

  924. </p>

  925. <dl compact="compact">

  926. <dt><code>-l</code></dt>

  927. <dd><p>Shorten references to undefined symbols, to one word instead of two.

  928. </p>

  929. </dd>

  930. <dt><code>-m68000 | -m68008 | -m68010 | -m68020 | -m68030</code></dt>

  931. <dt><code>| -m68040 | -m68060 | -m68302 | -m68331 | -m68332</code></dt>

  932. <dt><code>| -m68333 | -m68340 | -mcpu32 | -m5200</code></dt>

  933. <dd><p>Specify what processor in the 68000 family is the target.  The default

  934. is normally the 68020, but this can be changed at configuration time.

  935. </p>

  936. </dd>

  937. <dt><code>-m68881 | -m68882 | -mno-68881 | -mno-68882</code></dt>

  938. <dd><p>The target machine does (or does not) have a floating-point coprocessor.

  939. The default is to assume a coprocessor for 68020, 68030, and cpu32.  Although

  940. the basic 68000 is not compatible with the 68881, a combination of the

  941. two can be specified, since it&rsquo;s possible to do emulation of the

  942. coprocessor instructions with the main processor.

  943. </p>

  944. </dd>

  945. <dt><code>-m68851 | -mno-68851</code></dt>

  946. <dd><p>The target machine does (or does not) have a memory-management

  947. unit coprocessor.  The default is to assume an MMU for 68020 and up.

  948. </p>

  949. </dd>

  950. </dl>

  951. 

  952. 

  953. <p>See <a href="Nios-II-Options.html#Nios-II-Options">Nios II Options</a>, for the options available when as is configured

  954. for an Altera Nios II processor.

  955. </p>

  956. 

  957. 

  958. <p>For details about the PDP-11 machine dependent features options,

  959. see <a href="PDP_002d11_002dOptions.html#PDP_002d11_002dOptions">PDP-11-Options</a>.

  960. </p>

  961. <dl compact="compact">

  962. <dt><code>-mpic | -mno-pic</code></dt>

  963. <dd><p>Generate position-independent (or position-dependent) code.  The

  964. default is <samp>-mpic</samp>.

  965. </p>

  966. </dd>

  967. <dt><code>-mall</code></dt>

  968. <dt><code>-mall-extensions</code></dt>

  969. <dd><p>Enable all instruction set extensions.  This is the default.

  970. </p>

  971. </dd>

  972. <dt><code>-mno-extensions</code></dt>

  973. <dd><p>Disable all instruction set extensions.

  974. </p>

  975. </dd>

  976. <dt><code>-m<var>extension</var> | -mno-<var>extension</var></code></dt>

  977. <dd><p>Enable (or disable) a particular instruction set extension.

  978. </p>

  979. </dd>

  980. <dt><code>-m<var>cpu</var></code></dt>

  981. <dd><p>Enable the instruction set extensions supported by a particular CPU, and

  982. disable all other extensions.

  983. </p>

  984. </dd>

  985. <dt><code>-m<var>machine</var></code></dt>

  986. <dd><p>Enable the instruction set extensions supported by a particular machine

  987. model, and disable all other extensions.

  988. </p></dd>

  989. </dl>

  990. 

  991. 

  992. <p>The following options are available when as is configured for

  993. a picoJava processor.

  994. </p>

  995. <dl compact="compact">

  996. <dd>

  997. <a name="index-PJ-endianness"></a>

  998. <a name="index-endianness_002c-PJ"></a>

  999. <a name="index-big-endian-output_002c-PJ"></a>

  1000. </dd>

  1001. <dt><code>-mb</code></dt>

  1002. <dd><p>Generate &ldquo;big endian&rdquo; format output.

  1003. </p>

  1004. <a name="index-little-endian-output_002c-PJ"></a>

  1005. </dd>

  1006. <dt><code>-ml</code></dt>

  1007. <dd><p>Generate &ldquo;little endian&rdquo; format output.

  1008. </p>

  1009. </dd>

  1010. </dl>

  1011. 

  1012. 

  1013. <p>See <a href="PRU-Options.html#PRU-Options">PRU Options</a>, for the options available when as is configured

  1014. for a PRU processor.

  1015. </p>

  1016. 

  1017. <p>The following options are available when as is configured for the

  1018. Motorola 68HC11 or 68HC12 series.

  1019. </p>

  1020. <dl compact="compact">

  1021. <dt><code>-m68hc11 | -m68hc12 | -m68hcs12 | -mm9s12x | -mm9s12xg</code></dt>

  1022. <dd><p>Specify what processor is the target.  The default is

  1023. defined by the configuration option when building the assembler.

  1024. </p>

  1025. </dd>

  1026. <dt><code>--xgate-ramoffset</code></dt>

  1027. <dd><p>Instruct the linker to offset RAM addresses from S12X address space into

  1028. XGATE address space.

  1029. </p>

  1030. </dd>

  1031. <dt><code>-mshort</code></dt>

  1032. <dd><p>Specify to use the 16-bit integer ABI.

  1033. </p>

  1034. </dd>

  1035. <dt><code>-mlong</code></dt>

  1036. <dd><p>Specify to use the 32-bit integer ABI.

  1037. </p>

  1038. </dd>

  1039. <dt><code>-mshort-double</code></dt>

  1040. <dd><p>Specify to use the 32-bit double ABI.

  1041. </p>

  1042. </dd>

  1043. <dt><code>-mlong-double</code></dt>

  1044. <dd><p>Specify to use the 64-bit double ABI.

  1045. </p>

  1046. </dd>

  1047. <dt><code>--force-long-branches</code></dt>

  1048. <dd><p>Relative branches are turned into absolute ones. This concerns

  1049. conditional branches, unconditional branches and branches to a

  1050. sub routine.

  1051. </p>

  1052. </dd>

  1053. <dt><code>-S | --short-branches</code></dt>

  1054. <dd><p>Do not turn relative branches into absolute ones

  1055. when the offset is out of range.

  1056. </p>

  1057. </dd>

  1058. <dt><code>--strict-direct-mode</code></dt>

  1059. <dd><p>Do not turn the direct addressing mode into extended addressing mode

  1060. when the instruction does not support direct addressing mode.

  1061. </p>

  1062. </dd>

  1063. <dt><code>--print-insn-syntax</code></dt>

  1064. <dd><p>Print the syntax of instruction in case of error.

  1065. </p>

  1066. </dd>

  1067. <dt><code>--print-opcodes</code></dt>

  1068. <dd><p>Print the list of instructions with syntax and then exit.

  1069. </p>

  1070. </dd>

  1071. <dt><code>--generate-example</code></dt>

  1072. <dd><p>Print an example of instruction for each possible instruction and then exit.

  1073. This option is only useful for testing <code>as</code>.

  1074. </p>

  1075. </dd>

  1076. </dl>

  1077. 

  1078. <p>The following options are available when <code>as</code> is configured

  1079. for the SPARC architecture:

  1080. </p>

  1081. <dl compact="compact">

  1082. <dt><code>-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite</code></dt>

  1083. <dt><code>-Av8plus | -Av8plusa | -Av9 | -Av9a</code></dt>

  1084. <dd><p>Explicitly select a variant of the SPARC architecture.

  1085. </p>

  1086. <p>&lsquo;<samp>-Av8plus</samp>&rsquo; and &lsquo;<samp>-Av8plusa</samp>&rsquo; select a 32 bit environment.

  1087. &lsquo;<samp>-Av9</samp>&rsquo; and &lsquo;<samp>-Av9a</samp>&rsquo; select a 64 bit environment.

  1088. </p>

  1089. <p>&lsquo;<samp>-Av8plusa</samp>&rsquo; and &lsquo;<samp>-Av9a</samp>&rsquo; enable the SPARC V9 instruction set with

  1090. UltraSPARC extensions.

  1091. </p>

  1092. </dd>

  1093. <dt><code>-xarch=v8plus | -xarch=v8plusa</code></dt>

  1094. <dd><p>For compatibility with the Solaris v9 assembler.  These options are

  1095. equivalent to -Av8plus and -Av8plusa, respectively.

  1096. </p>

  1097. </dd>

  1098. <dt><code>-bump</code></dt>

  1099. <dd><p>Warn when the assembler switches to another architecture.

  1100. </p></dd>

  1101. </dl>

  1102. 

  1103. <p>The following options are available when as is configured for the &rsquo;c54x

  1104. architecture.

  1105. </p>

  1106. <dl compact="compact">

  1107. <dt><code>-mfar-mode</code></dt>

  1108. <dd><p>Enable extended addressing mode.  All addresses and relocations will assume

  1109. extended addressing (usually 23 bits).

  1110. </p></dd>

  1111. <dt><code>-mcpu=<var>CPU_VERSION</var></code></dt>

  1112. <dd><p>Sets the CPU version being compiled for.

  1113. </p></dd>

  1114. <dt><code>-merrors-to-file <var>FILENAME</var></code></dt>

  1115. <dd><p>Redirect error output to a file, for broken systems which don&rsquo;t support such

  1116. behaviour in the shell.

  1117. </p></dd>

  1118. </dl>

  1119. 

  1120. <p>The following options are available when as is configured for

  1121. a MIPS processor.

  1122. </p>

  1123. <dl compact="compact">

  1124. <dt><code>-G <var>num</var></code></dt>

  1125. <dd><p>This option sets the largest size of an object that can be referenced

  1126. implicitly with the <code>gp</code> register.  It is only accepted for targets that

  1127. use ECOFF format, such as a DECstation running Ultrix.  The default value is 8.

  1128. </p>

  1129. <a name="index-MIPS-endianness"></a>

  1130. <a name="index-endianness_002c-MIPS"></a>

  1131. <a name="index-big-endian-output_002c-MIPS"></a>

  1132. </dd>

  1133. <dt><code>-EB</code></dt>

  1134. <dd><p>Generate &ldquo;big endian&rdquo; format output.

  1135. </p>

  1136. <a name="index-little-endian-output_002c-MIPS"></a>

  1137. </dd>

  1138. <dt><code>-EL</code></dt>

  1139. <dd><p>Generate &ldquo;little endian&rdquo; format output.

  1140. </p>

  1141. <a name="index-MIPS-ISA"></a>

  1142. </dd>

  1143. <dt><code>-mips1</code></dt>

  1144. <dt><code>-mips2</code></dt>

  1145. <dt><code>-mips3</code></dt>

  1146. <dt><code>-mips4</code></dt>

  1147. <dt><code>-mips5</code></dt>

  1148. <dt><code>-mips32</code></dt>

  1149. <dt><code>-mips32r2</code></dt>

  1150. <dt><code>-mips32r3</code></dt>

  1151. <dt><code>-mips32r5</code></dt>

  1152. <dt><code>-mips32r6</code></dt>

  1153. <dt><code>-mips64</code></dt>

  1154. <dt><code>-mips64r2</code></dt>

  1155. <dt><code>-mips64r3</code></dt>

  1156. <dt><code>-mips64r5</code></dt>

  1157. <dt><code>-mips64r6</code></dt>

  1158. <dd><p>Generate code for a particular MIPS Instruction Set Architecture level.

  1159. &lsquo;<samp>-mips1</samp>&rsquo; is an alias for &lsquo;<samp>-march=r3000</samp>&rsquo;, &lsquo;<samp>-mips2</samp>&rsquo; is an

  1160. alias for &lsquo;<samp>-march=r6000</samp>&rsquo;, &lsquo;<samp>-mips3</samp>&rsquo; is an alias for

  1161. &lsquo;<samp>-march=r4000</samp>&rsquo; and &lsquo;<samp>-mips4</samp>&rsquo; is an alias for &lsquo;<samp>-march=r8000</samp>&rsquo;.

  1162. &lsquo;<samp>-mips5</samp>&rsquo;, &lsquo;<samp>-mips32</samp>&rsquo;, &lsquo;<samp>-mips32r2</samp>&rsquo;, &lsquo;<samp>-mips32r3</samp>&rsquo;,

  1163. &lsquo;<samp>-mips32r5</samp>&rsquo;, &lsquo;<samp>-mips32r6</samp>&rsquo;, &lsquo;<samp>-mips64</samp>&rsquo;, &lsquo;<samp>-mips64r2</samp>&rsquo;,

  1164. &lsquo;<samp>-mips64r3</samp>&rsquo;, &lsquo;<samp>-mips64r5</samp>&rsquo;, and &lsquo;<samp>-mips64r6</samp>&rsquo; correspond to generic

  1165. MIPS V, MIPS32, MIPS32 Release 2, MIPS32 Release 3, MIPS32 Release 5, MIPS32

  1166. Release 6, MIPS64, MIPS64 Release 2, MIPS64 Release 3, MIPS64 Release 5, and

  1167. MIPS64 Release 6 ISA processors, respectively.

  1168. </p>

  1169. </dd>

  1170. <dt><code>-march=<var>cpu</var></code></dt>

  1171. <dd><p>Generate code for a particular MIPS CPU.

  1172. </p>

  1173. </dd>

  1174. <dt><code>-mtune=<var>cpu</var></code></dt>

  1175. <dd><p>Schedule and tune for a particular MIPS CPU.

  1176. </p>

  1177. </dd>

  1178. <dt><code>-mfix7000</code></dt>

  1179. <dt><code>-mno-fix7000</code></dt>

  1180. <dd><p>Cause nops to be inserted if the read of the destination register

  1181. of an mfhi or mflo instruction occurs in the following two instructions.

  1182. </p>

  1183. </dd>

  1184. <dt><code>-mfix-rm7000</code></dt>

  1185. <dt><code>-mno-fix-rm7000</code></dt>

  1186. <dd><p>Cause nops to be inserted if a dmult or dmultu instruction is

  1187. followed by a load instruction.

  1188. </p>

  1189. </dd>

  1190. <dt><code>-mfix-r5900</code></dt>

  1191. <dt><code>-mno-fix-r5900</code></dt>

  1192. <dd><p>Do not attempt to schedule the preceding instruction into the delay slot

  1193. of a branch instruction placed at the end of a short loop of six

  1194. instructions or fewer and always schedule a <code>nop</code> instruction there

  1195. instead.  The short loop bug under certain conditions causes loops to

  1196. execute only once or twice, due to a hardware bug in the R5900 chip.

  1197. </p>

  1198. </dd>

  1199. <dt><code>-mdebug</code></dt>

  1200. <dt><code>-no-mdebug</code></dt>

  1201. <dd><p>Cause stabs-style debugging output to go into an ECOFF-style .mdebug

  1202. section instead of the standard ELF .stabs sections.

  1203. </p>

  1204. </dd>

  1205. <dt><code>-mpdr</code></dt>

  1206. <dt><code>-mno-pdr</code></dt>

  1207. <dd><p>Control generation of <code>.pdr</code> sections.

  1208. </p>

  1209. </dd>

  1210. <dt><code>-mgp32</code></dt>

  1211. <dt><code>-mfp32</code></dt>

  1212. <dd><p>The register sizes are normally inferred from the ISA and ABI, but these

  1213. flags force a certain group of registers to be treated as 32 bits wide at

  1214. all times.  &lsquo;<samp>-mgp32</samp>&rsquo; controls the size of general-purpose registers

  1215. and &lsquo;<samp>-mfp32</samp>&rsquo; controls the size of floating-point registers.

  1216. </p>

  1217. </dd>

  1218. <dt><code>-mgp64</code></dt>

  1219. <dt><code>-mfp64</code></dt>

  1220. <dd><p>The register sizes are normally inferred from the ISA and ABI, but these

  1221. flags force a certain group of registers to be treated as 64 bits wide at

  1222. all times.  &lsquo;<samp>-mgp64</samp>&rsquo; controls the size of general-purpose registers

  1223. and &lsquo;<samp>-mfp64</samp>&rsquo; controls the size of floating-point registers.

  1224. </p>

  1225. </dd>

  1226. <dt><code>-mfpxx</code></dt>

  1227. <dd><p>The register sizes are normally inferred from the ISA and ABI, but using

  1228. this flag in combination with &lsquo;<samp>-mabi=32</samp>&rsquo; enables an ABI variant

  1229. which will operate correctly with floating-point registers which are

  1230. 32 or 64 bits wide.

  1231. </p>

  1232. </dd>

  1233. <dt><code>-modd-spreg</code></dt>

  1234. <dt><code>-mno-odd-spreg</code></dt>

  1235. <dd><p>Enable use of floating-point operations on odd-numbered single-precision

  1236. registers when supported by the ISA.  &lsquo;<samp>-mfpxx</samp>&rsquo; implies

  1237. &lsquo;<samp>-mno-odd-spreg</samp>&rsquo;, otherwise the default is &lsquo;<samp>-modd-spreg</samp>&rsquo;.

  1238. </p>

  1239. </dd>

  1240. <dt><code>-mips16</code></dt>

  1241. <dt><code>-no-mips16</code></dt>

  1242. <dd><p>Generate code for the MIPS 16 processor.  This is equivalent to putting

  1243. <code>.module mips16</code> at the start of the assembly file.  &lsquo;<samp>-no-mips16</samp>&rsquo;

  1244. turns off this option.

  1245. </p>

  1246. </dd>

  1247. <dt><code>-mmips16e2</code></dt>

  1248. <dt><code>-mno-mips16e2</code></dt>

  1249. <dd><p>Enable the use of MIPS16e2 instructions in MIPS16 mode.  This is equivalent

  1250. to putting <code>.module mips16e2</code> at the start of the assembly file.

  1251. &lsquo;<samp>-mno-mips16e2</samp>&rsquo; turns off this option.

  1252. </p>

  1253. </dd>

  1254. <dt><code>-mmicromips</code></dt>

  1255. <dt><code>-mno-micromips</code></dt>

  1256. <dd><p>Generate code for the microMIPS processor.  This is equivalent to putting

  1257. <code>.module micromips</code> at the start of the assembly file.

  1258. &lsquo;<samp>-mno-micromips</samp>&rsquo; turns off this option.  This is equivalent to putting

  1259. <code>.module nomicromips</code> at the start of the assembly file.

  1260. </p>

  1261. </dd>

  1262. <dt><code>-msmartmips</code></dt>

  1263. <dt><code>-mno-smartmips</code></dt>

  1264. <dd><p>Enables the SmartMIPS extension to the MIPS32 instruction set.  This is

  1265. equivalent to putting <code>.module smartmips</code> at the start of the assembly

  1266. file.  &lsquo;<samp>-mno-smartmips</samp>&rsquo; turns off this option.

  1267. </p>

  1268. </dd>

  1269. <dt><code>-mips3d</code></dt>

  1270. <dt><code>-no-mips3d</code></dt>

  1271. <dd><p>Generate code for the MIPS-3D Application Specific Extension.

  1272. This tells the assembler to accept MIPS-3D instructions.

  1273. &lsquo;<samp>-no-mips3d</samp>&rsquo; turns off this option.

  1274. </p>

  1275. </dd>

  1276. <dt><code>-mdmx</code></dt>

  1277. <dt><code>-no-mdmx</code></dt>

  1278. <dd><p>Generate code for the MDMX Application Specific Extension.

  1279. This tells the assembler to accept MDMX instructions.

  1280. &lsquo;<samp>-no-mdmx</samp>&rsquo; turns off this option.

  1281. </p>

  1282. </dd>

  1283. <dt><code>-mdsp</code></dt>

  1284. <dt><code>-mno-dsp</code></dt>

  1285. <dd><p>Generate code for the DSP Release 1 Application Specific Extension.

  1286. This tells the assembler to accept DSP Release 1 instructions.

  1287. &lsquo;<samp>-mno-dsp</samp>&rsquo; turns off this option.

  1288. </p>

  1289. </dd>

  1290. <dt><code>-mdspr2</code></dt>

  1291. <dt><code>-mno-dspr2</code></dt>

  1292. <dd><p>Generate code for the DSP Release 2 Application Specific Extension.

  1293. This option implies &lsquo;<samp>-mdsp</samp>&rsquo;.

  1294. This tells the assembler to accept DSP Release 2 instructions.

  1295. &lsquo;<samp>-mno-dspr2</samp>&rsquo; turns off this option.

  1296. </p>

  1297. </dd>

  1298. <dt><code>-mdspr3</code></dt>

  1299. <dt><code>-mno-dspr3</code></dt>

  1300. <dd><p>Generate code for the DSP Release 3 Application Specific Extension.

  1301. This option implies &lsquo;<samp>-mdsp</samp>&rsquo; and &lsquo;<samp>-mdspr2</samp>&rsquo;.

  1302. This tells the assembler to accept DSP Release 3 instructions.

  1303. &lsquo;<samp>-mno-dspr3</samp>&rsquo; turns off this option.

  1304. </p>

  1305. </dd>

  1306. <dt><code>-mmsa</code></dt>

  1307. <dt><code>-mno-msa</code></dt>

  1308. <dd><p>Generate code for the MIPS SIMD Architecture Extension.

  1309. This tells the assembler to accept MSA instructions.

  1310. &lsquo;<samp>-mno-msa</samp>&rsquo; turns off this option.

  1311. </p>

  1312. </dd>

  1313. <dt><code>-mxpa</code></dt>

  1314. <dt><code>-mno-xpa</code></dt>

  1315. <dd><p>Generate code for the MIPS eXtended Physical Address (XPA) Extension.

  1316. This tells the assembler to accept XPA instructions.

  1317. &lsquo;<samp>-mno-xpa</samp>&rsquo; turns off this option.

  1318. </p>

  1319. </dd>

  1320. <dt><code>-mmt</code></dt>

  1321. <dt><code>-mno-mt</code></dt>

  1322. <dd><p>Generate code for the MT Application Specific Extension.

  1323. This tells the assembler to accept MT instructions.

  1324. &lsquo;<samp>-mno-mt</samp>&rsquo; turns off this option.

  1325. </p>

  1326. </dd>

  1327. <dt><code>-mmcu</code></dt>

  1328. <dt><code>-mno-mcu</code></dt>

  1329. <dd><p>Generate code for the MCU Application Specific Extension.

  1330. This tells the assembler to accept MCU instructions.

  1331. &lsquo;<samp>-mno-mcu</samp>&rsquo; turns off this option.

  1332. </p>

  1333. </dd>

  1334. <dt><code>-mcrc</code></dt>

  1335. <dt><code>-mno-crc</code></dt>

  1336. <dd><p>Generate code for the MIPS cyclic redundancy check (CRC) Application

  1337. Specific Extension.  This tells the assembler to accept CRC instructions.

  1338. &lsquo;<samp>-mno-crc</samp>&rsquo; turns off this option.

  1339. </p>

  1340. </dd>

  1341. <dt><code>-mginv</code></dt>

  1342. <dt><code>-mno-ginv</code></dt>

  1343. <dd><p>Generate code for the Global INValidate (GINV) Application Specific

  1344. Extension.  This tells the assembler to accept GINV instructions.

  1345. &lsquo;<samp>-mno-ginv</samp>&rsquo; turns off this option.

  1346. </p>

  1347. </dd>

  1348. <dt><code>-mloongson-mmi</code></dt>

  1349. <dt><code>-mno-loongson-mmi</code></dt>

  1350. <dd><p>Generate code for the Loongson MultiMedia extensions Instructions (MMI)

  1351. Application Specific Extension.  This tells the assembler to accept MMI

  1352. instructions.

  1353. &lsquo;<samp>-mno-loongson-mmi</samp>&rsquo; turns off this option.

  1354. </p>

  1355. </dd>

  1356. <dt><code>-mloongson-cam</code></dt>

  1357. <dt><code>-mno-loongson-cam</code></dt>

  1358. <dd><p>Generate code for the Loongson Content Address Memory (CAM) instructions.

  1359. This tells the assembler to accept Loongson CAM instructions.

  1360. &lsquo;<samp>-mno-loongson-cam</samp>&rsquo; turns off this option.

  1361. </p>

  1362. </dd>

  1363. <dt><code>-mloongson-ext</code></dt>

  1364. <dt><code>-mno-loongson-ext</code></dt>

  1365. <dd><p>Generate code for the Loongson EXTensions (EXT) instructions.

  1366. This tells the assembler to accept Loongson EXT instructions.

  1367. &lsquo;<samp>-mno-loongson-ext</samp>&rsquo; turns off this option.

  1368. </p>

  1369. </dd>

  1370. <dt><code>-mloongson-ext2</code></dt>

  1371. <dt><code>-mno-loongson-ext2</code></dt>

  1372. <dd><p>Generate code for the Loongson EXTensions R2 (EXT2) instructions.

  1373. This option implies &lsquo;<samp>-mloongson-ext</samp>&rsquo;.

  1374. This tells the assembler to accept Loongson EXT2 instructions.

  1375. &lsquo;<samp>-mno-loongson-ext2</samp>&rsquo; turns off this option.

  1376. </p>

  1377. </dd>

  1378. <dt><code>-minsn32</code></dt>

  1379. <dt><code>-mno-insn32</code></dt>

  1380. <dd><p>Only use 32-bit instruction encodings when generating code for the

  1381. microMIPS processor.  This option inhibits the use of any 16-bit

  1382. instructions.  This is equivalent to putting <code>.set insn32</code> at

  1383. the start of the assembly file.  &lsquo;<samp>-mno-insn32</samp>&rsquo; turns off this

  1384. option.  This is equivalent to putting <code>.set noinsn32</code> at the

  1385. start of the assembly file.  By default &lsquo;<samp>-mno-insn32</samp>&rsquo; is

  1386. selected, allowing all instructions to be used.

  1387. </p>

  1388. </dd>

  1389. <dt><code>--construct-floats</code></dt>

  1390. <dt><code>--no-construct-floats</code></dt>

  1391. <dd><p>The &lsquo;<samp>--no-construct-floats</samp>&rsquo; option disables the construction of

  1392. double width floating point constants by loading the two halves of the

  1393. value into the two single width floating point registers that make up

  1394. the double width register.  By default &lsquo;<samp>--construct-floats</samp>&rsquo; is

  1395. selected, allowing construction of these floating point constants.

  1396. </p>

  1397. </dd>

  1398. <dt><code>--relax-branch</code></dt>

  1399. <dt><code>--no-relax-branch</code></dt>

  1400. <dd><p>The &lsquo;<samp>--relax-branch</samp>&rsquo; option enables the relaxation of out-of-range

  1401. branches.  By default &lsquo;<samp>--no-relax-branch</samp>&rsquo; is selected, causing any

  1402. out-of-range branches to produce an error.

  1403. </p>

  1404. </dd>

  1405. <dt><code>-mignore-branch-isa</code></dt>

  1406. <dt><code>-mno-ignore-branch-isa</code></dt>

  1407. <dd><p>Ignore branch checks for invalid transitions between ISA modes.  The

  1408. semantics of branches does not provide for an ISA mode switch, so in

  1409. most cases the ISA mode a branch has been encoded for has to be the

  1410. same as the ISA mode of the branch&rsquo;s target label.  Therefore GAS has

  1411. checks implemented that verify in branch assembly that the two ISA

  1412. modes match.  &lsquo;<samp>-mignore-branch-isa</samp>&rsquo; disables these checks.  By

  1413. default &lsquo;<samp>-mno-ignore-branch-isa</samp>&rsquo; is selected, causing any invalid

  1414. branch requiring a transition between ISA modes to produce an error.

  1415. </p>

  1416. </dd>

  1417. <dt><code>-mnan=<var>encoding</var></code></dt>

  1418. <dd><p>Select between the IEEE 754-2008 (<samp>-mnan=2008</samp>) or the legacy

  1419. (<samp>-mnan=legacy</samp>) NaN encoding format.  The latter is the default.

  1420. </p>

  1421. <a name="index-emulation"></a>

  1422. </dd>

  1423. <dt><code>--emulation=<var>name</var></code></dt>

  1424. <dd><p>This option was formerly used to switch between ELF and ECOFF output

  1425. on targets like IRIX 5 that supported both.  MIPS ECOFF support was

  1426. removed in GAS 2.24, so the option now serves little purpose.

  1427. It is retained for backwards compatibility.

  1428. </p>

  1429. <p>The available configuration names are: &lsquo;<samp>mipself</samp>&rsquo;, &lsquo;<samp>mipslelf</samp>&rsquo; and

  1430. &lsquo;<samp>mipsbelf</samp>&rsquo;.  Choosing &lsquo;<samp>mipself</samp>&rsquo; now has no effect, since the output

  1431. is always ELF.  &lsquo;<samp>mipslelf</samp>&rsquo; and &lsquo;<samp>mipsbelf</samp>&rsquo; select little- and

  1432. big-endian output respectively, but &lsquo;<samp>-EL</samp>&rsquo; and &lsquo;<samp>-EB</samp>&rsquo; are now the

  1433. preferred options instead.

  1434. </p>

  1435. </dd>

  1436. <dt><code>-nocpp</code></dt>

  1437. <dd><p><code>as</code> ignores this option.  It is accepted for compatibility with

  1438. the native tools.

  1439. </p>

  1440. </dd>

  1441. <dt><code>--trap</code></dt>

  1442. <dt><code>--no-trap</code></dt>

  1443. <dt><code>--break</code></dt>

  1444. <dt><code>--no-break</code></dt>

  1445. <dd><p>Control how to deal with multiplication overflow and division by zero.

  1446. &lsquo;<samp>--trap</samp>&rsquo; or &lsquo;<samp>--no-break</samp>&rsquo; (which are synonyms) take a trap exception

  1447. (and only work for Instruction Set Architecture level 2 and higher);

  1448. &lsquo;<samp>--break</samp>&rsquo; or &lsquo;<samp>--no-trap</samp>&rsquo; (also synonyms, and the default) take a

  1449. break exception.

  1450. </p>

  1451. </dd>

  1452. <dt><code>-n</code></dt>

  1453. <dd><p>When this option is used, <code>as</code> will issue a warning every

  1454. time it generates a nop instruction from a macro.

  1455. </p></dd>

  1456. </dl>

  1457. 

  1458. <p>The following options are available when as is configured for

  1459. an MCore processor.

  1460. </p>

  1461. <dl compact="compact">

  1462. <dt><code>-jsri2bsr</code></dt>

  1463. <dt><code>-nojsri2bsr</code></dt>

  1464. <dd><p>Enable or disable the JSRI to BSR transformation.  By default this is enabled.

  1465. The command-line option &lsquo;<samp>-nojsri2bsr</samp>&rsquo; can be used to disable it.

  1466. </p>

  1467. </dd>

  1468. <dt><code>-sifilter</code></dt>

  1469. <dt><code>-nosifilter</code></dt>

  1470. <dd><p>Enable or disable the silicon filter behaviour.  By default this is disabled.

  1471. The default can be overridden by the &lsquo;<samp>-sifilter</samp>&rsquo; command-line option.

  1472. </p>

  1473. </dd>

  1474. <dt><code>-relax</code></dt>

  1475. <dd><p>Alter jump instructions for long displacements.

  1476. </p>

  1477. </dd>

  1478. <dt><code>-mcpu=[210|340]</code></dt>

  1479. <dd><p>Select the cpu type on the target hardware.  This controls which instructions

  1480. can be assembled.

  1481. </p>

  1482. </dd>

  1483. <dt><code>-EB</code></dt>

  1484. <dd><p>Assemble for a big endian target.

  1485. </p>

  1486. </dd>

  1487. <dt><code>-EL</code></dt>

  1488. <dd><p>Assemble for a little endian target.

  1489. </p>

  1490. </dd>

  1491. </dl>

  1492. 

  1493. 

  1494. <p>See <a href="Meta-Options.html#Meta-Options">Meta Options</a>, for the options available when as is configured

  1495. for a Meta processor.

  1496. </p>

  1497. 

  1498. 

  1499. <p>See the info pages for documentation of the MMIX-specific options.

  1500. </p>

  1501. 

  1502. <p>See <a href="NDS32-Options.html#NDS32-Options">NDS32 Options</a>, for the options available when as is configured

  1503. for a NDS32 processor.

  1504. </p>

  1505. 

  1506. 

  1507. <p>See <a href="PowerPC_002dOpts.html#PowerPC_002dOpts">PowerPC-Opts</a>, for the options available when as is configured

  1508. for a PowerPC processor.

  1509. </p>

  1510. 

  1511. 

  1512. 

  1513. <p>See <a href="RISC_002dV_002dOptions.html#RISC_002dV_002dOptions">RISC-V-Options</a>, for the options available when as is configured

  1514. for a RISC-V processor.

  1515. </p>

  1516. 

  1517. 

  1518. <p>See the info pages for documentation of the RX-specific options.

  1519. </p>

  1520. <p>The following options are available when as is configured for the s390

  1521. processor family.

  1522. </p>

  1523. <dl compact="compact">

  1524. <dt><code>-m31</code></dt>

  1525. <dt><code>-m64</code></dt>

  1526. <dd><p>Select the word size, either 31/32 bits or 64 bits.

  1527. </p></dd>

  1528. <dt><code>-mesa</code></dt>

  1529. <dt><code>-mzarch</code></dt>

  1530. <dd><p>Select the architecture mode, either the Enterprise System

  1531. Architecture (esa) or the z/Architecture mode (zarch).

  1532. </p></dd>

  1533. <dt><code>-march=<var>processor</var></code></dt>

  1534. <dd><p>Specify which s390 processor variant is the target, &lsquo;<samp>g5</samp>&rsquo; (or

  1535. &lsquo;<samp>arch3</samp>&rsquo;), &lsquo;<samp>g6</samp>&rsquo;, &lsquo;<samp>z900</samp>&rsquo; (or &lsquo;<samp>arch5</samp>&rsquo;), &lsquo;<samp>z990</samp>&rsquo; (or

  1536. &lsquo;<samp>arch6</samp>&rsquo;), &lsquo;<samp>z9-109</samp>&rsquo;, &lsquo;<samp>z9-ec</samp>&rsquo; (or &lsquo;<samp>arch7</samp>&rsquo;), &lsquo;<samp>z10</samp>&rsquo; (or

  1537. &lsquo;<samp>arch8</samp>&rsquo;), &lsquo;<samp>z196</samp>&rsquo; (or &lsquo;<samp>arch9</samp>&rsquo;), &lsquo;<samp>zEC12</samp>&rsquo; (or &lsquo;<samp>arch10</samp>&rsquo;),

  1538. &lsquo;<samp>z13</samp>&rsquo; (or &lsquo;<samp>arch11</samp>&rsquo;), &lsquo;<samp>z14</samp>&rsquo; (or &lsquo;<samp>arch12</samp>&rsquo;), or &lsquo;<samp>z15</samp>&rsquo;

  1539. (or &lsquo;<samp>arch13</samp>&rsquo;).

  1540. </p></dd>

  1541. <dt><code>-mregnames</code></dt>

  1542. <dt><code>-mno-regnames</code></dt>

  1543. <dd><p>Allow or disallow symbolic names for registers.

  1544. </p></dd>

  1545. <dt><code>-mwarn-areg-zero</code></dt>

  1546. <dd><p>Warn whenever the operand for a base or index register has been specified

  1547. but evaluates to zero.

  1548. </p></dd>

  1549. </dl>

  1550. 

  1551. 

  1552. <p>See <a href="TIC6X-Options.html#TIC6X-Options">TIC6X Options</a>, for the options available when as is configured

  1553. for a TMS320C6000 processor.

  1554. </p>

  1555. 

  1556. 

  1557. 

  1558. <p>See <a href="TILE_002dGx-Options.html#TILE_002dGx-Options">TILE-Gx Options</a>, for the options available when as is configured

  1559. for a TILE-Gx processor.

  1560. </p>

  1561. 

  1562. 

  1563. 

  1564. <p>See <a href="Visium-Options.html#Visium-Options">Visium Options</a>, for the options available when as is configured

  1565. for a Visium processor.

  1566. </p>

  1567. 

  1568. 

  1569. 

  1570. <p>See <a href="Xtensa-Options.html#Xtensa-Options">Xtensa Options</a>, for the options available when as is configured

  1571. for an Xtensa processor.

  1572. </p>

  1573. 

  1574. 

  1575. 

  1576. <p>See <a href="Z80-Options.html#Z80-Options">Z80 Options</a>, for the options available when as is configured

  1577. for an Z80 processor.

  1578. </p>

  1579. 

  1580. 

  1581. <table class="menu" border="0" cellspacing="0">

  1582. <tr><td align="left" valign="top">&bull; <a href="Manual.html#Manual" accesskey="1">Manual</a>:</td><td>&nbsp;&nbsp;</td><td align="left" valign="top">Structure of this Manual

  1583. </td></tr>

  1584. <tr><td align="left" valign="top">&bull; <a href="GNU-Assembler.html#GNU-Assembler" accesskey="2">GNU Assembler</a>:</td><td>&nbsp;&nbsp;</td><td align="left" valign="top">The GNU Assembler

  1585. </td></tr>

  1586. <tr><td align="left" valign="top">&bull; <a href="Object-Formats.html#Object-Formats" accesskey="3">Object Formats</a>:</td><td>&nbsp;&nbsp;</td><td align="left" valign="top">Object File Formats

  1587. </td></tr>

  1588. <tr><td align="left" valign="top">&bull; <a href="Command-Line.html#Command-Line" accesskey="4">Command Line</a>:</td><td>&nbsp;&nbsp;</td><td align="left" valign="top">Command Line

  1589. </td></tr>

  1590. <tr><td align="left" valign="top">&bull; <a href="Input-Files.html#Input-Files" accesskey="5">Input Files</a>:</td><td>&nbsp;&nbsp;</td><td align="left" valign="top">Input Files

  1591. </td></tr>

  1592. <tr><td align="left" valign="top">&bull; <a href="Object.html#Object" accesskey="6">Object</a>:</td><td>&nbsp;&nbsp;</td><td align="left" valign="top">Output (Object) File

  1593. </td></tr>

  1594. <tr><td align="left" valign="top">&bull; <a href="Errors.html#Errors" accesskey="7">Errors</a>:</td><td>&nbsp;&nbsp;</td><td align="left" valign="top">Error and Warning Messages

  1595. </td></tr>

  1596. </table>

  1597. 

  1598. <hr>

  1599. <div class="header">

  1600. <p>

  1601. Next: <a href="Invoking.html#Invoking" accesskey="n" rel="next">Invoking</a>, Previous: <a href="index.html#Top" accesskey="p" rel="prev">Top</a>, Up: <a href="index.html#Top" accesskey="u" rel="up">Top</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>

  1602. </div>

  1603. 

  1604. 

  1605. 

  1606. </body>

  1607. </html>