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  15. <title>PDP-11-Options (Using as)</title>
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  56. <a name="PDP_002d11_002dOptions"></a>
  57. <div class="header">
  58. <p>
  59. Next: <a href="PDP_002d11_002dPseudos.html#PDP_002d11_002dPseudos" accesskey="n" rel="next">PDP-11-Pseudos</a>, Up: <a href="PDP_002d11_002dDependent.html#PDP_002d11_002dDependent" accesskey="u" rel="up">PDP-11-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
  60. </div>
  61. <hr>
  62. <a name="Options-17"></a>
  63. <h4 class="subsection">9.34.1 Options</h4>
  64. <a name="index-options-for-PDP_002d11"></a>
  65. <p>The PDP-11 version of <code>as</code> has a rich set of machine
  66. dependent options.
  67. </p>
  68. <a name="Code-Generation-Options"></a>
  69. <h4 class="subsubsection">9.34.1.1 Code Generation Options</h4>
  70. <dl compact="compact">
  71. <dd><a name="index-_002dmpic"></a>
  72. <a name="index-_002dmno_002dpic"></a>
  73. </dd>
  74. <dt><code>-mpic | -mno-pic</code></dt>
  75. <dd><p>Generate position-independent (or position-dependent) code.
  76. </p>
  77. <p>The default is to generate position-independent code.
  78. </p></dd>
  79. </dl>
  80. <a name="Instruction-Set-Extension-Options"></a>
  81. <h4 class="subsubsection">9.34.1.2 Instruction Set Extension Options</h4>
  82. <p>These options enables or disables the use of extensions over the base
  83. line instruction set as introduced by the first PDP-11 CPU: the KA11.
  84. Most options come in two variants: a <code>-m</code><var>extension</var> that
  85. enables <var>extension</var>, and a <code>-mno-</code><var>extension</var> that disables
  86. <var>extension</var>.
  87. </p>
  88. <p>The default is to enable all extensions.
  89. </p>
  90. <dl compact="compact">
  91. <dd><a name="index-_002dmall"></a>
  92. <a name="index-_002dmall_002dextensions"></a>
  93. </dd>
  94. <dt><code>-mall | -mall-extensions</code></dt>
  95. <dd><p>Enable all instruction set extensions.
  96. </p>
  97. <a name="index-_002dmno_002dextensions"></a>
  98. </dd>
  99. <dt><code>-mno-extensions</code></dt>
  100. <dd><p>Disable all instruction set extensions.
  101. </p>
  102. <a name="index-_002dmcis"></a>
  103. <a name="index-_002dmno_002dcis"></a>
  104. </dd>
  105. <dt><code>-mcis | -mno-cis</code></dt>
  106. <dd><p>Enable (or disable) the use of the commercial instruction set, which
  107. consists of these instructions: <code>ADDNI</code>, <code>ADDN</code>, <code>ADDPI</code>,
  108. <code>ADDP</code>, <code>ASHNI</code>, <code>ASHN</code>, <code>ASHPI</code>, <code>ASHP</code>,
  109. <code>CMPCI</code>, <code>CMPC</code>, <code>CMPNI</code>, <code>CMPN</code>, <code>CMPPI</code>,
  110. <code>CMPP</code>, <code>CVTLNI</code>, <code>CVTLN</code>, <code>CVTLPI</code>, <code>CVTLP</code>,
  111. <code>CVTNLI</code>, <code>CVTNL</code>, <code>CVTNPI</code>, <code>CVTNP</code>, <code>CVTPLI</code>,
  112. <code>CVTPL</code>, <code>CVTPNI</code>, <code>CVTPN</code>, <code>DIVPI</code>, <code>DIVP</code>,
  113. <code>L2DR</code>, <code>L3DR</code>, <code>LOCCI</code>, <code>LOCC</code>, <code>MATCI</code>,
  114. <code>MATC</code>, <code>MOVCI</code>, <code>MOVC</code>, <code>MOVRCI</code>, <code>MOVRC</code>,
  115. <code>MOVTCI</code>, <code>MOVTC</code>, <code>MULPI</code>, <code>MULP</code>, <code>SCANCI</code>,
  116. <code>SCANC</code>, <code>SKPCI</code>, <code>SKPC</code>, <code>SPANCI</code>, <code>SPANC</code>,
  117. <code>SUBNI</code>, <code>SUBN</code>, <code>SUBPI</code>, and <code>SUBP</code>.
  118. </p>
  119. <a name="index-_002dmcsm"></a>
  120. <a name="index-_002dmno_002dcsm"></a>
  121. </dd>
  122. <dt><code>-mcsm | -mno-csm</code></dt>
  123. <dd><p>Enable (or disable) the use of the <code>CSM</code> instruction.
  124. </p>
  125. <a name="index-_002dmeis"></a>
  126. <a name="index-_002dmno_002deis"></a>
  127. </dd>
  128. <dt><code>-meis | -mno-eis</code></dt>
  129. <dd><p>Enable (or disable) the use of the extended instruction set, which
  130. consists of these instructions: <code>ASHC</code>, <code>ASH</code>, <code>DIV</code>,
  131. <code>MARK</code>, <code>MUL</code>, <code>RTT</code>, <code>SOB</code> <code>SXT</code>, and
  132. <code>XOR</code>.
  133. </p>
  134. <a name="index-_002dmfis"></a>
  135. <a name="index-_002dmno_002dfis"></a>
  136. <a name="index-_002dmkev11"></a>
  137. <a name="index-_002dmkev11-1"></a>
  138. <a name="index-_002dmno_002dkev11"></a>
  139. </dd>
  140. <dt><code>-mfis | -mkev11</code></dt>
  141. <dt><code>-mno-fis | -mno-kev11</code></dt>
  142. <dd><p>Enable (or disable) the use of the KEV11 floating-point instructions:
  143. <code>FADD</code>, <code>FDIV</code>, <code>FMUL</code>, and <code>FSUB</code>.
  144. </p>
  145. <a name="index-_002dmfpp"></a>
  146. <a name="index-_002dmno_002dfpp"></a>
  147. <a name="index-_002dmfpu"></a>
  148. <a name="index-_002dmno_002dfpu"></a>
  149. <a name="index-_002dmfp_002d11"></a>
  150. <a name="index-_002dmno_002dfp_002d11"></a>
  151. </dd>
  152. <dt><code>-mfpp | -mfpu | -mfp-11</code></dt>
  153. <dt><code>-mno-fpp | -mno-fpu | -mno-fp-11</code></dt>
  154. <dd><p>Enable (or disable) the use of FP-11 floating-point instructions:
  155. <code>ABSF</code>, <code>ADDF</code>, <code>CFCC</code>, <code>CLRF</code>, <code>CMPF</code>,
  156. <code>DIVF</code>, <code>LDCFF</code>, <code>LDCIF</code>, <code>LDEXP</code>, <code>LDF</code>,
  157. <code>LDFPS</code>, <code>MODF</code>, <code>MULF</code>, <code>NEGF</code>, <code>SETD</code>,
  158. <code>SETF</code>, <code>SETI</code>, <code>SETL</code>, <code>STCFF</code>, <code>STCFI</code>,
  159. <code>STEXP</code>, <code>STF</code>, <code>STFPS</code>, <code>STST</code>, <code>SUBF</code>, and
  160. <code>TSTF</code>.
  161. </p>
  162. <a name="index-_002dmlimited_002deis"></a>
  163. <a name="index-_002dmno_002dlimited_002deis"></a>
  164. </dd>
  165. <dt><code>-mlimited-eis | -mno-limited-eis</code></dt>
  166. <dd><p>Enable (or disable) the use of the limited extended instruction set:
  167. <code>MARK</code>, <code>RTT</code>, <code>SOB</code>, <code>SXT</code>, and <code>XOR</code>.
  168. </p>
  169. <p>The -mno-limited-eis options also implies -mno-eis.
  170. </p>
  171. <a name="index-_002dmmfpt"></a>
  172. <a name="index-_002dmno_002dmfpt"></a>
  173. </dd>
  174. <dt><code>-mmfpt | -mno-mfpt</code></dt>
  175. <dd><p>Enable (or disable) the use of the <code>MFPT</code> instruction.
  176. </p>
  177. <a name="index-_002dmmutiproc"></a>
  178. <a name="index-_002dmno_002dmutiproc"></a>
  179. </dd>
  180. <dt><code>-mmultiproc | -mno-multiproc</code></dt>
  181. <dd><p>Enable (or disable) the use of multiprocessor instructions: <code>TSTSET</code> and
  182. <code>WRTLCK</code>.
  183. </p>
  184. <a name="index-_002dmmxps"></a>
  185. <a name="index-_002dmno_002dmxps"></a>
  186. </dd>
  187. <dt><code>-mmxps | -mno-mxps</code></dt>
  188. <dd><p>Enable (or disable) the use of the <code>MFPS</code> and <code>MTPS</code> instructions.
  189. </p>
  190. <a name="index-_002dmspl"></a>
  191. <a name="index-_002dmno_002dspl"></a>
  192. </dd>
  193. <dt><code>-mspl | -mno-spl</code></dt>
  194. <dd><p>Enable (or disable) the use of the <code>SPL</code> instruction.
  195. </p>
  196. <a name="index-_002dmmicrocode"></a>
  197. <a name="index-_002dmno_002dmicrocode"></a>
  198. <p>Enable (or disable) the use of the microcode instructions: <code>LDUB</code>,
  199. <code>MED</code>, and <code>XFC</code>.
  200. </p></dd>
  201. </dl>
  202. <a name="CPU-Model-Options"></a>
  203. <h4 class="subsubsection">9.34.1.3 CPU Model Options</h4>
  204. <p>These options enable the instruction set extensions supported by a
  205. particular CPU, and disables all other extensions.
  206. </p>
  207. <dl compact="compact">
  208. <dd><a name="index-_002dmka11"></a>
  209. </dd>
  210. <dt><code>-mka11</code></dt>
  211. <dd><p>KA11 CPU. Base line instruction set only.
  212. </p>
  213. <a name="index-_002dmkb11"></a>
  214. </dd>
  215. <dt><code>-mkb11</code></dt>
  216. <dd><p>KB11 CPU. Enable extended instruction set and <code>SPL</code>.
  217. </p>
  218. <a name="index-_002dmkd11a"></a>
  219. </dd>
  220. <dt><code>-mkd11a</code></dt>
  221. <dd><p>KD11-A CPU. Enable limited extended instruction set.
  222. </p>
  223. <a name="index-_002dmkd11b"></a>
  224. </dd>
  225. <dt><code>-mkd11b</code></dt>
  226. <dd><p>KD11-B CPU. Base line instruction set only.
  227. </p>
  228. <a name="index-_002dmkd11d"></a>
  229. </dd>
  230. <dt><code>-mkd11d</code></dt>
  231. <dd><p>KD11-D CPU. Base line instruction set only.
  232. </p>
  233. <a name="index-_002dmkd11e"></a>
  234. </dd>
  235. <dt><code>-mkd11e</code></dt>
  236. <dd><p>KD11-E CPU. Enable extended instruction set, <code>MFPS</code>, and <code>MTPS</code>.
  237. </p>
  238. <a name="index-_002dmkd11f"></a>
  239. <a name="index-_002dmkd11h"></a>
  240. <a name="index-_002dmkd11q"></a>
  241. </dd>
  242. <dt><code>-mkd11f | -mkd11h | -mkd11q</code></dt>
  243. <dd><p>KD11-F, KD11-H, or KD11-Q CPU. Enable limited extended instruction set,
  244. <code>MFPS</code>, and <code>MTPS</code>.
  245. </p>
  246. <a name="index-_002dmkd11k"></a>
  247. </dd>
  248. <dt><code>-mkd11k</code></dt>
  249. <dd><p>KD11-K CPU. Enable extended instruction set, <code>LDUB</code>, <code>MED</code>,
  250. <code>MFPS</code>, <code>MFPT</code>, <code>MTPS</code>, and <code>XFC</code>.
  251. </p>
  252. <a name="index-_002dmkd11z"></a>
  253. </dd>
  254. <dt><code>-mkd11z</code></dt>
  255. <dd><p>KD11-Z CPU. Enable extended instruction set, <code>CSM</code>, <code>MFPS</code>,
  256. <code>MFPT</code>, <code>MTPS</code>, and <code>SPL</code>.
  257. </p>
  258. <a name="index-_002dmf11"></a>
  259. </dd>
  260. <dt><code>-mf11</code></dt>
  261. <dd><p>F11 CPU. Enable extended instruction set, <code>MFPS</code>, <code>MFPT</code>, and
  262. <code>MTPS</code>.
  263. </p>
  264. <a name="index-_002dmj11"></a>
  265. </dd>
  266. <dt><code>-mj11</code></dt>
  267. <dd><p>J11 CPU. Enable extended instruction set, <code>CSM</code>, <code>MFPS</code>,
  268. <code>MFPT</code>, <code>MTPS</code>, <code>SPL</code>, <code>TSTSET</code>, and <code>WRTLCK</code>.
  269. </p>
  270. <a name="index-_002dmt11"></a>
  271. </dd>
  272. <dt><code>-mt11</code></dt>
  273. <dd><p>T11 CPU. Enable limited extended instruction set, <code>MFPS</code>, and
  274. <code>MTPS</code>.
  275. </p></dd>
  276. </dl>
  277. <a name="Machine-Model-Options"></a>
  278. <h4 class="subsubsection">9.34.1.4 Machine Model Options</h4>
  279. <p>These options enable the instruction set extensions supported by a
  280. particular machine model, and disables all other extensions.
  281. </p>
  282. <dl compact="compact">
  283. <dd><a name="index-_002dm11_002f03"></a>
  284. </dd>
  285. <dt><code>-m11/03</code></dt>
  286. <dd><p>Same as <code>-mkd11f</code>.
  287. </p>
  288. <a name="index-_002dm11_002f04"></a>
  289. </dd>
  290. <dt><code>-m11/04</code></dt>
  291. <dd><p>Same as <code>-mkd11d</code>.
  292. </p>
  293. <a name="index-_002dm11_002f05"></a>
  294. <a name="index-_002dm11_002f10"></a>
  295. </dd>
  296. <dt><code>-m11/05 | -m11/10</code></dt>
  297. <dd><p>Same as <code>-mkd11b</code>.
  298. </p>
  299. <a name="index-_002dm11_002f15"></a>
  300. <a name="index-_002dm11_002f20"></a>
  301. </dd>
  302. <dt><code>-m11/15 | -m11/20</code></dt>
  303. <dd><p>Same as <code>-mka11</code>.
  304. </p>
  305. <a name="index-_002dm11_002f21"></a>
  306. </dd>
  307. <dt><code>-m11/21</code></dt>
  308. <dd><p>Same as <code>-mt11</code>.
  309. </p>
  310. <a name="index-_002dm11_002f23"></a>
  311. <a name="index-_002dm11_002f24"></a>
  312. </dd>
  313. <dt><code>-m11/23 | -m11/24</code></dt>
  314. <dd><p>Same as <code>-mf11</code>.
  315. </p>
  316. <a name="index-_002dm11_002f34"></a>
  317. </dd>
  318. <dt><code>-m11/34</code></dt>
  319. <dd><p>Same as <code>-mkd11e</code>.
  320. </p>
  321. <a name="index-_002dm11_002f34a"></a>
  322. </dd>
  323. <dt><code>-m11/34a</code></dt>
  324. <dd><p>Ame as <code>-mkd11e</code> <code>-mfpp</code>.
  325. </p>
  326. <a name="index-_002dm11_002f35"></a>
  327. <a name="index-_002dm11_002f40"></a>
  328. </dd>
  329. <dt><code>-m11/35 | -m11/40</code></dt>
  330. <dd><p>Same as <code>-mkd11a</code>.
  331. </p>
  332. <a name="index-_002dm11_002f44"></a>
  333. </dd>
  334. <dt><code>-m11/44</code></dt>
  335. <dd><p>Same as <code>-mkd11z</code>.
  336. </p>
  337. <a name="index-_002dm11_002f45"></a>
  338. <a name="index-_002dm11_002f50"></a>
  339. <a name="index-_002dm11_002f55"></a>
  340. <a name="index-_002dm11_002f70"></a>
  341. </dd>
  342. <dt><code>-m11/45 | -m11/50 | -m11/55 | -m11/70</code></dt>
  343. <dd><p>Same as <code>-mkb11</code>.
  344. </p>
  345. <a name="index-_002dm11_002f53"></a>
  346. <a name="index-_002dm11_002f73"></a>
  347. <a name="index-_002dm11_002f83"></a>
  348. <a name="index-_002dm11_002f84"></a>
  349. <a name="index-_002dm11_002f93"></a>
  350. <a name="index-_002dm11_002f94"></a>
  351. </dd>
  352. <dt><code>-m11/53 | -m11/73 | -m11/83 | -m11/84 | -m11/93 | -m11/94</code></dt>
  353. <dd><p>Same as <code>-mj11</code>.
  354. </p>
  355. <a name="index-_002dm11_002f60"></a>
  356. </dd>
  357. <dt><code>-m11/60</code></dt>
  358. <dd><p>Same as <code>-mkd11k</code>.
  359. </p></dd>
  360. </dl>
  361. <hr>
  362. <div class="header">
  363. <p>
  364. Next: <a href="PDP_002d11_002dPseudos.html#PDP_002d11_002dPseudos" accesskey="n" rel="next">PDP-11-Pseudos</a>, Up: <a href="PDP_002d11_002dDependent.html#PDP_002d11_002dDependent" accesskey="u" rel="up">PDP-11-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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