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<a name="RISC_002dV_002dModifiers"></a>
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Next: <a href="RISC_002dV_002dFormats.html#RISC_002dV_002dFormats" accesskey="n" rel="next">RISC-V-Formats</a>, Previous: <a href="RISC_002dV_002dDirectives.html#RISC_002dV_002dDirectives" accesskey="p" rel="prev">RISC-V-Directives</a>, Up: <a href="RISC_002dV_002dDependent.html#RISC_002dV_002dDependent" accesskey="u" rel="up">RISC-V-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
</div>
<hr>
<a name="RISC_002dV-Assembler-Modifiers"></a>
<h4 class="subsection">9.38.3 RISC-V Assembler Modifiers</h4>

<p>The RISC-V assembler supports following modifiers for relocatable addresses
used in RISC-V instruction operands.  However, we also support some pseudo
instructions that are easier to use than these modifiers.
</p>
<dl compact="compact">
<dt><code>%lo(<var>symbol</var>)</code></dt>
<dd><p>The low 12 bits of absolute address for <var>symbol</var>.
</p>
</dd>
<dt><code>%hi(<var>symbol</var>)</code></dt>
<dd><p>The high 20 bits of absolute address for <var>symbol</var>.  This is usually
used with the %lo modifier to represent a 32-bit absolute address.
</p>
<div class="smallexample">
<pre class="smallexample">	lui        a0, %hi(<var>symbol</var>)     // R_RISCV_HI20
	addi       a0, a0, %lo(<var>symbol</var>) // R_RISCV_LO12_I

	lui        a0, %hi(<var>symbol</var>)     // R_RISCV_HI20
	load/store a0, %lo(<var>symbol</var>)(a0) // R_RISCV_LO12_I/S
</pre></div>

</dd>
<dt><code>%pcrel_lo(<var>label</var>)</code></dt>
<dd><p>The low 12 bits of relative address between pc and <var>symbol</var>.
The <var>symbol</var> is related to the high part instruction which is marked
by <var>label</var>.
</p>
</dd>
<dt><code>%pcrel_hi(<var>symbol</var>)</code></dt>
<dd><p>The high 20 bits of relative address between pc and <var>symbol</var>.
This is usually used with the %pcrel_lo modifier to represent a +/-2GB
pc-relative range.
</p>
<div class="smallexample">
<pre class="smallexample"><var>label</var>:
	auipc      a0, %pcrel_hi(<var>symbol</var>)    // R_RISCV_PCREL_HI20
	addi       a0, a0, %pcrel_lo(<var>label</var>) // R_RISCV_PCREL_LO12_I

<var>label</var>:
	auipc      a0, %pcrel_hi(<var>symbol</var>)    // R_RISCV_PCREL_HI20
	load/store a0, %pcrel_lo(<var>label</var>)(a0) // R_RISCV_PCREL_LO12_I/S
</pre></div>

<p>Or you can use the pseudo lla/lw/sw/... instruction to do this.
</p>
<div class="smallexample">
<pre class="smallexample">	lla  a0, <var>symbol</var>
</pre></div>

</dd>
<dt><code>%got_pcrel_hi(<var>symbol</var>)</code></dt>
<dd><p>The high 20 bits of relative address between pc and the GOT entry of
<var>symbol</var>.  This is usually used with the %pcrel_lo modifier to access
the GOT entry.
</p>
<div class="smallexample">
<pre class="smallexample"><var>label</var>:
	auipc      a0, %got_pcrel_hi(<var>symbol</var>) // R_RISCV_GOT_HI20
	addi       a0, a0, %pcrel_lo(<var>label</var>)  // R_RISCV_PCREL_LO12_I

<var>label</var>:
	auipc      a0, %got_pcrel_hi(<var>symbol</var>) // R_RISCV_GOT_HI20
	load/store a0, %pcrel_lo(<var>label</var>)(a0)  // R_RISCV_PCREL_LO12_I/S
</pre></div>

<p>Also, the pseudo la instruction with PIC has similar behavior.
</p>
</dd>
<dt><code>%tprel_add(<var>symbol</var>)</code></dt>
<dd><p>This is used purely to associate the R_RISCV_TPREL_ADD relocation for
TLS relaxation.  This one is only valid as the fourth operand to the normally
3 operand add instruction.
</p>
</dd>
<dt><code>%tprel_lo(<var>symbol</var>)</code></dt>
<dd><p>The low 12 bits of relative address between tp and <var>symbol</var>.
</p>
</dd>
<dt><code>%tprel_hi(<var>symbol</var>)</code></dt>
<dd><p>The high 20 bits of relative address between tp and <var>symbol</var>.  This is
usually used with the %tprel_lo and %tprel_add modifiers to access the thread
local variable <var>symbol</var> in TLS Local Exec.
</p>
<div class="smallexample">
<pre class="smallexample">	lui        a5, %tprel_hi(<var>symbol</var>)          // R_RISCV_TPREL_HI20
	add        a5, a5, tp, %tprel_add(<var>symbol</var>) // R_RISCV_TPREL_ADD
	load/store t0, %tprel_lo(<var>symbol</var>)(a5)      // R_RISCV_TPREL_LO12_I/S
</pre></div>

</dd>
<dt><code>%tls_ie_pcrel_hi(<var>symbol</var>)</code></dt>
<dd><p>The high 20 bits of relative address between pc and GOT entry.  It is
usually used with the %pcrel_lo modifier to access the thread local
variable <var>symbol</var> in TLS Initial Exec.
</p>
<div class="smallexample">
<pre class="smallexample">	la.tls.ie  a5, <var>symbol</var>
	add        a5, a5, tp
	load/store t0, 0(a5)
</pre></div>

<p>The pseudo la.tls.ie instruction can be expended to
</p>
<div class="smallexample">
<pre class="smallexample"><var>label</var>:
	auipc a5, %tls_ie_pcrel_hi(<var>symbol</var>) // R_RISCV_TLS_GOT_HI20
	load  a5, %pcrel_lo(<var>label</var>)(a5)     // R_RISCV_PCREL_LO12_I
</pre></div>

</dd>
<dt><code>%tls_gd_pcrel_hi(<var>symbol</var>)</code></dt>
<dd><p>The high 20 bits of relative address between pc and GOT entry.  It is
usually used with the %pcrel_lo modifier to access the thread local variable
<var>symbol</var> in TLS Global Dynamic.
</p>
<div class="smallexample">
<pre class="smallexample">	la.tls.gd  a0, <var>symbol</var>
	call       __tls_get_addr@plt
	mv         a5, a0
	load/store t0, 0(a5)
</pre></div>

<p>The pseudo la.tls.gd instruction can be expended to
</p>
<div class="smallexample">
<pre class="smallexample"><var>label</var>:
	auipc a0, %tls_gd_pcrel_hi(<var>symbol</var>) // R_RISCV_TLS_GD_HI20
	addi  a0, a0, %pcrel_lo(<var>label</var>)     // R_RISCV_PCREL_LO12_I
</pre></div>

</dd>
</dl>

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