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toolchain-gcc-arm-embedded/share/doc/gcc-arm-none-eabi/html/as.html/SH-Floating-Point.html

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  3. <!-- This file documents the GNU Assembler "as".

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  9. or any later version published by the Free Software Foundation;

  10. with no Invariant Sections, with no Front-Cover Texts, and with no

  11. Back-Cover Texts.  A copy of the license is included in the

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  15. <head>

  16. <meta http-equiv="Content-Type" content="text/html; charset=utf-8">

  17. <title>SH Floating Point (Using as)</title>

  18. 

  19. <meta name="description" content="SH Floating Point (Using as)">

  20. <meta name="keywords" content="SH Floating Point (Using as)">

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  25. <link href="AS-Index.html#AS-Index" rel="index" title="AS Index">

  26. <link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">

  27. <link href="SH_002dDependent.html#SH_002dDependent" rel="up" title="SH-Dependent">

  28. <link href="SH-Directives.html#SH-Directives" rel="next" title="SH Directives">

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  62. <a name="SH-Floating-Point"></a>

  63. <div class="header">

  64. <p>

  65. Next: <a href="SH-Directives.html#SH-Directives" accesskey="n" rel="next">SH Directives</a>, Previous: <a href="SH-Syntax.html#SH-Syntax" accesskey="p" rel="prev">SH Syntax</a>, Up: <a href="SH_002dDependent.html#SH_002dDependent" accesskey="u" rel="up">SH-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>

  66. </div>

  67. <hr>

  68. <a name="Floating-Point-14"></a>

  69. <h4 class="subsection">9.43.3 Floating Point</h4>

  70. 

  71. <a name="index-floating-point_002c-SH-_0028IEEE_0029"></a>

  72. <a name="index-SH-floating-point-_0028IEEE_0029"></a>

  73. <p>SH2E, SH3E and SH4 groups have on-chip floating-point unit (FPU). Other

  74. SH groups can use <code>.float</code> directive to generate <small>IEEE</small>

  75. floating-point numbers.

  76. </p>

  77. <p>SH2E and SH3E support single-precision floating point calculations as

  78. well as entirely PCAPI compatible emulation of double-precision

  79. floating point calculations. SH2E and SH3E instructions are a subset of

  80. the floating point calculations conforming to the IEEE754 standard.

  81. </p>

  82. <p>In addition to single-precision and double-precision floating-point

  83. operation capability, the on-chip FPU of SH4 has a 128-bit graphic

  84. engine that enables 32-bit floating-point data to be processed 128

  85. bits at a time. It also supports 4 * 4 array operations and inner

  86. product operations. Also, a superscalar architecture is employed that

  87. enables simultaneous execution of two instructions (including FPU

  88. instructions), providing performance of up to twice that of

  89. conventional architectures at the same frequency.

  90. </p>

  91. 

  92. 

  93. 

  94. </body>

  95. </html>