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- Next: <a href="i386_002dLWP.html#i386_002dLWP" accesskey="n" rel="next">i386-LWP</a>, Previous: <a href="i386_002dFloat.html#i386_002dFloat" accesskey="p" rel="prev">i386-Float</a>, Up: <a href="i386_002dDependent.html#i386_002dDependent" accesskey="u" rel="up">i386-Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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- <a name="Intel_0027s-MMX-and-AMD_0027s-3DNow_0021-SIMD-Operations"></a>
- <h4 class="subsection">9.16.10 Intel’s MMX and AMD’s 3DNow! SIMD Operations</h4>
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- <a name="index-MMX_002c-i386"></a>
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- <a name="index-SIMD_002c-x86_002d64"></a>
-
- <p><code>as</code> supports Intel’s MMX instruction set (SIMD
- instructions for integer data), available on Intel’s Pentium MMX
- processors and Pentium II processors, AMD’s K6 and K6-2 processors,
- Cyrix’ M2 processor, and probably others. It also supports AMD’s 3DNow!
- instruction set (SIMD instructions for 32-bit floating point data)
- available on AMD’s K6-2 processor and possibly others in the future.
- </p>
- <p>Currently, <code>as</code> does not support Intel’s floating point
- SIMD, Katmai (KNI).
- </p>
- <p>The eight 64-bit MMX operands, also used by 3DNow!, are called ‘<samp>%mm0</samp>’,
- ‘<samp>%mm1</samp>’, ... ‘<samp>%mm7</samp>’. They contain eight 8-bit integers, four
- 16-bit integers, two 32-bit integers, one 64-bit integer, or two 32-bit
- floating point values. The MMX registers cannot be used at the same time
- as the floating point stack.
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- <p>See Intel and AMD documentation, keeping in mind that the operand order in
- instructions is reversed from the Intel syntax.
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