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  1. <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">

  2. <html>

  3. <!-- This file documents the GNU Assembler "as".

  4. 

  5. Copyright (C) 1991-2020 Free Software Foundation, Inc.

  6. 

  7. Permission is granted to copy, distribute and/or modify this document

  8. under the terms of the GNU Free Documentation License, Version 1.3

  9. or any later version published by the Free Software Foundation;

  10. with no Invariant Sections, with no Front-Cover Texts, and with no

  11. Back-Cover Texts.  A copy of the license is included in the

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  15. <head>

  16. <meta http-equiv="Content-Type" content="text/html; charset=utf-8">

  17. <title>i386-Variations (Using as)</title>

  18. 

  19. <meta name="description" content="i386-Variations (Using as)">

  20. <meta name="keywords" content="i386-Variations (Using as)">

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  24. <link href="index.html#Top" rel="start" title="Top">

  25. <link href="AS-Index.html#AS-Index" rel="index" title="AS Index">

  26. <link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">

  27. <link href="i386_002dSyntax.html#i386_002dSyntax" rel="up" title="i386-Syntax">

  28. <link href="i386_002dChars.html#i386_002dChars" rel="next" title="i386-Chars">

  29. <link href="i386_002dSyntax.html#i386_002dSyntax" rel="prev" title="i386-Syntax">

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  57. 

  58. 

  59. </head>

  60. 

  61. <body lang="en">

  62. <a name="i386_002dVariations"></a>

  63. <div class="header">

  64. <p>

  65. Next: <a href="i386_002dChars.html#i386_002dChars" accesskey="n" rel="next">i386-Chars</a>, Up: <a href="i386_002dSyntax.html#i386_002dSyntax" accesskey="u" rel="up">i386-Syntax</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>

  66. </div>

  67. <hr>

  68. <a name="AT_0026T-Syntax-versus-Intel-Syntax"></a>

  69. <h4 class="subsubsection">9.16.3.1 AT&amp;T Syntax versus Intel Syntax</h4>

  70. 

  71. <a name="index-i386-intel_005fsyntax-pseudo-op"></a>

  72. <a name="index-intel_005fsyntax-pseudo-op_002c-i386"></a>

  73. <a name="index-i386-att_005fsyntax-pseudo-op"></a>

  74. <a name="index-att_005fsyntax-pseudo-op_002c-i386"></a>

  75. <a name="index-i386-syntax-compatibility"></a>

  76. <a name="index-syntax-compatibility_002c-i386"></a>

  77. <a name="index-x86_002d64-intel_005fsyntax-pseudo-op"></a>

  78. <a name="index-intel_005fsyntax-pseudo-op_002c-x86_002d64"></a>

  79. <a name="index-x86_002d64-att_005fsyntax-pseudo-op"></a>

  80. <a name="index-att_005fsyntax-pseudo-op_002c-x86_002d64"></a>

  81. <a name="index-x86_002d64-syntax-compatibility"></a>

  82. <a name="index-syntax-compatibility_002c-x86_002d64"></a>

  83. 

  84. <p><code>as</code> now supports assembly using Intel assembler syntax.

  85. <code>.intel_syntax</code> selects Intel mode, and <code>.att_syntax</code> switches

  86. back to the usual AT&amp;T mode for compatibility with the output of

  87. <code>gcc</code>.  Either of these directives may have an optional

  88. argument, <code>prefix</code>, or <code>noprefix</code> specifying whether registers

  89. require a &lsquo;<samp>%</samp>&rsquo; prefix.  AT&amp;T System V/386 assembler syntax is quite

  90. different from Intel syntax.  We mention these differences because

  91. almost all 80386 documents use Intel syntax.  Notable differences

  92. between the two syntaxes are:

  93. </p>

  94. <a name="index-immediate-operands_002c-i386"></a>

  95. <a name="index-i386-immediate-operands"></a>

  96. <a name="index-register-operands_002c-i386"></a>

  97. <a name="index-i386-register-operands"></a>

  98. <a name="index-jump_002fcall-operands_002c-i386"></a>

  99. <a name="index-i386-jump_002fcall-operands"></a>

  100. <a name="index-operand-delimiters_002c-i386"></a>

  101. 

  102. <a name="index-immediate-operands_002c-x86_002d64"></a>

  103. <a name="index-x86_002d64-immediate-operands"></a>

  104. <a name="index-register-operands_002c-x86_002d64"></a>

  105. <a name="index-x86_002d64-register-operands"></a>

  106. <a name="index-jump_002fcall-operands_002c-x86_002d64"></a>

  107. <a name="index-x86_002d64-jump_002fcall-operands"></a>

  108. <a name="index-operand-delimiters_002c-x86_002d64"></a>

  109. <ul>

  110. <li> AT&amp;T immediate operands are preceded by &lsquo;<samp>$</samp>&rsquo;; Intel immediate

  111. operands are undelimited (Intel &lsquo;<samp>push 4</samp>&rsquo; is AT&amp;T &lsquo;<samp>pushl $4</samp>&rsquo;).

  112. AT&amp;T register operands are preceded by &lsquo;<samp>%</samp>&rsquo;; Intel register operands

  113. are undelimited.  AT&amp;T absolute (as opposed to PC relative) jump/call

  114. operands are prefixed by &lsquo;<samp>*</samp>&rsquo;; they are undelimited in Intel syntax.

  115. 

  116. </li><li> <a name="index-i386-source_002c-destination-operands"></a>

  117. <a name="index-source_002c-destination-operands_003b-i386"></a>

  118. <a name="index-x86_002d64-source_002c-destination-operands"></a>

  119. <a name="index-source_002c-destination-operands_003b-x86_002d64"></a>

  120. AT&amp;T and Intel syntax use the opposite order for source and destination

  121. operands.  Intel &lsquo;<samp>add eax, 4</samp>&rsquo; is &lsquo;<samp>addl $4, %eax</samp>&rsquo;.  The

  122. &lsquo;<samp>source, dest</samp>&rsquo; convention is maintained for compatibility with

  123. previous Unix assemblers.  Note that &lsquo;<samp>bound</samp>&rsquo;, &lsquo;<samp>invlpga</samp>&rsquo;, and

  124. instructions with 2 immediate operands, such as the &lsquo;<samp>enter</samp>&rsquo;

  125. instruction, do <em>not</em> have reversed order.  <a href="i386_002dBugs.html#i386_002dBugs">i386-Bugs</a>.

  126. 

  127. </li><li> <a name="index-mnemonic-suffixes_002c-i386"></a>

  128. <a name="index-sizes-operands_002c-i386"></a>

  129. <a name="index-i386-size-suffixes"></a>

  130. <a name="index-mnemonic-suffixes_002c-x86_002d64"></a>

  131. <a name="index-sizes-operands_002c-x86_002d64"></a>

  132. <a name="index-x86_002d64-size-suffixes"></a>

  133. In AT&amp;T syntax the size of memory operands is determined from the last

  134. character of the instruction mnemonic.  Mnemonic suffixes of &lsquo;<samp>b</samp>&rsquo;,

  135. &lsquo;<samp>w</samp>&rsquo;, &lsquo;<samp>l</samp>&rsquo; and &lsquo;<samp>q</samp>&rsquo; specify byte (8-bit), word (16-bit), long

  136. (32-bit) and quadruple word (64-bit) memory references.  Mnemonic suffixes

  137. of &lsquo;<samp>x</samp>&rsquo;, &lsquo;<samp>y</samp>&rsquo; and &lsquo;<samp>z</samp>&rsquo; specify xmm (128-bit vector), ymm

  138. (256-bit vector) and zmm (512-bit vector) memory references, only when there&rsquo;s

  139. no other way to disambiguate an instruction.  Intel syntax accomplishes this by

  140. prefixing memory operands (<em>not</em> the instruction mnemonics) with

  141. &lsquo;<samp>byte ptr</samp>&rsquo;, &lsquo;<samp>word ptr</samp>&rsquo;, &lsquo;<samp>dword ptr</samp>&rsquo;, &lsquo;<samp>qword ptr</samp>&rsquo;,

  142. &lsquo;<samp>xmmword ptr</samp>&rsquo;, &lsquo;<samp>ymmword ptr</samp>&rsquo; and &lsquo;<samp>zmmword ptr</samp>&rsquo;.  Thus, Intel

  143. syntax &lsquo;<samp>mov al, byte ptr <var>foo</var></samp>&rsquo; is &lsquo;<samp>movb <var>foo</var>, %al</samp>&rsquo; in AT&amp;T

  144. syntax.  In Intel syntax, &lsquo;<samp>fword ptr</samp>&rsquo;, &lsquo;<samp>tbyte ptr</samp>&rsquo; and

  145. &lsquo;<samp>oword ptr</samp>&rsquo; specify 48-bit, 80-bit and 128-bit memory references.

  146. 

  147. <p>In 64-bit code, &lsquo;<samp>movabs</samp>&rsquo; can be used to encode the &lsquo;<samp>mov</samp>&rsquo;

  148. instruction with the 64-bit displacement or immediate operand.

  149. </p>

  150. </li><li> <a name="index-return-instructions_002c-i386"></a>

  151. <a name="index-i386-jump_002c-call_002c-return"></a>

  152. <a name="index-return-instructions_002c-x86_002d64"></a>

  153. <a name="index-x86_002d64-jump_002c-call_002c-return"></a>

  154. Immediate form long jumps and calls are

  155. &lsquo;<samp>lcall/ljmp $<var>section</var>, $<var>offset</var></samp>&rsquo; in AT&amp;T syntax; the

  156. Intel syntax is

  157. &lsquo;<samp>call/jmp far <var>section</var>:<var>offset</var></samp>&rsquo;.  Also, the far return

  158. instruction

  159. is &lsquo;<samp>lret $<var>stack-adjust</var></samp>&rsquo; in AT&amp;T syntax; Intel syntax is

  160. &lsquo;<samp>ret far <var>stack-adjust</var></samp>&rsquo;.

  161. 

  162. </li><li> <a name="index-sections_002c-i386"></a>

  163. <a name="index-i386-sections"></a>

  164. <a name="index-sections_002c-x86_002d64"></a>

  165. <a name="index-x86_002d64-sections"></a>

  166. The AT&amp;T assembler does not provide support for multiple section

  167. programs.  Unix style systems expect all programs to be single sections.

  168. </li></ul>

  169. 

  170. <hr>

  171. <div class="header">

  172. <p>

  173. Next: <a href="i386_002dChars.html#i386_002dChars" accesskey="n" rel="next">i386-Chars</a>, Up: <a href="i386_002dSyntax.html#i386_002dSyntax" accesskey="u" rel="up">i386-Syntax</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>

  174. </div>

  175. 

  176. 

  177. 

  178. </body>

  179. </html>