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  68. <h4 class="subsubsection">6.60.13.5 Other Built-in Functions</h4>
  69. <p>This section describes built-in functions that are not named after
  70. a specific FR-V instruction.
  71. </p>
  72. <dl compact="compact">
  73. <dt><code>sw2 __IACCreadll (iacc <var>reg</var>)</code></dt>
  74. <dd><p>Return the full 64-bit value of IACC0. The <var>reg</var> argument is reserved
  75. for future expansion and must be 0.
  76. </p>
  77. </dd>
  78. <dt><code>sw1 __IACCreadl (iacc <var>reg</var>)</code></dt>
  79. <dd><p>Return the value of IACC0H if <var>reg</var> is 0 and IACC0L if <var>reg</var> is 1.
  80. Other values of <var>reg</var> are rejected as invalid.
  81. </p>
  82. </dd>
  83. <dt><code>void __IACCsetll (iacc <var>reg</var>, sw2 <var>x</var>)</code></dt>
  84. <dd><p>Set the full 64-bit value of IACC0 to <var>x</var>. The <var>reg</var> argument
  85. is reserved for future expansion and must be 0.
  86. </p>
  87. </dd>
  88. <dt><code>void __IACCsetl (iacc <var>reg</var>, sw1 <var>x</var>)</code></dt>
  89. <dd><p>Set IACC0H to <var>x</var> if <var>reg</var> is 0 and IACC0L to <var>x</var> if <var>reg</var>
  90. is 1. Other values of <var>reg</var> are rejected as invalid.
  91. </p>
  92. </dd>
  93. <dt><code>void __data_prefetch0 (const void *<var>x</var>)</code></dt>
  94. <dd><p>Use the <code>dcpl</code> instruction to load the contents of address <var>x</var>
  95. into the data cache.
  96. </p>
  97. </dd>
  98. <dt><code>void __data_prefetch (const void *<var>x</var>)</code></dt>
  99. <dd><p>Use the <code>nldub</code> instruction to load the contents of address <var>x</var>
  100. into the data cache. The instruction is issued in slot I1.
  101. </p></dd>
  102. </dl>
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