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  61. <a name="Delay-Slots"></a>
  62. <div class="header">
  63. <p>
  64. Next: <a href="Processor-pipeline-description.html#Processor-pipeline-description" accesskey="n" rel="next">Processor pipeline description</a>, Previous: <a href="Mnemonic-Attribute.html#Mnemonic-Attribute" accesskey="p" rel="prev">Mnemonic Attribute</a>, Up: <a href="Insn-Attributes.html#Insn-Attributes" accesskey="u" rel="up">Insn Attributes</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
  65. </div>
  66. <hr>
  67. <a name="Delay-Slot-Scheduling"></a>
  68. <h4 class="subsection">17.19.8 Delay Slot Scheduling</h4>
  69. <a name="index-delay-slots_002c-defining"></a>
  70. <p>The insn attribute mechanism can be used to specify the requirements for
  71. delay slots, if any, on a target machine. An instruction is said to
  72. require a <em>delay slot</em> if some instructions that are physically
  73. after the instruction are executed as if they were located before it.
  74. Classic examples are branch and call instructions, which often execute
  75. the following instruction before the branch or call is performed.
  76. </p>
  77. <p>On some machines, conditional branch instructions can optionally
  78. <em>annul</em> instructions in the delay slot. This means that the
  79. instruction will not be executed for certain branch outcomes. Both
  80. instructions that annul if the branch is true and instructions that
  81. annul if the branch is false are supported.
  82. </p>
  83. <p>Delay slot scheduling differs from instruction scheduling in that
  84. determining whether an instruction needs a delay slot is dependent only
  85. on the type of instruction being generated, not on data flow between the
  86. instructions. See the next section for a discussion of data-dependent
  87. instruction scheduling.
  88. </p>
  89. <a name="index-define_005fdelay"></a>
  90. <p>The requirement of an insn needing one or more delay slots is indicated
  91. via the <code>define_delay</code> expression. It has the following form:
  92. </p>
  93. <div class="smallexample">
  94. <pre class="smallexample">(define_delay <var>test</var>
  95. [<var>delay-1</var> <var>annul-true-1</var> <var>annul-false-1</var>
  96. <var>delay-2</var> <var>annul-true-2</var> <var>annul-false-2</var>
  97. &hellip;])
  98. </pre></div>
  99. <p><var>test</var> is an attribute test that indicates whether this
  100. <code>define_delay</code> applies to a particular insn. If so, the number of
  101. required delay slots is determined by the length of the vector specified
  102. as the second argument. An insn placed in delay slot <var>n</var> must
  103. satisfy attribute test <var>delay-n</var>. <var>annul-true-n</var> is an
  104. attribute test that specifies which insns may be annulled if the branch
  105. is true. Similarly, <var>annul-false-n</var> specifies which insns in the
  106. delay slot may be annulled if the branch is false. If annulling is not
  107. supported for that delay slot, <code>(nil)</code> should be coded.
  108. </p>
  109. <p>For example, in the common case where branch and call insns require
  110. a single delay slot, which may contain any insn other than a branch or
  111. call, the following would be placed in the <samp>md</samp> file:
  112. </p>
  113. <div class="smallexample">
  114. <pre class="smallexample">(define_delay (eq_attr &quot;type&quot; &quot;branch,call&quot;)
  115. [(eq_attr &quot;type&quot; &quot;!branch,call&quot;) (nil) (nil)])
  116. </pre></div>
  117. <p>Multiple <code>define_delay</code> expressions may be specified. In this
  118. case, each such expression specifies different delay slot requirements
  119. and there must be no insn for which tests in two <code>define_delay</code>
  120. expressions are both true.
  121. </p>
  122. <p>For example, if we have a machine that requires one delay slot for branches
  123. but two for calls, no delay slot can contain a branch or call insn,
  124. and any valid insn in the delay slot for the branch can be annulled if the
  125. branch is true, we might represent this as follows:
  126. </p>
  127. <div class="smallexample">
  128. <pre class="smallexample">(define_delay (eq_attr &quot;type&quot; &quot;branch&quot;)
  129. [(eq_attr &quot;type&quot; &quot;!branch,call&quot;)
  130. (eq_attr &quot;type&quot; &quot;!branch,call&quot;)
  131. (nil)])
  132. (define_delay (eq_attr &quot;type&quot; &quot;call&quot;)
  133. [(eq_attr &quot;type&quot; &quot;!branch,call&quot;) (nil) (nil)
  134. (eq_attr &quot;type&quot; &quot;!branch,call&quot;) (nil) (nil)])
  135. </pre></div>
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