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- <a name="ARC-Features"></a>
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- <p>
- Next: <a href="ARM-Features.html#ARM-Features" accesskey="n" rel="next">ARM Features</a>, Previous: <a href="AArch64-Features.html#AArch64-Features" accesskey="p" rel="prev">AArch64 Features</a>, Up: <a href="Standard-Target-Features.html#Standard-Target-Features" accesskey="u" rel="up">Standard Target Features</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Concept-Index.html#Concept-Index" title="Index" rel="index">Index</a>]</p>
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- <hr>
- <a name="ARC-Features-1"></a>
- <h4 class="subsection">G.5.2 ARC Features</h4>
- <a name="index-target-descriptions_002c-ARC-Features"></a>
-
- <p>ARC processors are so configurable that even core registers and their numbers
- are not predetermined completely. Moreover, <em>flags</em> and <em>PC</em>
- registers, which are important to <small>GDB</small>, are not “core” registers in
- ARC. Therefore, there are two features that their presence is mandatory:
- ‘<samp>org.gnu.gdb.arc.core</samp>’ and ‘<samp>org.gnu.gdb.arc.aux</samp>’.
- </p>
- <p>The ‘<samp>org.gnu.gdb.arc.core</samp>’ feature is required for all targets. It must
- contain registers:
- </p>
- <ul class="no-bullet">
- <li>- ‘<samp>r0</samp>’ through ‘<samp>r25</samp>’ for normal register file targets.
- </li><li>- ‘<samp>r0</samp>’ through ‘<samp>r3</samp>’, and ‘<samp>r10</samp>’ through ‘<samp>r15</samp>’ for reduced
- register file targets.
- </li><li>- ‘<samp>gp</samp>’, ‘<samp>fp</samp>’, ‘<samp>sp</samp>’, ‘<samp>r30</samp>’<a name="DOCF21" href="#FOOT21"><sup>21</sup></a>,
- ‘<samp>blink</samp>’, ‘<samp>lp_count</samp>’, ‘<samp>pcl</samp>’.
- </li></ul>
-
- <p>In case of an ARCompact target (ARCv1 ISA), the ‘<samp>org.gnu.gdb.arc.core</samp>’
- feature may contain registers ‘<samp>ilink1</samp>’ and ‘<samp>ilink2</samp>’. While in case
- of ARC EM and ARC HS targets (ARCv2 ISA), register ‘<samp>ilink</samp>’ may be present.
- The difference between ARCv1 and ARCv2 is the naming of registers <em>29th</em>
- and <em>30th</em>. They are called ‘<samp>ilink1</samp>’ and ‘<samp>ilink2</samp>’ for ARCv1 and
- are optional. For ARCv2, they are called ‘<samp>ilink</samp>’ and ‘<samp>r30</samp>’ and only
- ‘<samp>ilink</samp>’ is optional. The optionality of ‘<samp>ilink*</samp>’ registers is
- because of their inaccessibility during user space debugging sessions.
- </p>
- <p>Extension core registers ‘<samp>r32</samp>’ through ‘<samp>r59</samp>’ are optional and their
- existence depends on the configuration. When debugging GNU/Linux applications,
- i.e. user space debugging, these core registers are not available.
- </p>
- <p>The ‘<samp>org.gnu.gdb.arc.aux</samp>’ feature is required for all ARC targets. Here
- is the list of registers pertinent to this feature:
- </p>
- <ul class="no-bullet">
- <li>- mandatory: ‘<samp>pc</samp>’ and ‘<samp>status32</samp>’.
- </li><li>- optional: ‘<samp>lp_start</samp>’, ‘<samp>lp_end</samp>’, and ‘<samp>bta</samp>’.
- </li></ul>
-
- <div class="footnote">
- <hr>
- <h4 class="footnotes-heading">Footnotes</h4>
-
- <h3><a name="FOOT21" href="#DOCF21">(21)</a></h3>
- <p>Not necessary for ARCv1.</p>
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