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toolchain-gcc-arm-embedded


			
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<a name="Nios-II-Features"></a>
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Next: <a href="OpenRISC-1000-Features.html#OpenRISC-1000-Features" accesskey="n" rel="next">OpenRISC 1000 Features</a>, Previous: <a href="NDS32-Features.html#NDS32-Features" accesskey="p" rel="prev">NDS32 Features</a>, Up: <a href="Standard-Target-Features.html#Standard-Target-Features" accesskey="u" rel="up">Standard Target Features</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Concept-Index.html#Concept-Index" title="Index" rel="index">Index</a>]</p>
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<a name="Nios-II-Features-1"></a>
<h4 class="subsection">G.5.9 Nios II Features</h4>
<a name="index-target-descriptions_002c-Nios-II-features"></a>

<p>The &lsquo;<samp>org.gnu.gdb.nios2.cpu</samp>&rsquo; feature is required for Nios II
targets.  It should contain the 32 core registers (&lsquo;<samp>zero</samp>&rsquo;,
&lsquo;<samp>at</samp>&rsquo;, &lsquo;<samp>r2</samp>&rsquo; through &lsquo;<samp>r23</samp>&rsquo;, &lsquo;<samp>et</samp>&rsquo; through &lsquo;<samp>ra</samp>&rsquo;),
&lsquo;<samp>pc</samp>&rsquo;, and the 16 control registers (&lsquo;<samp>status</samp>&rsquo; through
&lsquo;<samp>mpuacc</samp>&rsquo;).
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