| @@ -36,8 +36,12 @@ | |||
| // Tunable parameters (relatively safe to edit these numbers) | |||
| //////////////////////////////////////////////////////////////// | |||
| #define TX_BUFFER_SIZE 64 // number of outgoing bytes to buffer | |||
| #define RX_BUFFER_SIZE 64 // number of incoming bytes to buffer | |||
| #ifndef SERIAL1_TX_BUFFER_SIZE | |||
| #define SERIAL1_TX_BUFFER_SIZE 64 // number of outgoing bytes to buffer | |||
| #endif | |||
| #ifndef SERIAL1_RX_BUFFER_SIZE | |||
| #define SERIAL1_RX_BUFFER_SIZE 64 // number of incoming bytes to buffer | |||
| #endif | |||
| #define RTS_HIGH_WATERMARK 40 // RTS requests sender to pause | |||
| #define RTS_LOW_WATERMARK 26 // RTS allows sender to resume | |||
| #define IRQ_PRIORITY 64 // 0 = highest priority, 255 = lowest | |||
| @@ -55,8 +59,8 @@ static uint8_t use9Bits = 0; | |||
| #define use9Bits 0 | |||
| #endif | |||
| static volatile BUFTYPE tx_buffer[TX_BUFFER_SIZE]; | |||
| static volatile BUFTYPE rx_buffer[RX_BUFFER_SIZE]; | |||
| static volatile BUFTYPE tx_buffer[SERIAL1_TX_BUFFER_SIZE]; | |||
| static volatile BUFTYPE rx_buffer[SERIAL1_RX_BUFFER_SIZE]; | |||
| static volatile uint8_t transmitting = 0; | |||
| #if defined(KINETISK) | |||
| static volatile uint8_t *transmit_pin=NULL; | |||
| @@ -75,14 +79,14 @@ static volatile uint8_t transmitting = 0; | |||
| #define rts_assert() *(rts_pin+8) = rts_mask; | |||
| #define rts_deassert() *(rts_pin+4) = rts_mask; | |||
| #endif | |||
| #if TX_BUFFER_SIZE > 255 | |||
| #if SERIAL1_TX_BUFFER_SIZE > 255 | |||
| static volatile uint16_t tx_buffer_head = 0; | |||
| static volatile uint16_t tx_buffer_tail = 0; | |||
| #else | |||
| static volatile uint8_t tx_buffer_head = 0; | |||
| static volatile uint8_t tx_buffer_tail = 0; | |||
| #endif | |||
| #if RX_BUFFER_SIZE > 255 | |||
| #if SERIAL1_RX_BUFFER_SIZE > 255 | |||
| static volatile uint16_t rx_buffer_head = 0; | |||
| static volatile uint16_t rx_buffer_tail = 0; | |||
| #else | |||
| @@ -334,13 +338,13 @@ void serial_putchar(uint32_t c) | |||
| if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return; | |||
| if (transmit_pin) transmit_assert(); | |||
| head = tx_buffer_head; | |||
| if (++head >= TX_BUFFER_SIZE) head = 0; | |||
| if (++head >= SERIAL1_TX_BUFFER_SIZE) head = 0; | |||
| while (tx_buffer_tail == head) { | |||
| int priority = nvic_execution_priority(); | |||
| if (priority <= IRQ_PRIORITY) { | |||
| if ((UART0_S1 & UART_S1_TDRE)) { | |||
| uint32_t tail = tx_buffer_tail; | |||
| if (++tail >= TX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL1_TX_BUFFER_SIZE) tail = 0; | |||
| n = tx_buffer[tail]; | |||
| if (use9Bits) UART0_C3 = (UART0_C3 & ~0x40) | ((n & 0x100) >> 2); | |||
| UART0_D = n; | |||
| @@ -367,7 +371,7 @@ void serial_write(const void *buf, unsigned int count) | |||
| if (transmit_pin) transmit_assert(); | |||
| while (p < end) { | |||
| head = tx_buffer_head; | |||
| if (++head >= TX_BUFFER_SIZE) head = 0; | |||
| if (++head >= SERIAL1_TX_BUFFER_SIZE) head = 0; | |||
| if (tx_buffer_tail == head) { | |||
| UART0_C2 = C2_TX_ACTIVE; | |||
| do { | |||
| @@ -375,7 +379,7 @@ void serial_write(const void *buf, unsigned int count) | |||
| if (priority <= IRQ_PRIORITY) { | |||
| if ((UART0_S1 & UART_S1_TDRE)) { | |||
| uint32_t tail = tx_buffer_tail; | |||
| if (++tail >= TX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL1_TX_BUFFER_SIZE) tail = 0; | |||
| n = tx_buffer[tail]; | |||
| if (use9Bits) UART0_C3 = (UART0_C3 & ~0x40) | ((n & 0x100) >> 2); | |||
| UART0_D = n; | |||
| @@ -411,7 +415,7 @@ int serial_write_buffer_free(void) | |||
| head = tx_buffer_head; | |||
| tail = tx_buffer_tail; | |||
| if (head >= tail) return TX_BUFFER_SIZE - 1 - head + tail; | |||
| if (head >= tail) return SERIAL1_TX_BUFFER_SIZE - 1 - head + tail; | |||
| return tail - head - 1; | |||
| } | |||
| @@ -422,7 +426,7 @@ int serial_available(void) | |||
| head = rx_buffer_head; | |||
| tail = rx_buffer_tail; | |||
| if (head >= tail) return head - tail; | |||
| return RX_BUFFER_SIZE + head - tail; | |||
| return SERIAL1_RX_BUFFER_SIZE + head - tail; | |||
| } | |||
| int serial_getchar(void) | |||
| @@ -433,13 +437,13 @@ int serial_getchar(void) | |||
| head = rx_buffer_head; | |||
| tail = rx_buffer_tail; | |||
| if (head == tail) return -1; | |||
| if (++tail >= RX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL1_RX_BUFFER_SIZE) tail = 0; | |||
| c = rx_buffer[tail]; | |||
| rx_buffer_tail = tail; | |||
| if (rts_pin) { | |||
| int avail; | |||
| if (head >= tail) avail = head - tail; | |||
| else avail = RX_BUFFER_SIZE + head - tail; | |||
| else avail = SERIAL1_RX_BUFFER_SIZE + head - tail; | |||
| if (avail <= RTS_LOW_WATERMARK) rts_assert(); | |||
| } | |||
| return c; | |||
| @@ -452,7 +456,7 @@ int serial_peek(void) | |||
| head = rx_buffer_head; | |||
| tail = rx_buffer_tail; | |||
| if (head == tail) return -1; | |||
| if (++tail >= RX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL1_RX_BUFFER_SIZE) tail = 0; | |||
| return rx_buffer[tail]; | |||
| } | |||
| @@ -517,7 +521,7 @@ void uart0_status_isr(void) | |||
| n = UART0_D; | |||
| } | |||
| newhead = head + 1; | |||
| if (newhead >= RX_BUFFER_SIZE) newhead = 0; | |||
| if (newhead >= SERIAL1_RX_BUFFER_SIZE) newhead = 0; | |||
| if (newhead != tail) { | |||
| head = newhead; | |||
| rx_buffer[head] = n; | |||
| @@ -527,7 +531,7 @@ void uart0_status_isr(void) | |||
| if (rts_pin) { | |||
| int avail; | |||
| if (head >= tail) avail = head - tail; | |||
| else avail = RX_BUFFER_SIZE + head - tail; | |||
| else avail = SERIAL1_RX_BUFFER_SIZE + head - tail; | |||
| if (avail >= RTS_HIGH_WATERMARK) rts_deassert(); | |||
| } | |||
| } | |||
| @@ -538,7 +542,7 @@ void uart0_status_isr(void) | |||
| tail = tx_buffer_tail; | |||
| do { | |||
| if (tail == head) break; | |||
| if (++tail >= TX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL1_TX_BUFFER_SIZE) tail = 0; | |||
| avail = UART0_S1; | |||
| n = tx_buffer[tail]; | |||
| if (use9Bits) UART0_C3 = (UART0_C3 & ~0x40) | ((n & 0x100) >> 2); | |||
| @@ -552,7 +556,7 @@ void uart0_status_isr(void) | |||
| n = UART0_D; | |||
| if (use9Bits && (UART0_C3 & 0x80)) n |= 0x100; | |||
| head = rx_buffer_head + 1; | |||
| if (head >= RX_BUFFER_SIZE) head = 0; | |||
| if (head >= SERIAL1_RX_BUFFER_SIZE) head = 0; | |||
| if (head != rx_buffer_tail) { | |||
| rx_buffer[head] = n; | |||
| rx_buffer_head = head; | |||
| @@ -565,7 +569,7 @@ void uart0_status_isr(void) | |||
| if (head == tail) { | |||
| UART0_C2 = C2_TX_COMPLETING; | |||
| } else { | |||
| if (++tail >= TX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL1_TX_BUFFER_SIZE) tail = 0; | |||
| n = tx_buffer[tail]; | |||
| if (use9Bits) UART0_C3 = (UART0_C3 & ~0x40) | ((n & 0x100) >> 2); | |||
| UART0_D = n; | |||
| @@ -40,8 +40,12 @@ | |||
| // Tunable parameters (relatively safe to edit these numbers) | |||
| //////////////////////////////////////////////////////////////// | |||
| #define TX_BUFFER_SIZE 64 // number of outgoing bytes to buffer | |||
| #define RX_BUFFER_SIZE 64 // number of incoming bytes to buffer | |||
| #ifndef SERIAL1_TX_BUFFER_SIZE | |||
| #define SERIAL1_TX_BUFFER_SIZE 64 // number of outgoing bytes to buffer | |||
| #endif | |||
| #ifndef SERIAL1_RX_BUFFER_SIZE | |||
| #define SERIAL1_RX_BUFFER_SIZE 64 // number of incoming bytes to buffer | |||
| #endif | |||
| #define IRQ_PRIORITY 64 // 0 = highest priority, 255 = lowest | |||
| @@ -57,8 +61,8 @@ static uint8_t use9Bits = 0; | |||
| #define use9Bits 0 | |||
| #endif | |||
| static volatile BUFTYPE tx_buffer[TX_BUFFER_SIZE]; | |||
| static volatile BUFTYPE rx_buffer[RX_BUFFER_SIZE]; | |||
| static volatile BUFTYPE tx_buffer[SERIAL1_TX_BUFFER_SIZE]; | |||
| static volatile BUFTYPE rx_buffer[SERIAL1_RX_BUFFER_SIZE]; | |||
| static volatile uint8_t transmitting = 0; | |||
| #if defined(KINETISK) | |||
| static volatile uint8_t *transmit_pin=NULL; | |||
| @@ -70,14 +74,14 @@ static volatile uint8_t transmitting = 0; | |||
| #define transmit_assert() *(transmit_pin+4) = transmit_mask; | |||
| #define transmit_deassert() *(transmit_pin+8) = transmit_mask; | |||
| #endif | |||
| #if TX_BUFFER_SIZE > 255 | |||
| #if SERIAL1_TX_BUFFER_SIZE > 255 | |||
| static volatile uint16_t tx_buffer_head = 0; | |||
| static volatile uint16_t tx_buffer_tail = 0; | |||
| #else | |||
| static volatile uint8_t tx_buffer_head = 0; | |||
| static volatile uint8_t tx_buffer_tail = 0; | |||
| #endif | |||
| #if RX_BUFFER_SIZE > 255 | |||
| #if SERIAL1_RX_BUFFER_SIZE > 255 | |||
| static volatile uint16_t rx_buffer_head = 0; | |||
| static volatile uint16_t rx_buffer_tail = 0; | |||
| #else | |||
| @@ -204,13 +208,13 @@ void serial_putchar(uint32_t c) | |||
| if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return; | |||
| if (transmit_pin) transmit_assert(); | |||
| head = tx_buffer_head; | |||
| if (++head >= TX_BUFFER_SIZE) head = 0; | |||
| if (++head >= SERIAL1_TX_BUFFER_SIZE) head = 0; | |||
| while (tx_buffer_tail == head) { | |||
| int priority = nvic_execution_priority(); | |||
| if (priority <= IRQ_PRIORITY) { | |||
| if ((UART0_S1 & UART_S1_TDRE)) { | |||
| uint32_t tail = tx_buffer_tail; | |||
| if (++tail >= TX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL1_TX_BUFFER_SIZE) tail = 0; | |||
| n = tx_buffer[tail]; | |||
| if (use9Bits) UART0_C3 = (UART0_C3 & ~0x40) | ((n & 0x100) >> 2); | |||
| UART0_D = n; | |||
| @@ -238,7 +242,7 @@ void serial_write(const void *buf, unsigned int count) | |||
| if (transmit_pin) transmit_assert(); | |||
| while (p < end) { | |||
| head = tx_buffer_head; | |||
| if (++head >= TX_BUFFER_SIZE) head = 0; | |||
| if (++head >= SERIAL1_TX_BUFFER_SIZE) head = 0; | |||
| if (tx_buffer_tail == head) { | |||
| UART0_C2 |= UART_C2_TIE; | |||
| UART0_C2 &= ~UART_C2_TCIE; | |||
| @@ -247,7 +251,7 @@ void serial_write(const void *buf, unsigned int count) | |||
| if (priority <= IRQ_PRIORITY) { | |||
| if ((UART0_S1 & UART_S1_TDRE)) { | |||
| uint32_t tail = tx_buffer_tail; | |||
| if (++tail >= TX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL1_TX_BUFFER_SIZE) tail = 0; | |||
| n = tx_buffer[tail]; | |||
| if (use9Bits) UART0_C3 = (UART0_C3 & ~0x40) | ((n & 0x100) >> 2); | |||
| UART0_D = n; | |||
| @@ -284,7 +288,7 @@ int serial_write_buffer_free(void) | |||
| head = tx_buffer_head; | |||
| tail = tx_buffer_tail; | |||
| if (head >= tail) return TX_BUFFER_SIZE - 1 - head + tail; | |||
| if (head >= tail) return SERIAL1_TX_BUFFER_SIZE - 1 - head + tail; | |||
| return tail - head - 1; | |||
| } | |||
| @@ -295,7 +299,7 @@ int serial_available(void) | |||
| head = rx_buffer_head; | |||
| tail = rx_buffer_tail; | |||
| if (head >= tail) return head - tail; | |||
| return RX_BUFFER_SIZE + head - tail; | |||
| return SERIAL1_RX_BUFFER_SIZE + head - tail; | |||
| } | |||
| int serial_getchar(void) | |||
| @@ -306,14 +310,14 @@ int serial_getchar(void) | |||
| head = rx_buffer_head; | |||
| tail = rx_buffer_tail; | |||
| if (head == tail) return -1; | |||
| if (++tail >= RX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL1_RX_BUFFER_SIZE) tail = 0; | |||
| c = rx_buffer[tail]; | |||
| rx_buffer_tail = tail; | |||
| #ifdef HAS_KINETISK_UART0_FIFO | |||
| if ((UART0_C2 & (UART_C2_RIE | UART_C2_ILIE))==0) {//rx interrupt currently disabled | |||
| int freespace; | |||
| if (head >= tail) //rx head and tail would be unchanged from above if interrupts were disabled | |||
| freespace = RX_BUFFER_SIZE -1 + tail - head; | |||
| freespace = SERIAL1_RX_BUFFER_SIZE -1 + tail - head; | |||
| else | |||
| freespace = tail - head - 1; | |||
| if (freespace >= UART0_RCFIFO) { | |||
| @@ -333,7 +337,7 @@ int serial_peek(void) | |||
| head = rx_buffer_head; | |||
| tail = rx_buffer_tail; | |||
| if (head == tail) return -1; | |||
| if (++tail >= RX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL1_RX_BUFFER_SIZE) tail = 0; | |||
| return rx_buffer[tail]; | |||
| } | |||
| @@ -389,7 +393,7 @@ void uart0_status_isr(void) | |||
| tail = rx_buffer_tail; | |||
| do { | |||
| newhead = head + 1; | |||
| if (newhead >= RX_BUFFER_SIZE) newhead = 0; | |||
| if (newhead >= SERIAL1_RX_BUFFER_SIZE) newhead = 0; | |||
| if (UART0_MODEM & UART_MODEM_RXRTSE) { | |||
| if (newhead == tail) { | |||
| UART0_C2 &= ~(UART_C2_RIE | UART_C2_ILIE);//disable rx interrupts | |||
| @@ -414,7 +418,7 @@ void uart0_status_isr(void) | |||
| tail = tx_buffer_tail; | |||
| do { | |||
| if (tail == head) break; | |||
| if (++tail >= TX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL1_TX_BUFFER_SIZE) tail = 0; | |||
| UART0_S1; | |||
| n = tx_buffer[tail]; | |||
| if (use9Bits) UART0_C3 = (UART0_C3 & ~0x40) | ((n & 0x100) >> 2); | |||
| @@ -430,7 +434,7 @@ void uart0_status_isr(void) | |||
| if (UART0_S1 & UART_S1_RDRF) { | |||
| do { | |||
| head = rx_buffer_head + 1; | |||
| if (head >= RX_BUFFER_SIZE) head = 0; | |||
| if (head >= SERIAL1_RX_BUFFER_SIZE) head = 0; | |||
| if (UART0_MODEM & UART_MODEM_RXRTSE) { | |||
| if (head == rx_buffer_tail) { | |||
| UART0_C2 &= ~(UART_C2_RIE);//disable rx interrupts | |||
| @@ -452,7 +456,7 @@ void uart0_status_isr(void) | |||
| UART0_C2 |= UART_C2_TCIE; | |||
| UART0_C2 &= ~UART_C2_TIE; | |||
| } else { | |||
| if (++tail >= TX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL1_TX_BUFFER_SIZE) tail = 0; | |||
| n = tx_buffer[tail]; | |||
| if (use9Bits) UART0_C3 = (UART0_C3 & ~0x40) | ((n & 0x100) >> 2); | |||
| UART0_D = n; | |||
| @@ -36,8 +36,12 @@ | |||
| // Tunable parameters (relatively safe to edit these numbers) | |||
| //////////////////////////////////////////////////////////////// | |||
| #define TX_BUFFER_SIZE 40 // number of outgoing bytes to buffer | |||
| #define RX_BUFFER_SIZE 64 // number of incoming bytes to buffer | |||
| #ifndef SERIAL2_TX_BUFFER_SIZE | |||
| #define SERIAL2_TX_BUFFER_SIZE 40 // number of outgoing bytes to buffer | |||
| #endif | |||
| #ifndef SERIAL2_RX_BUFFER_SIZE | |||
| #define SERIAL2_RX_BUFFER_SIZE 64 // number of incoming bytes to buffer | |||
| #endif | |||
| #define RTS_HIGH_WATERMARK 40 // RTS requests sender to pause | |||
| #define RTS_LOW_WATERMARK 26 // RTS allows sender to resume | |||
| #define IRQ_PRIORITY 64 // 0 = highest priority, 255 = lowest | |||
| @@ -54,8 +58,8 @@ static uint8_t use9Bits = 0; | |||
| #define use9Bits 0 | |||
| #endif | |||
| static volatile BUFTYPE tx_buffer[TX_BUFFER_SIZE]; | |||
| static volatile BUFTYPE rx_buffer[RX_BUFFER_SIZE]; | |||
| static volatile BUFTYPE tx_buffer[SERIAL2_TX_BUFFER_SIZE]; | |||
| static volatile BUFTYPE rx_buffer[SERIAL2_RX_BUFFER_SIZE]; | |||
| static volatile uint8_t transmitting = 0; | |||
| #if defined(KINETISK) | |||
| static volatile uint8_t *transmit_pin=NULL; | |||
| @@ -74,14 +78,14 @@ static volatile uint8_t transmitting = 0; | |||
| #define rts_assert() *(rts_pin+8) = rts_mask; | |||
| #define rts_deassert() *(rts_pin+4) = rts_mask; | |||
| #endif | |||
| #if TX_BUFFER_SIZE > 255 | |||
| #if SERIAL2_TX_BUFFER_SIZE > 255 | |||
| static volatile uint16_t tx_buffer_head = 0; | |||
| static volatile uint16_t tx_buffer_tail = 0; | |||
| #else | |||
| static volatile uint8_t tx_buffer_head = 0; | |||
| static volatile uint8_t tx_buffer_tail = 0; | |||
| #endif | |||
| #if RX_BUFFER_SIZE > 255 | |||
| #if SERIAL2_RX_BUFFER_SIZE > 255 | |||
| static volatile uint16_t rx_buffer_head = 0; | |||
| static volatile uint16_t rx_buffer_tail = 0; | |||
| #else | |||
| @@ -344,13 +348,13 @@ void serial2_putchar(uint32_t c) | |||
| if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return; | |||
| if (transmit_pin) transmit_assert(); | |||
| head = tx_buffer_head; | |||
| if (++head >= TX_BUFFER_SIZE) head = 0; | |||
| if (++head >= SERIAL2_TX_BUFFER_SIZE) head = 0; | |||
| while (tx_buffer_tail == head) { | |||
| int priority = nvic_execution_priority(); | |||
| if (priority <= IRQ_PRIORITY) { | |||
| if ((UART1_S1 & UART_S1_TDRE)) { | |||
| uint32_t tail = tx_buffer_tail; | |||
| if (++tail >= TX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL2_TX_BUFFER_SIZE) tail = 0; | |||
| n = tx_buffer[tail]; | |||
| if (use9Bits) UART1_C3 = (UART1_C3 & ~0x40) | ((n & 0x100) >> 2); | |||
| UART1_D = n; | |||
| @@ -377,7 +381,7 @@ void serial2_write(const void *buf, unsigned int count) | |||
| if (transmit_pin) transmit_assert(); | |||
| while (p < end) { | |||
| head = tx_buffer_head; | |||
| if (++head >= TX_BUFFER_SIZE) head = 0; | |||
| if (++head >= SERIAL2_TX_BUFFER_SIZE) head = 0; | |||
| if (tx_buffer_tail == head) { | |||
| UART1_C2 = C2_TX_ACTIVE; | |||
| do { | |||
| @@ -385,7 +389,7 @@ void serial2_write(const void *buf, unsigned int count) | |||
| if (priority <= IRQ_PRIORITY) { | |||
| if ((UART1_S1 & UART_S1_TDRE)) { | |||
| uint32_t tail = tx_buffer_tail; | |||
| if (++tail >= TX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL2_TX_BUFFER_SIZE) tail = 0; | |||
| n = tx_buffer[tail]; | |||
| if (use9Bits) UART1_C3 = (UART1_C3 & ~0x40) | ((n & 0x100) >> 2); | |||
| UART1_D = n; | |||
| @@ -421,7 +425,7 @@ int serial2_write_buffer_free(void) | |||
| head = tx_buffer_head; | |||
| tail = tx_buffer_tail; | |||
| if (head >= tail) return TX_BUFFER_SIZE - 1 - head + tail; | |||
| if (head >= tail) return SERIAL2_TX_BUFFER_SIZE - 1 - head + tail; | |||
| return tail - head - 1; | |||
| } | |||
| @@ -432,7 +436,7 @@ int serial2_available(void) | |||
| head = rx_buffer_head; | |||
| tail = rx_buffer_tail; | |||
| if (head >= tail) return head - tail; | |||
| return RX_BUFFER_SIZE + head - tail; | |||
| return SERIAL2_RX_BUFFER_SIZE + head - tail; | |||
| } | |||
| int serial2_getchar(void) | |||
| @@ -443,13 +447,13 @@ int serial2_getchar(void) | |||
| head = rx_buffer_head; | |||
| tail = rx_buffer_tail; | |||
| if (head == tail) return -1; | |||
| if (++tail >= RX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL2_RX_BUFFER_SIZE) tail = 0; | |||
| c = rx_buffer[tail]; | |||
| rx_buffer_tail = tail; | |||
| if (rts_pin) { | |||
| int avail; | |||
| if (head >= tail) avail = head - tail; | |||
| else avail = RX_BUFFER_SIZE + head - tail; | |||
| else avail = SERIAL2_RX_BUFFER_SIZE + head - tail; | |||
| if (avail <= RTS_LOW_WATERMARK) rts_assert(); | |||
| } | |||
| return c; | |||
| @@ -462,7 +466,7 @@ int serial2_peek(void) | |||
| head = rx_buffer_head; | |||
| tail = rx_buffer_tail; | |||
| if (head == tail) return -1; | |||
| if (++tail >= RX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL2_RX_BUFFER_SIZE) tail = 0; | |||
| return rx_buffer[tail]; | |||
| } | |||
| @@ -527,7 +531,7 @@ void uart1_status_isr(void) | |||
| n = UART1_D; | |||
| } | |||
| newhead = head + 1; | |||
| if (newhead >= RX_BUFFER_SIZE) newhead = 0; | |||
| if (newhead >= SERIAL2_RX_BUFFER_SIZE) newhead = 0; | |||
| if (newhead != tail) { | |||
| head = newhead; | |||
| rx_buffer[head] = n; | |||
| @@ -537,7 +541,7 @@ void uart1_status_isr(void) | |||
| if (rts_pin) { | |||
| int avail; | |||
| if (head >= tail) avail = head - tail; | |||
| else avail = RX_BUFFER_SIZE + head - tail; | |||
| else avail = SERIAL2_RX_BUFFER_SIZE + head - tail; | |||
| if (avail >= RTS_HIGH_WATERMARK) rts_deassert(); | |||
| } | |||
| } | |||
| @@ -548,7 +552,7 @@ void uart1_status_isr(void) | |||
| tail = tx_buffer_tail; | |||
| do { | |||
| if (tail == head) break; | |||
| if (++tail >= TX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL2_TX_BUFFER_SIZE) tail = 0; | |||
| avail = UART1_S1; | |||
| n = tx_buffer[tail]; | |||
| if (use9Bits) UART1_C3 = (UART1_C3 & ~0x40) | ((n & 0x100) >> 2); | |||
| @@ -562,7 +566,7 @@ void uart1_status_isr(void) | |||
| n = UART1_D; | |||
| if (use9Bits && (UART1_C3 & 0x80)) n |= 0x100; | |||
| head = rx_buffer_head + 1; | |||
| if (head >= RX_BUFFER_SIZE) head = 0; | |||
| if (head >= SERIAL2_RX_BUFFER_SIZE) head = 0; | |||
| if (head != rx_buffer_tail) { | |||
| rx_buffer[head] = n; | |||
| rx_buffer_head = head; | |||
| @@ -575,7 +579,7 @@ void uart1_status_isr(void) | |||
| if (head == tail) { | |||
| UART1_C2 = C2_TX_COMPLETING; | |||
| } else { | |||
| if (++tail >= TX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL2_TX_BUFFER_SIZE) tail = 0; | |||
| n = tx_buffer[tail]; | |||
| if (use9Bits) UART1_C3 = (UART1_C3 & ~0x40) | ((n & 0x100) >> 2); | |||
| UART1_D = n; | |||
| @@ -36,8 +36,12 @@ | |||
| // Tunable parameters (relatively safe to edit these numbers) | |||
| //////////////////////////////////////////////////////////////// | |||
| #define TX_BUFFER_SIZE 40 // number of outgoing bytes to buffer | |||
| #define RX_BUFFER_SIZE 64 // number of incoming bytes to buffer | |||
| #ifndef SERIAL3_TX_BUFFER_SIZE | |||
| #define SERIAL3_TX_BUFFER_SIZE 40 // number of outgoing bytes to buffer | |||
| #endif | |||
| #ifndef SERIAL3_RX_BUFFER_SIZE | |||
| #define SERIAL3_RX_BUFFER_SIZE 64 // number of incoming bytes to buffer | |||
| #endif | |||
| #define RTS_HIGH_WATERMARK 40 // RTS requests sender to pause | |||
| #define RTS_LOW_WATERMARK 26 // RTS allows sender to resume | |||
| #define IRQ_PRIORITY 64 // 0 = highest priority, 255 = lowest | |||
| @@ -55,8 +59,8 @@ static uint8_t use9Bits = 0; | |||
| #define use9Bits 0 | |||
| #endif | |||
| static volatile BUFTYPE tx_buffer[TX_BUFFER_SIZE]; | |||
| static volatile BUFTYPE rx_buffer[RX_BUFFER_SIZE]; | |||
| static volatile BUFTYPE tx_buffer[SERIAL3_TX_BUFFER_SIZE]; | |||
| static volatile BUFTYPE rx_buffer[SERIAL3_RX_BUFFER_SIZE]; | |||
| static volatile uint8_t transmitting = 0; | |||
| #if defined(KINETISK) | |||
| static volatile uint8_t *transmit_pin=NULL; | |||
| @@ -75,14 +79,14 @@ static volatile uint8_t transmitting = 0; | |||
| #define rts_assert() *(rts_pin+8) = rts_mask; | |||
| #define rts_deassert() *(rts_pin+4) = rts_mask; | |||
| #endif | |||
| #if TX_BUFFER_SIZE > 255 | |||
| #if SERIAL3_TX_BUFFER_SIZE > 255 | |||
| static volatile uint16_t tx_buffer_head = 0; | |||
| static volatile uint16_t tx_buffer_tail = 0; | |||
| #else | |||
| static volatile uint8_t tx_buffer_head = 0; | |||
| static volatile uint8_t tx_buffer_tail = 0; | |||
| #endif | |||
| #if RX_BUFFER_SIZE > 255 | |||
| #if SERIAL3_RX_BUFFER_SIZE > 255 | |||
| static volatile uint16_t rx_buffer_head = 0; | |||
| static volatile uint16_t rx_buffer_tail = 0; | |||
| #else | |||
| @@ -291,13 +295,13 @@ void serial3_putchar(uint32_t c) | |||
| if (!(SIM_SCGC4 & SIM_SCGC4_UART2)) return; | |||
| if (transmit_pin) transmit_assert(); | |||
| head = tx_buffer_head; | |||
| if (++head >= TX_BUFFER_SIZE) head = 0; | |||
| if (++head >= SERIAL3_TX_BUFFER_SIZE) head = 0; | |||
| while (tx_buffer_tail == head) { | |||
| int priority = nvic_execution_priority(); | |||
| if (priority <= IRQ_PRIORITY) { | |||
| if ((UART2_S1 & UART_S1_TDRE)) { | |||
| uint32_t tail = tx_buffer_tail; | |||
| if (++tail >= TX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL3_TX_BUFFER_SIZE) tail = 0; | |||
| n = tx_buffer[tail]; | |||
| if (use9Bits) UART2_C3 = (UART2_C3 & ~0x40) | ((n & 0x100) >> 2); | |||
| UART2_D = n; | |||
| @@ -330,7 +334,7 @@ int serial3_write_buffer_free(void) | |||
| head = tx_buffer_head; | |||
| tail = tx_buffer_tail; | |||
| if (head >= tail) return TX_BUFFER_SIZE - 1 - head + tail; | |||
| if (head >= tail) return SERIAL3_TX_BUFFER_SIZE - 1 - head + tail; | |||
| return tail - head - 1; | |||
| } | |||
| @@ -341,7 +345,7 @@ int serial3_available(void) | |||
| head = rx_buffer_head; | |||
| tail = rx_buffer_tail; | |||
| if (head >= tail) return head - tail; | |||
| return RX_BUFFER_SIZE + head - tail; | |||
| return SERIAL3_RX_BUFFER_SIZE + head - tail; | |||
| } | |||
| int serial3_getchar(void) | |||
| @@ -352,13 +356,13 @@ int serial3_getchar(void) | |||
| head = rx_buffer_head; | |||
| tail = rx_buffer_tail; | |||
| if (head == tail) return -1; | |||
| if (++tail >= RX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL3_RX_BUFFER_SIZE) tail = 0; | |||
| c = rx_buffer[tail]; | |||
| rx_buffer_tail = tail; | |||
| if (rts_pin) { | |||
| int avail; | |||
| if (head >= tail) avail = head - tail; | |||
| else avail = RX_BUFFER_SIZE + head - tail; | |||
| else avail = SERIAL3_RX_BUFFER_SIZE + head - tail; | |||
| if (avail <= RTS_LOW_WATERMARK) rts_assert(); | |||
| } | |||
| return c; | |||
| @@ -371,7 +375,7 @@ int serial3_peek(void) | |||
| head = rx_buffer_head; | |||
| tail = rx_buffer_tail; | |||
| if (head == tail) return -1; | |||
| if (++tail >= RX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL3_RX_BUFFER_SIZE) tail = 0; | |||
| return rx_buffer[tail]; | |||
| } | |||
| @@ -401,7 +405,7 @@ void uart2_status_isr(void) | |||
| n = UART2_D; | |||
| } | |||
| head = rx_buffer_head + 1; | |||
| if (head >= RX_BUFFER_SIZE) head = 0; | |||
| if (head >= SERIAL3_RX_BUFFER_SIZE) head = 0; | |||
| if (head != rx_buffer_tail) { | |||
| rx_buffer[head] = n; | |||
| rx_buffer_head = head; | |||
| @@ -410,7 +414,7 @@ void uart2_status_isr(void) | |||
| int avail; | |||
| tail = tx_buffer_tail; | |||
| if (head >= tail) avail = head - tail; | |||
| else avail = RX_BUFFER_SIZE + head - tail; | |||
| else avail = SERIAL3_RX_BUFFER_SIZE + head - tail; | |||
| if (avail >= RTS_HIGH_WATERMARK) rts_deassert(); | |||
| } | |||
| } | |||
| @@ -421,7 +425,7 @@ void uart2_status_isr(void) | |||
| if (head == tail) { | |||
| UART2_C2 = C2_TX_COMPLETING; | |||
| } else { | |||
| if (++tail >= TX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL3_TX_BUFFER_SIZE) tail = 0; | |||
| n = tx_buffer[tail]; | |||
| if (use9Bits) UART2_C3 = (UART2_C3 & ~0x40) | ((n & 0x100) >> 2); | |||
| UART2_D = n; | |||
| @@ -38,8 +38,12 @@ | |||
| // Tunable parameters (relatively safe to edit these numbers) | |||
| //////////////////////////////////////////////////////////////// | |||
| #define TX_BUFFER_SIZE 40 // number of outgoing bytes to buffer | |||
| #define RX_BUFFER_SIZE 64 // number of incoming bytes to buffer | |||
| #ifndef SERIAL4_TX_BUFFER_SIZE | |||
| #define SERIAL4_TX_BUFFER_SIZE 40 // number of outgoing bytes to buffer | |||
| #endif | |||
| #ifndef SERIAL4_RX_BUFFER_SIZE | |||
| #define SERIAL4_RX_BUFFER_SIZE 64 // number of incoming bytes to buffer | |||
| #endif | |||
| #define RTS_HIGH_WATERMARK 40 // RTS requests sender to pause | |||
| #define RTS_LOW_WATERMARK 26 // RTS allows sender to resume | |||
| #define IRQ_PRIORITY 64 // 0 = highest priority, 255 = lowest | |||
| @@ -57,8 +61,8 @@ static uint8_t use9Bits = 0; | |||
| #define use9Bits 0 | |||
| #endif | |||
| static volatile BUFTYPE tx_buffer[TX_BUFFER_SIZE]; | |||
| static volatile BUFTYPE rx_buffer[RX_BUFFER_SIZE]; | |||
| static volatile BUFTYPE tx_buffer[SERIAL4_TX_BUFFER_SIZE]; | |||
| static volatile BUFTYPE rx_buffer[SERIAL4_RX_BUFFER_SIZE]; | |||
| static volatile uint8_t transmitting = 0; | |||
| static volatile uint8_t *transmit_pin=NULL; | |||
| #define transmit_assert() *transmit_pin = 1 | |||
| @@ -66,14 +70,14 @@ static volatile uint8_t *transmit_pin=NULL; | |||
| static volatile uint8_t *rts_pin=NULL; | |||
| #define rts_assert() *rts_pin = 0 | |||
| #define rts_deassert() *rts_pin = 1 | |||
| #if TX_BUFFER_SIZE > 255 | |||
| #if SERIAL4_TX_BUFFER_SIZE > 255 | |||
| static volatile uint16_t tx_buffer_head = 0; | |||
| static volatile uint16_t tx_buffer_tail = 0; | |||
| #else | |||
| static volatile uint8_t tx_buffer_head = 0; | |||
| static volatile uint8_t tx_buffer_tail = 0; | |||
| #endif | |||
| #if RX_BUFFER_SIZE > 255 | |||
| #if SERIAL4_RX_BUFFER_SIZE > 255 | |||
| static volatile uint16_t rx_buffer_head = 0; | |||
| static volatile uint16_t rx_buffer_tail = 0; | |||
| #else | |||
| @@ -245,13 +249,13 @@ void serial4_putchar(uint32_t c) | |||
| if (!(SIM_SCGC4 & SIM_SCGC4_UART3)) return; | |||
| if (transmit_pin) transmit_assert(); | |||
| head = tx_buffer_head; | |||
| if (++head >= TX_BUFFER_SIZE) head = 0; | |||
| if (++head >= SERIAL4_TX_BUFFER_SIZE) head = 0; | |||
| while (tx_buffer_tail == head) { | |||
| int priority = nvic_execution_priority(); | |||
| if (priority <= IRQ_PRIORITY) { | |||
| if ((UART3_S1 & UART_S1_TDRE)) { | |||
| uint32_t tail = tx_buffer_tail; | |||
| if (++tail >= TX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL4_TX_BUFFER_SIZE) tail = 0; | |||
| n = tx_buffer[tail]; | |||
| if (use9Bits) UART3_C3 = (UART3_C3 & ~0x40) | ((n & 0x100) >> 2); | |||
| UART3_D = n; | |||
| @@ -284,7 +288,7 @@ int serial4_write_buffer_free(void) | |||
| head = tx_buffer_head; | |||
| tail = tx_buffer_tail; | |||
| if (head >= tail) return TX_BUFFER_SIZE - 1 - head + tail; | |||
| if (head >= tail) return SERIAL4_TX_BUFFER_SIZE - 1 - head + tail; | |||
| return tail - head - 1; | |||
| } | |||
| @@ -295,7 +299,7 @@ int serial4_available(void) | |||
| head = rx_buffer_head; | |||
| tail = rx_buffer_tail; | |||
| if (head >= tail) return head - tail; | |||
| return RX_BUFFER_SIZE + head - tail; | |||
| return SERIAL4_RX_BUFFER_SIZE + head - tail; | |||
| } | |||
| int serial4_getchar(void) | |||
| @@ -306,13 +310,13 @@ int serial4_getchar(void) | |||
| head = rx_buffer_head; | |||
| tail = rx_buffer_tail; | |||
| if (head == tail) return -1; | |||
| if (++tail >= RX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL4_RX_BUFFER_SIZE) tail = 0; | |||
| c = rx_buffer[tail]; | |||
| rx_buffer_tail = tail; | |||
| if (rts_pin) { | |||
| int avail; | |||
| if (head >= tail) avail = head - tail; | |||
| else avail = RX_BUFFER_SIZE + head - tail; | |||
| else avail = SERIAL4_RX_BUFFER_SIZE + head - tail; | |||
| if (avail <= RTS_LOW_WATERMARK) rts_assert(); | |||
| } | |||
| return c; | |||
| @@ -325,7 +329,7 @@ int serial4_peek(void) | |||
| head = rx_buffer_head; | |||
| tail = rx_buffer_tail; | |||
| if (head == tail) return -1; | |||
| if (++tail >= RX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL4_RX_BUFFER_SIZE) tail = 0; | |||
| return rx_buffer[tail]; | |||
| } | |||
| @@ -355,7 +359,7 @@ void uart3_status_isr(void) | |||
| n = UART3_D; | |||
| } | |||
| head = rx_buffer_head + 1; | |||
| if (head >= RX_BUFFER_SIZE) head = 0; | |||
| if (head >= SERIAL4_RX_BUFFER_SIZE) head = 0; | |||
| if (head != rx_buffer_tail) { | |||
| rx_buffer[head] = n; | |||
| rx_buffer_head = head; | |||
| @@ -364,7 +368,7 @@ void uart3_status_isr(void) | |||
| int avail; | |||
| tail = tx_buffer_tail; | |||
| if (head >= tail) avail = head - tail; | |||
| else avail = RX_BUFFER_SIZE + head - tail; | |||
| else avail = SERIAL4_RX_BUFFER_SIZE + head - tail; | |||
| if (avail >= RTS_HIGH_WATERMARK) rts_deassert(); | |||
| } | |||
| } | |||
| @@ -375,7 +379,7 @@ void uart3_status_isr(void) | |||
| if (head == tail) { | |||
| UART3_C2 = C2_TX_COMPLETING; | |||
| } else { | |||
| if (++tail >= TX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL4_TX_BUFFER_SIZE) tail = 0; | |||
| n = tx_buffer[tail]; | |||
| if (use9Bits) UART3_C3 = (UART3_C3 & ~0x40) | ((n & 0x100) >> 2); | |||
| UART3_D = n; | |||
| @@ -38,8 +38,12 @@ | |||
| // Tunable parameters (relatively safe to edit these numbers) | |||
| //////////////////////////////////////////////////////////////// | |||
| #define TX_BUFFER_SIZE 40 // number of outgoing bytes to buffer | |||
| #define RX_BUFFER_SIZE 64 // number of incoming bytes to buffer | |||
| #ifndef SERIAL5_TX_BUFFER_SIZE | |||
| #define SERIAL5_TX_BUFFER_SIZE 40 // number of outgoing bytes to buffer | |||
| #endif | |||
| #ifndef SERIAL5_RX_BUFFER_SIZE | |||
| #define SERIAL5_RX_BUFFER_SIZE 64 // number of incoming bytes to buffer | |||
| #endif | |||
| #define RTS_HIGH_WATERMARK 40 // RTS requests sender to pause | |||
| #define RTS_LOW_WATERMARK 26 // RTS allows sender to resume | |||
| #define IRQ_PRIORITY 64 // 0 = highest priority, 255 = lowest | |||
| @@ -57,8 +61,8 @@ static uint8_t use9Bits = 0; | |||
| #define use9Bits 0 | |||
| #endif | |||
| static volatile BUFTYPE tx_buffer[TX_BUFFER_SIZE]; | |||
| static volatile BUFTYPE rx_buffer[RX_BUFFER_SIZE]; | |||
| static volatile BUFTYPE tx_buffer[SERIAL5_TX_BUFFER_SIZE]; | |||
| static volatile BUFTYPE rx_buffer[SERIAL5_RX_BUFFER_SIZE]; | |||
| static volatile uint8_t transmitting = 0; | |||
| static volatile uint8_t *transmit_pin=NULL; | |||
| #define transmit_assert() *transmit_pin = 1 | |||
| @@ -66,14 +70,14 @@ static volatile uint8_t *transmit_pin=NULL; | |||
| static volatile uint8_t *rts_pin=NULL; | |||
| #define rts_assert() *rts_pin = 0 | |||
| #define rts_deassert() *rts_pin = 1 | |||
| #if TX_BUFFER_SIZE > 255 | |||
| #if SERIAL5_TX_BUFFER_SIZE > 255 | |||
| static volatile uint16_t tx_buffer_head = 0; | |||
| static volatile uint16_t tx_buffer_tail = 0; | |||
| #else | |||
| static volatile uint8_t tx_buffer_head = 0; | |||
| static volatile uint8_t tx_buffer_tail = 0; | |||
| #endif | |||
| #if RX_BUFFER_SIZE > 255 | |||
| #if SERIAL5_RX_BUFFER_SIZE > 255 | |||
| static volatile uint16_t rx_buffer_head = 0; | |||
| static volatile uint16_t rx_buffer_tail = 0; | |||
| #else | |||
| @@ -221,13 +225,13 @@ void serial5_putchar(uint32_t c) | |||
| if (!(SIM_SCGC1 & SIM_SCGC1_UART4)) return; | |||
| if (transmit_pin) transmit_assert(); | |||
| head = tx_buffer_head; | |||
| if (++head >= TX_BUFFER_SIZE) head = 0; | |||
| if (++head >= SERIAL5_TX_BUFFER_SIZE) head = 0; | |||
| while (tx_buffer_tail == head) { | |||
| int priority = nvic_execution_priority(); | |||
| if (priority <= IRQ_PRIORITY) { | |||
| if ((UART4_S1 & UART_S1_TDRE)) { | |||
| uint32_t tail = tx_buffer_tail; | |||
| if (++tail >= TX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL5_TX_BUFFER_SIZE) tail = 0; | |||
| n = tx_buffer[tail]; | |||
| if (use9Bits) UART4_C3 = (UART4_C3 & ~0x40) | ((n & 0x100) >> 2); | |||
| UART4_D = n; | |||
| @@ -260,7 +264,7 @@ int serial5_write_buffer_free(void) | |||
| head = tx_buffer_head; | |||
| tail = tx_buffer_tail; | |||
| if (head >= tail) return TX_BUFFER_SIZE - 1 - head + tail; | |||
| if (head >= tail) return SERIAL5_TX_BUFFER_SIZE - 1 - head + tail; | |||
| return tail - head - 1; | |||
| } | |||
| @@ -271,7 +275,7 @@ int serial5_available(void) | |||
| head = rx_buffer_head; | |||
| tail = rx_buffer_tail; | |||
| if (head >= tail) return head - tail; | |||
| return RX_BUFFER_SIZE + head - tail; | |||
| return SERIAL5_RX_BUFFER_SIZE + head - tail; | |||
| } | |||
| int serial5_getchar(void) | |||
| @@ -282,13 +286,13 @@ int serial5_getchar(void) | |||
| head = rx_buffer_head; | |||
| tail = rx_buffer_tail; | |||
| if (head == tail) return -1; | |||
| if (++tail >= RX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL5_RX_BUFFER_SIZE) tail = 0; | |||
| c = rx_buffer[tail]; | |||
| rx_buffer_tail = tail; | |||
| if (rts_pin) { | |||
| int avail; | |||
| if (head >= tail) avail = head - tail; | |||
| else avail = RX_BUFFER_SIZE + head - tail; | |||
| else avail = SERIAL5_RX_BUFFER_SIZE + head - tail; | |||
| if (avail <= RTS_LOW_WATERMARK) rts_assert(); | |||
| } | |||
| return c; | |||
| @@ -301,7 +305,7 @@ int serial5_peek(void) | |||
| head = rx_buffer_head; | |||
| tail = rx_buffer_tail; | |||
| if (head == tail) return -1; | |||
| if (++tail >= RX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL5_RX_BUFFER_SIZE) tail = 0; | |||
| return rx_buffer[tail]; | |||
| } | |||
| @@ -331,7 +335,7 @@ void uart4_status_isr(void) | |||
| n = UART4_D; | |||
| } | |||
| head = rx_buffer_head + 1; | |||
| if (head >= RX_BUFFER_SIZE) head = 0; | |||
| if (head >= SERIAL5_RX_BUFFER_SIZE) head = 0; | |||
| if (head != rx_buffer_tail) { | |||
| rx_buffer[head] = n; | |||
| rx_buffer_head = head; | |||
| @@ -340,7 +344,7 @@ void uart4_status_isr(void) | |||
| int avail; | |||
| tail = tx_buffer_tail; | |||
| if (head >= tail) avail = head - tail; | |||
| else avail = RX_BUFFER_SIZE + head - tail; | |||
| else avail = SERIAL5_RX_BUFFER_SIZE + head - tail; | |||
| if (avail >= RTS_HIGH_WATERMARK) rts_deassert(); | |||
| } | |||
| } | |||
| @@ -351,7 +355,7 @@ void uart4_status_isr(void) | |||
| if (head == tail) { | |||
| UART4_C2 = C2_TX_COMPLETING; | |||
| } else { | |||
| if (++tail >= TX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL5_TX_BUFFER_SIZE) tail = 0; | |||
| n = tx_buffer[tail]; | |||
| if (use9Bits) UART4_C3 = (UART4_C3 & ~0x40) | ((n & 0x100) >> 2); | |||
| UART4_D = n; | |||
| @@ -38,8 +38,12 @@ | |||
| // Tunable parameters (relatively safe to edit these numbers) | |||
| //////////////////////////////////////////////////////////////// | |||
| #define TX_BUFFER_SIZE 40 // number of outgoing bytes to buffer | |||
| #define RX_BUFFER_SIZE 64 // number of incoming bytes to buffer | |||
| #ifndef SERIAL6_TX_BUFFER_SIZE | |||
| #define SERIAL6_TX_BUFFER_SIZE 40 // number of outgoing bytes to buffer | |||
| #endif | |||
| #ifndef SERIAL6_RX_BUFFER_SIZE | |||
| #define SERIAL6_RX_BUFFER_SIZE 64 // number of incoming bytes to buffer | |||
| #endif | |||
| #define RTS_HIGH_WATERMARK 40 // RTS requests sender to pause | |||
| #define RTS_LOW_WATERMARK 26 // RTS allows sender to resume | |||
| #define IRQ_PRIORITY 64 // 0 = highest priority, 255 = lowest | |||
| @@ -57,8 +61,8 @@ static uint8_t use9Bits = 0; | |||
| #define use9Bits 0 | |||
| #endif | |||
| static volatile BUFTYPE tx_buffer[TX_BUFFER_SIZE]; | |||
| static volatile BUFTYPE rx_buffer[RX_BUFFER_SIZE]; | |||
| static volatile BUFTYPE tx_buffer[SERIAL6_TX_BUFFER_SIZE]; | |||
| static volatile BUFTYPE rx_buffer[SERIAL6_RX_BUFFER_SIZE]; | |||
| static volatile uint8_t transmitting = 0; | |||
| static volatile uint8_t *transmit_pin=NULL; | |||
| #define transmit_assert() *transmit_pin = 1 | |||
| @@ -66,14 +70,14 @@ static volatile uint8_t *transmit_pin=NULL; | |||
| static volatile uint8_t *rts_pin=NULL; | |||
| #define rts_assert() *rts_pin = 0 | |||
| #define rts_deassert() *rts_pin = 1 | |||
| #if TX_BUFFER_SIZE > 255 | |||
| #if SERIAL6_TX_BUFFER_SIZE > 255 | |||
| static volatile uint16_t tx_buffer_head = 0; | |||
| static volatile uint16_t tx_buffer_tail = 0; | |||
| #else | |||
| static volatile uint8_t tx_buffer_head = 0; | |||
| static volatile uint8_t tx_buffer_tail = 0; | |||
| #endif | |||
| #if RX_BUFFER_SIZE > 255 | |||
| #if SERIAL6_RX_BUFFER_SIZE > 255 | |||
| static volatile uint16_t rx_buffer_head = 0; | |||
| static volatile uint16_t rx_buffer_tail = 0; | |||
| #else | |||
| @@ -221,13 +225,13 @@ void serial6_putchar(uint32_t c) | |||
| if (!(SIM_SCGC1 & SIM_SCGC1_UART5)) return; | |||
| if (transmit_pin) transmit_assert(); | |||
| head = tx_buffer_head; | |||
| if (++head >= TX_BUFFER_SIZE) head = 0; | |||
| if (++head >= SERIAL6_TX_BUFFER_SIZE) head = 0; | |||
| while (tx_buffer_tail == head) { | |||
| int priority = nvic_execution_priority(); | |||
| if (priority <= IRQ_PRIORITY) { | |||
| if ((UART5_S1 & UART_S1_TDRE)) { | |||
| uint32_t tail = tx_buffer_tail; | |||
| if (++tail >= TX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL6_TX_BUFFER_SIZE) tail = 0; | |||
| n = tx_buffer[tail]; | |||
| if (use9Bits) UART5_C3 = (UART5_C3 & ~0x40) | ((n & 0x100) >> 2); | |||
| UART5_D = n; | |||
| @@ -260,7 +264,7 @@ int serial6_write_buffer_free(void) | |||
| head = tx_buffer_head; | |||
| tail = tx_buffer_tail; | |||
| if (head >= tail) return TX_BUFFER_SIZE - 1 - head + tail; | |||
| if (head >= tail) return SERIAL6_TX_BUFFER_SIZE - 1 - head + tail; | |||
| return tail - head - 1; | |||
| } | |||
| @@ -271,7 +275,7 @@ int serial6_available(void) | |||
| head = rx_buffer_head; | |||
| tail = rx_buffer_tail; | |||
| if (head >= tail) return head - tail; | |||
| return RX_BUFFER_SIZE + head - tail; | |||
| return SERIAL6_RX_BUFFER_SIZE + head - tail; | |||
| } | |||
| int serial6_getchar(void) | |||
| @@ -282,13 +286,13 @@ int serial6_getchar(void) | |||
| head = rx_buffer_head; | |||
| tail = rx_buffer_tail; | |||
| if (head == tail) return -1; | |||
| if (++tail >= RX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL6_RX_BUFFER_SIZE) tail = 0; | |||
| c = rx_buffer[tail]; | |||
| rx_buffer_tail = tail; | |||
| if (rts_pin) { | |||
| int avail; | |||
| if (head >= tail) avail = head - tail; | |||
| else avail = RX_BUFFER_SIZE + head - tail; | |||
| else avail = SERIAL6_RX_BUFFER_SIZE + head - tail; | |||
| if (avail <= RTS_LOW_WATERMARK) rts_assert(); | |||
| } | |||
| return c; | |||
| @@ -301,7 +305,7 @@ int serial6_peek(void) | |||
| head = rx_buffer_head; | |||
| tail = rx_buffer_tail; | |||
| if (head == tail) return -1; | |||
| if (++tail >= RX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL6_RX_BUFFER_SIZE) tail = 0; | |||
| return rx_buffer[tail]; | |||
| } | |||
| @@ -331,7 +335,7 @@ void uart5_status_isr(void) | |||
| n = UART5_D; | |||
| } | |||
| head = rx_buffer_head + 1; | |||
| if (head >= RX_BUFFER_SIZE) head = 0; | |||
| if (head >= SERIAL6_RX_BUFFER_SIZE) head = 0; | |||
| if (head != rx_buffer_tail) { | |||
| rx_buffer[head] = n; | |||
| rx_buffer_head = head; | |||
| @@ -340,7 +344,7 @@ void uart5_status_isr(void) | |||
| int avail; | |||
| tail = tx_buffer_tail; | |||
| if (head >= tail) avail = head - tail; | |||
| else avail = RX_BUFFER_SIZE + head - tail; | |||
| else avail = SERIAL6_RX_BUFFER_SIZE + head - tail; | |||
| if (avail >= RTS_HIGH_WATERMARK) rts_deassert(); | |||
| } | |||
| } | |||
| @@ -351,7 +355,7 @@ void uart5_status_isr(void) | |||
| if (head == tail) { | |||
| UART5_C2 = C2_TX_COMPLETING; | |||
| } else { | |||
| if (++tail >= TX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL6_TX_BUFFER_SIZE) tail = 0; | |||
| n = tx_buffer[tail]; | |||
| if (use9Bits) UART5_C3 = (UART5_C3 & ~0x40) | ((n & 0x100) >> 2); | |||
| UART5_D = n; | |||
| @@ -46,8 +46,12 @@ | |||
| // Tunable parameters (relatively safe to edit these numbers) | |||
| //////////////////////////////////////////////////////////////// | |||
| #define TX_BUFFER_SIZE 40 // number of outgoing bytes to buffer | |||
| #define RX_BUFFER_SIZE 64 // number of incoming bytes to buffer | |||
| #ifndef SERIAL6_TX_BUFFER_SIZE | |||
| #define SERIAL6_TX_BUFFER_SIZE 40 // number of outgoing bytes to buffer | |||
| #endif | |||
| #ifndef SERIAL6_RX_BUFFER_SIZE | |||
| #define SERIAL6_RX_BUFFER_SIZE 64 // number of incoming bytes to buffer | |||
| #endif | |||
| #define RTS_HIGH_WATERMARK 40 // RTS requests sender to pause | |||
| #define RTS_LOW_WATERMARK 26 // RTS allows sender to resume | |||
| #define IRQ_PRIORITY 64 // 0 = highest priority, 255 = lowest | |||
| @@ -65,8 +69,8 @@ static uint8_t use9Bits = 0; | |||
| #define use9Bits 0 | |||
| #endif | |||
| static volatile BUFTYPE tx_buffer[TX_BUFFER_SIZE]; | |||
| static volatile BUFTYPE rx_buffer[RX_BUFFER_SIZE]; | |||
| static volatile BUFTYPE tx_buffer[SERIAL6_TX_BUFFER_SIZE]; | |||
| static volatile BUFTYPE rx_buffer[SERIAL6_RX_BUFFER_SIZE]; | |||
| static volatile uint8_t transmitting = 0; | |||
| static volatile uint8_t *transmit_pin=NULL; | |||
| #define transmit_assert() *transmit_pin = 1 | |||
| @@ -74,14 +78,14 @@ static volatile uint8_t *transmit_pin=NULL; | |||
| static volatile uint8_t *rts_pin=NULL; | |||
| #define rts_assert() *rts_pin = 0 | |||
| #define rts_deassert() *rts_pin = 1 | |||
| #if TX_BUFFER_SIZE > 255 | |||
| #if SERIAL6_TX_BUFFER_SIZE > 255 | |||
| static volatile uint16_t tx_buffer_head = 0; | |||
| static volatile uint16_t tx_buffer_tail = 0; | |||
| #else | |||
| static volatile uint8_t tx_buffer_head = 0; | |||
| static volatile uint8_t tx_buffer_tail = 0; | |||
| #endif | |||
| #if RX_BUFFER_SIZE > 255 | |||
| #if SERIAL6_RX_BUFFER_SIZE > 255 | |||
| static volatile uint16_t rx_buffer_head = 0; | |||
| static volatile uint16_t rx_buffer_tail = 0; | |||
| #else | |||
| @@ -304,13 +308,13 @@ void serial6_putchar(uint32_t c) | |||
| if (!(SIM_SCGC2 & SIM_SCGC2_LPUART0)) return; | |||
| if (transmit_pin) transmit_assert(); | |||
| head = tx_buffer_head; | |||
| if (++head >= TX_BUFFER_SIZE) head = 0; | |||
| if (++head >= SERIAL6_TX_BUFFER_SIZE) head = 0; | |||
| while (tx_buffer_tail == head) { | |||
| int priority = nvic_execution_priority(); | |||
| if (priority <= IRQ_PRIORITY) { | |||
| if ((LPUART0_STAT & LPUART_STAT_TDRE)) { | |||
| uint32_t tail = tx_buffer_tail; | |||
| if (++tail >= TX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL6_TX_BUFFER_SIZE) tail = 0; | |||
| n = tx_buffer[tail]; | |||
| //if (use9Bits) UART5_C3 = (UART5_C3 & ~0x40) | ((n & 0x100) >> 2); | |||
| LPUART0_DATA = n; | |||
| @@ -346,7 +350,7 @@ int serial6_write_buffer_free(void) | |||
| head = tx_buffer_head; | |||
| tail = tx_buffer_tail; | |||
| if (head >= tail) return TX_BUFFER_SIZE - 1 - head + tail; | |||
| if (head >= tail) return SERIAL6_TX_BUFFER_SIZE - 1 - head + tail; | |||
| return tail - head - 1; | |||
| } | |||
| @@ -357,7 +361,7 @@ int serial6_available(void) | |||
| head = rx_buffer_head; | |||
| tail = rx_buffer_tail; | |||
| if (head >= tail) return head - tail; | |||
| return RX_BUFFER_SIZE + head - tail; | |||
| return SERIAL6_RX_BUFFER_SIZE + head - tail; | |||
| } | |||
| int serial6_getchar(void) | |||
| @@ -368,13 +372,13 @@ int serial6_getchar(void) | |||
| head = rx_buffer_head; | |||
| tail = rx_buffer_tail; | |||
| if (head == tail) return -1; | |||
| if (++tail >= RX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL6_RX_BUFFER_SIZE) tail = 0; | |||
| c = rx_buffer[tail]; | |||
| rx_buffer_tail = tail; | |||
| if (rts_pin) { | |||
| int avail; | |||
| if (head >= tail) avail = head - tail; | |||
| else avail = RX_BUFFER_SIZE + head - tail; | |||
| else avail = SERIAL6_RX_BUFFER_SIZE + head - tail; | |||
| if (avail <= RTS_LOW_WATERMARK) rts_assert(); | |||
| } | |||
| return c; | |||
| @@ -387,7 +391,7 @@ int serial6_peek(void) | |||
| head = rx_buffer_head; | |||
| tail = rx_buffer_tail; | |||
| if (head == tail) return -1; | |||
| if (++tail >= RX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL6_RX_BUFFER_SIZE) tail = 0; | |||
| return rx_buffer[tail]; | |||
| } | |||
| @@ -418,7 +422,7 @@ void lpuart0_status_isr(void) | |||
| // } | |||
| n = LPUART0_DATA & 0x3ff; // use only the 10 data bits | |||
| head = rx_buffer_head + 1; | |||
| if (head >= RX_BUFFER_SIZE) head = 0; | |||
| if (head >= SERIAL6_RX_BUFFER_SIZE) head = 0; | |||
| if (head != rx_buffer_tail) { | |||
| rx_buffer[head] = n; | |||
| rx_buffer_head = head; | |||
| @@ -427,7 +431,7 @@ void lpuart0_status_isr(void) | |||
| int avail; | |||
| tail = tx_buffer_tail; | |||
| if (head >= tail) avail = head - tail; | |||
| else avail = RX_BUFFER_SIZE + head - tail; | |||
| else avail = SERIAL6_RX_BUFFER_SIZE + head - tail; | |||
| if (avail >= RTS_HIGH_WATERMARK) rts_deassert(); | |||
| } | |||
| } | |||
| @@ -441,7 +445,7 @@ void lpuart0_status_isr(void) | |||
| //LPUART0_CTRL &= ~LPUART_CTRL_TIE; | |||
| //LPUART0_CTRL |= LPUART_CTRL_TCIE; // Actually wondering if we can just leave this one on... | |||
| } else { | |||
| if (++tail >= TX_BUFFER_SIZE) tail = 0; | |||
| if (++tail >= SERIAL6_TX_BUFFER_SIZE) tail = 0; | |||
| n = tx_buffer[tail]; | |||
| //if (use9Bits) UART5_C3 = (UART5_C3 & ~0x40) | ((n & 0x100) >> 2); | |||
| LPUART0_DATA = n; | |||