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Merge pull request #205 from thewknd/serial-fix

fix serial5_set_tx and serial6_set_tx
teensy4-core
Paul Stoffregen 8 년 전
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c020d5e5c7
3개의 변경된 파일8개의 추가작업 그리고 8개의 파일을 삭제
  1. +2
    -2
      teensy3/serial5.c
  2. +2
    -2
      teensy3/serial6.c
  3. +4
    -4
      teensy3/serial6_lpuart.c

+ 2
- 2
teensy3/serial5.c 파일 보기

static volatile uint8_t rx_buffer_tail = 0; static volatile uint8_t rx_buffer_tail = 0;
#endif #endif


static uint8_t tx_pin_num = 34;
static uint8_t tx_pin_num = 33;


// UART0 and UART1 are clocked by F_CPU, UART2 is clocked by F_BUS // UART0 and UART1 are clocked by F_CPU, UART2 is clocked by F_BUS
// UART0 has 8 byte fifo, UART1 and UART2 have 1 byte buffer // UART0 has 8 byte fifo, UART1 and UART2 have 1 byte buffer


if (opendrain) pin |= 128; if (opendrain) pin |= 128;
if (pin == tx_pin_num) return; if (pin == tx_pin_num) return;
if ((SIM_SCGC4 & SIM_SCGC4_UART2)) {
if ((SIM_SCGC1 & SIM_SCGC1_UART4)) {
switch (tx_pin_num & 127) { switch (tx_pin_num & 127) {
case 33: CORE_PIN33_CONFIG = 0; break; // PTE24 case 33: CORE_PIN33_CONFIG = 0; break; // PTE24
} }

+ 2
- 2
teensy3/serial6.c 파일 보기

static volatile uint8_t rx_buffer_tail = 0; static volatile uint8_t rx_buffer_tail = 0;
#endif #endif


static uint8_t tx_pin_num = 34;
static uint8_t tx_pin_num = 48;


// UART0 and UART1 are clocked by F_CPU, UART2 is clocked by F_BUS // UART0 and UART1 are clocked by F_CPU, UART2 is clocked by F_BUS
// UART0 has 8 byte fifo, UART1 and UART2 have 1 byte buffer // UART0 has 8 byte fifo, UART1 and UART2 have 1 byte buffer


if (opendrain) pin |= 128; if (opendrain) pin |= 128;
if (pin == tx_pin_num) return; if (pin == tx_pin_num) return;
if ((SIM_SCGC4 & SIM_SCGC4_UART2)) {
if ((SIM_SCGC1 |= SIM_SCGC1_UART5)) {
switch (tx_pin_num & 127) { switch (tx_pin_num & 127) {
case 48: CORE_PIN48_CONFIG = 0; break; // PTE24 case 48: CORE_PIN48_CONFIG = 0; break; // PTE24
} }

+ 4
- 4
teensy3/serial6_lpuart.c 파일 보기

static volatile uint8_t rx_buffer_tail = 0; static volatile uint8_t rx_buffer_tail = 0;
#endif #endif


static uint8_t tx_pin_num = 34;
static uint8_t tx_pin_num = 48;


// UART0 and UART1 are clocked by F_CPU, UART2 is clocked by F_BUS // UART0 and UART1 are clocked by F_CPU, UART2 is clocked by F_BUS
// UART0 has 8 byte fifo, UART1 and UART2 have 1 byte buffer // UART0 has 8 byte fifo, UART1 and UART2 have 1 byte buffer


if (opendrain) pin |= 128; if (opendrain) pin |= 128;
if (pin == tx_pin_num) return; if (pin == tx_pin_num) return;
if ((SIM_SCGC4 & SIM_SCGC4_UART2)) {
if ((SIM_SCGC2 & SIM_SCGC2_LPUART0)) {
switch (tx_pin_num & 127) { switch (tx_pin_num & 127) {
case 48: CORE_PIN48_CONFIG = 0; break; // PTE24 case 48: CORE_PIN48_CONFIG = 0; break; // PTE24
} }
cfg = PORT_PCR_DSE | PORT_PCR_SRE; cfg = PORT_PCR_DSE | PORT_PCR_SRE;
} }
switch (pin & 127) { switch (pin & 127) {
case 48: CORE_PIN48_CONFIG = cfg | PORT_PCR_MUX(3); break;
case 48: CORE_PIN48_CONFIG = cfg | PORT_PCR_MUX(5); break;
} }
} }
tx_pin_num = pin; tx_pin_num = pin;
{ {
if (!(SIM_SCGC2 & SIM_SCGC2_LPUART0)) return 0; if (!(SIM_SCGC2 & SIM_SCGC2_LPUART0)) return 0;
if (pin == 56) { if (pin == 56) {
CORE_PIN56_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_PE; // weak pulldown
CORE_PIN56_CONFIG = PORT_PCR_MUX(5) | PORT_PCR_PE; // weak pulldown
} else { } else {
UART5_MODEM &= ~UART_MODEM_TXCTSE; UART5_MODEM &= ~UART_MODEM_TXCTSE;
return 0; return 0;

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