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Merge pull request #169 from KurtE/T3.5-Serial6-Fix

Fix Serial6 for Teensy 3.5
teensy4-core
Paul Stoffregen 8 years ago
parent
commit
cc1641263d
2 changed files with 8 additions and 7 deletions
  1. +1
    -0
      teensy3/kinetis.h
  2. +7
    -7
      teensy3/serial6.c

+ 1
- 0
teensy3/kinetis.h View File

#define SIM_SOPT9_TPM1CH0SRC(n) (uint32_t)(((n) & 3) << 18) // TPM1 channel 0 input capture source select #define SIM_SOPT9_TPM1CH0SRC(n) (uint32_t)(((n) & 3) << 18) // TPM1 channel 0 input capture source select
#define SIM_SDID (*(const uint32_t *)0x40048024) // System Device Identification Register #define SIM_SDID (*(const uint32_t *)0x40048024) // System Device Identification Register
#define SIM_SCGC1 (*(volatile uint32_t *)0x40048028) // System Clock Gating Control Register 1 #define SIM_SCGC1 (*(volatile uint32_t *)0x40048028) // System Clock Gating Control Register 1
#define SIM_SCGC1_UART5 ((uint32_t)0x00000800) // UART5 Clock Gate Control
#define SIM_SCGC1_UART4 ((uint32_t)0x00000400) // UART4 Clock Gate Control #define SIM_SCGC1_UART4 ((uint32_t)0x00000400) // UART4 Clock Gate Control
#define SIM_SCGC1_I2C3 ((uint32_t)0x00000080) // I2C3 Clock Gate Control #define SIM_SCGC1_I2C3 ((uint32_t)0x00000080) // I2C3 Clock Gate Control
#define SIM_SCGC1_I2C2 ((uint32_t)0x00000040) // I2C2 Clock Gate Control #define SIM_SCGC1_I2C2 ((uint32_t)0x00000040) // I2C2 Clock Gate Control

+ 7
- 7
teensy3/serial6.c View File



void serial6_begin(uint32_t divisor) void serial6_begin(uint32_t divisor)
{ {
SIM_SCGC1 |= SIM_SCGC1_UART4; // turn on clock, TODO: use bitband
SIM_SCGC1 |= SIM_SCGC1_UART5; // turn on clock, TODO: use bitband
rx_buffer_head = 0; rx_buffer_head = 0;
rx_buffer_tail = 0; rx_buffer_tail = 0;
tx_buffer_head = 0; tx_buffer_head = 0;


void serial6_end(void) void serial6_end(void)
{ {
if (!(SIM_SCGC1 & SIM_SCGC1_UART4)) return;
if (!(SIM_SCGC1 & SIM_SCGC1_UART5)) return;
while (transmitting) yield(); // wait for buffered data to send while (transmitting) yield(); // wait for buffered data to send
NVIC_DISABLE_IRQ(IRQ_UART5_STATUS); NVIC_DISABLE_IRQ(IRQ_UART5_STATUS);
UART5_C2 = 0; UART5_C2 = 0;


int serial6_set_rts(uint8_t pin) int serial6_set_rts(uint8_t pin)
{ {
if (!(SIM_SCGC1 & SIM_SCGC1_UART4)) return 0;
if (!(SIM_SCGC1 & SIM_SCGC1_UART5)) return 0;
if (pin < CORE_NUM_DIGITAL) { if (pin < CORE_NUM_DIGITAL) {
rts_pin = portOutputRegister(pin); rts_pin = portOutputRegister(pin);
pinMode(pin, OUTPUT); pinMode(pin, OUTPUT);


int serial6_set_cts(uint8_t pin) int serial6_set_cts(uint8_t pin)
{ {
if (!(SIM_SCGC1 & SIM_SCGC1_UART4)) return 0;
if (!(SIM_SCGC1 & SIM_SCGC1_UART5)) return 0;
if (pin == 56) { if (pin == 56) {
CORE_PIN56_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_PE; // weak pulldown CORE_PIN56_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_PE; // weak pulldown
} else { } else {
{ {
uint32_t head, n; uint32_t head, n;


if (!(SIM_SCGC1 & SIM_SCGC1_UART4)) return;
if (!(SIM_SCGC1 & SIM_SCGC1_UART5)) return;
if (transmit_pin) transmit_assert(); if (transmit_pin) transmit_assert();
head = tx_buffer_head; head = tx_buffer_head;
if (++head >= TX_BUFFER_SIZE) head = 0; if (++head >= TX_BUFFER_SIZE) head = 0;
// LIN break detect UART_S2_LBKDIF // LIN break detect UART_S2_LBKDIF
// RxD pin active edge UART_S2_RXEDGIF // RxD pin active edge UART_S2_RXEDGIF


void UART5_status_isr(void)
void uart5_status_isr(void)
{ {
uint32_t head, tail, n; uint32_t head, tail, n;
uint8_t c; uint8_t c;
} }
} }


#endif // HAS_KINETISK_UART4
#endif // HAS_KINETISK_UART5

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