@@ -6,13 +6,6 @@ extern void ResetHandler(void); | |||
extern unsigned long _estack; | |||
extern unsigned long _flashimagelen; | |||
__attribute__ ((section(".vectors"), used)) | |||
const uint32_t vector_table[2] = { | |||
#if defined(__IMXRT1062__) | |||
0x20010000, // 64K DTCM for boot, ResetHandler configures stack after ITCM/DTCM setup | |||
#endif | |||
(uint32_t)&ResetHandler | |||
}; | |||
__attribute__ ((section(".bootdata"), used)) | |||
@@ -23,21 +16,19 @@ const uint32_t BootData[3] = { | |||
}; | |||
__attribute__ ((section(".bootdata"), used)) | |||
const uint32_t DCDData[1] = { | |||
0x410400D2 // header | |||
}; | |||
__attribute__ ((section(".csf"), used)) | |||
const uint32_t hab_csf[768]; // placeholder for HAB signature | |||
__attribute__ ((section(".ivt"), used)) | |||
const uint32_t ImageVectorTable[8] = { | |||
0x402000D1, // header | |||
(uint32_t)vector_table, // docs are wrong, needs to be vec table, not start addr | |||
0x432000D1, // header | |||
(uint32_t)&ResetHandler,// program entry | |||
0, // reserved | |||
(uint32_t)DCDData, // dcd | |||
0, // dcd | |||
(uint32_t)BootData, // abs address of boot data | |||
(uint32_t)ImageVectorTable, // self | |||
0, // command sequence file | |||
(uint32_t)hab_csf, // command sequence file | |||
0 // reserved | |||
}; | |||
@@ -16,7 +16,6 @@ SECTIONS | |||
. = ORIGIN(FLASH) + 0x1000; | |||
KEEP(*(.ivt)) | |||
KEEP(*(.bootdata)) | |||
KEEP(*(.vectors)) | |||
KEEP(*(.startup)) | |||
*(.flashmem*) | |||
*(.progmem*) | |||
@@ -51,7 +50,6 @@ SECTIONS | |||
.data : { | |||
*(.rodata*) | |||
*(.data*) | |||
. = ALIGN(16); | |||
} > DTCM AT> FLASH | |||
.bss ALIGN(4) : { | |||
@@ -66,6 +64,12 @@ SECTIONS | |||
. = ALIGN(32); | |||
} > RAM | |||
.text.csf : { | |||
FILL(0xFF) | |||
. = ALIGN(4); | |||
KEEP(*(.csf)) | |||
} > FLASH | |||
_stext = ADDR(.text.itcm); | |||
_etext = ADDR(.text.itcm) + SIZEOF(.text.itcm) + SIZEOF(.ARM.exidx); | |||
_stextload = LOADADDR(.text.itcm); | |||
@@ -84,7 +88,7 @@ SECTIONS | |||
_flexram_bank_config = 0xAAAAAAAA | ((1 << (_itcm_block_count * 2)) - 1); | |||
_estack = ORIGIN(DTCM) + ((16 - _itcm_block_count) << 15); | |||
_flashimagelen = SIZEOF(.text.progmem) + SIZEOF(.text.itcm) + SIZEOF(.ARM.exidx) + SIZEOF(.data); | |||
_flashimagelen = SIZEOF(.text.progmem) + SIZEOF(.text.itcm) + SIZEOF(.ARM.exidx) + SIZEOF(.data) + SIZEOF(.text.csf); | |||
_teensy_model_identifier = 0x24; | |||
.debug_info 0 : { *(.debug_info) } |
@@ -2,7 +2,7 @@ MEMORY | |||
{ | |||
ITCM (rwx): ORIGIN = 0x00000000, LENGTH = 512K | |||
DTCM (rwx): ORIGIN = 0x20000000, LENGTH = 512K | |||
RAM (rwx): ORIGIN = 0x20200000, LENGTH = 512K | |||
RAM (rwx): ORIGIN = 0x20202000, LENGTH = 504K | |||
FLASH (rwx): ORIGIN = 0x60000000, LENGTH = 7936K | |||
ERAM (rwx): ORIGIN = 0x70000000, LENGTH = 16384K | |||
} | |||
@@ -17,7 +17,6 @@ SECTIONS | |||
. = ORIGIN(FLASH) + 0x1000; | |||
KEEP(*(.ivt)) | |||
KEEP(*(.bootdata)) | |||
KEEP(*(.vectors)) | |||
KEEP(*(.startup)) | |||
*(.flashmem*) | |||
*(.progmem*) | |||
@@ -52,7 +51,6 @@ SECTIONS | |||
.data : { | |||
*(.rodata*) | |||
*(.data*) | |||
. = ALIGN(16); | |||
} > DTCM AT> FLASH | |||
.bss ALIGN(4) : { | |||
@@ -71,6 +69,12 @@ SECTIONS | |||
*(.externalram) | |||
} > ERAM | |||
.text.csf : { | |||
FILL(0xFF) | |||
. = ALIGN(4); | |||
KEEP(*(.csf)) | |||
} > FLASH | |||
_stext = ADDR(.text.itcm); | |||
_etext = ADDR(.text.itcm) + SIZEOF(.text.itcm) + SIZEOF(.ARM.exidx); | |||
_stextload = LOADADDR(.text.itcm); | |||
@@ -89,7 +93,7 @@ SECTIONS | |||
_flexram_bank_config = 0xAAAAAAAA | ((1 << (_itcm_block_count * 2)) - 1); | |||
_estack = ORIGIN(DTCM) + ((16 - _itcm_block_count) << 15); | |||
_flashimagelen = SIZEOF(.text.progmem) + SIZEOF(.text.itcm) + SIZEOF(.ARM.exidx) + SIZEOF(.data); | |||
_flashimagelen = SIZEOF(.text.progmem) + SIZEOF(.text.itcm) + SIZEOF(.ARM.exidx) + SIZEOF(.data) + SIZEOF(.text.csf); | |||
_teensy_model_identifier = 0x25; | |||
.debug_info 0 : { *(.debug_info) } |