Add Serial4 & Serial5 for K64 & K66

keywords.txt

 PROGMEM	LITERAL2
 DMAMEM	LITERAL2
 FASTRUN	LITERAL2
+Serial4	KEYWORD1
+Serial5	KEYWORD1
+Serial6	KEYWORD1
+setRX	KEYWORD2
+setTX	KEYWORD2
+write9bit	KEYWORD2
+clear	KEYWORD2
 
 # removed by Arduino 1.0, but still in Teensyduino
 BYTE	LITERAL2

teensy3/HardwareSerial.h

 int serial3_peek(void);
 void serial3_clear(void);
 
+void serial4_begin(uint32_t divisor);
+void serial4_format(uint32_t format);
+void serial4_end(void);
+void serial4_set_transmit_pin(uint8_t pin);
+void serial4_set_rx(uint8_t pin);
+void serial4_set_tx(uint8_t pin, uint8_t opendrain);
+int serial4_set_rts(uint8_t pin);
+int serial4_set_cts(uint8_t pin);
+void serial4_putchar(uint32_t c);
+void serial4_write(const void *buf, unsigned int count);
+void serial4_flush(void);
+int serial4_write_buffer_free(void);
+int serial4_available(void);
+int serial4_getchar(void);
+int serial4_peek(void);
+void serial4_clear(void);
+
+void serial5_begin(uint32_t divisor);
+void serial5_format(uint32_t format);
+void serial5_end(void);
+void serial5_set_transmit_pin(uint8_t pin);
+void serial5_set_rx(uint8_t pin);
+void serial5_set_tx(uint8_t pin, uint8_t opendrain);
+int serial5_set_rts(uint8_t pin);
+int serial5_set_cts(uint8_t pin);
+void serial5_putchar(uint32_t c);
+void serial5_write(const void *buf, unsigned int count);
+void serial5_flush(void);
+int serial5_write_buffer_free(void);
+int serial5_available(void);
+int serial5_getchar(void);
+int serial5_peek(void);
+void serial5_clear(void);
+
+void serial6_begin(uint32_t divisor);
+void serial6_format(uint32_t format);
+void serial6_end(void);
+void serial6_set_transmit_pin(uint8_t pin);
+void serial6_set_rx(uint8_t pin);
+void serial6_set_tx(uint8_t pin, uint8_t opendrain);
+int serial6_set_rts(uint8_t pin);
+int serial6_set_cts(uint8_t pin);
+void serial6_putchar(uint32_t c);
+void serial6_write(const void *buf, unsigned int count);
+void serial6_flush(void);
+int serial6_write_buffer_free(void);
+int serial6_available(void);
+int serial6_getchar(void);
+int serial6_peek(void);
+void serial6_clear(void);
+
 #ifdef __cplusplus
 }
 #endif
 extern HardwareSerial3 Serial3;
 extern void serialEvent3(void);
 
+class HardwareSerial4 : public HardwareSerial
+{
+public:
+	virtual void begin(uint32_t baud) { serial4_begin(BAUD2DIV3(baud)); }
+	virtual void begin(uint32_t baud, uint32_t format) {
+					  serial4_begin(BAUD2DIV3(baud));
+					  serial4_format(format); }
+	virtual void end(void)          { serial4_end(); }
+	virtual void transmitterEnable(uint8_t pin) { serial4_set_transmit_pin(pin); }
+	virtual void setRX(uint8_t pin) { serial4_set_rx(pin); }
+	virtual void setTX(uint8_t pin, bool opendrain=false) { serial4_set_tx(pin, opendrain); }
+	virtual bool attachRts(uint8_t pin) { return serial4_set_rts(pin); }
+	virtual bool attachCts(uint8_t pin) { return serial4_set_cts(pin); }
+	virtual int available(void)     { return serial4_available(); }
+	virtual int peek(void)          { return serial4_peek(); }
+	virtual int read(void)          { return serial4_getchar(); }
+	virtual void flush(void)        { serial4_flush(); }
+	virtual void clear(void)	{ serial4_clear(); }
+	virtual int availableForWrite(void) { return serial4_write_buffer_free(); }
+	virtual size_t write(uint8_t c) { serial4_putchar(c); return 1; }
+	virtual size_t write(unsigned long n)   { return write((uint8_t)n); }
+	virtual size_t write(long n)            { return write((uint8_t)n); }
+	virtual size_t write(unsigned int n)    { return write((uint8_t)n); }
+	virtual size_t write(int n)             { return write((uint8_t)n); }
+	virtual size_t write(const uint8_t *buffer, size_t size)
+					{ serial4_write(buffer, size); return size; }
+        virtual size_t write(const char *str)	{ size_t len = strlen(str);
+					  serial4_write((const uint8_t *)str, len);
+					  return len; }
+	virtual size_t write9bit(uint32_t c)	{ serial4_putchar(c); return 1; }
+	operator bool()			{ return true; }
+};
+extern HardwareSerial4 Serial4;
+extern void serialEvent4(void);
+
+class HardwareSerial5 : public HardwareSerial
+{
+public:
+	virtual void begin(uint32_t baud) { serial5_begin(BAUD2DIV3(baud)); }
+	virtual void begin(uint32_t baud, uint32_t format) {
+					  serial5_begin(BAUD2DIV3(baud));
+					  serial5_format(format); }
+	virtual void end(void)          { serial5_end(); }
+	virtual void transmitterEnable(uint8_t pin) { serial5_set_transmit_pin(pin); }
+	virtual void setRX(uint8_t pin) { serial5_set_rx(pin); }
+	virtual void setTX(uint8_t pin, bool opendrain=false) { serial5_set_tx(pin, opendrain); }
+	virtual bool attachRts(uint8_t pin) { return serial5_set_rts(pin); }
+	virtual bool attachCts(uint8_t pin) { return serial5_set_cts(pin); }
+	virtual int available(void)     { return serial5_available(); }
+	virtual int peek(void)          { return serial5_peek(); }
+	virtual int read(void)          { return serial5_getchar(); }
+	virtual void flush(void)        { serial5_flush(); }
+	virtual void clear(void)	{ serial5_clear(); }
+	virtual int availableForWrite(void) { return serial5_write_buffer_free(); }
+	virtual size_t write(uint8_t c) { serial5_putchar(c); return 1; }
+	virtual size_t write(unsigned long n)   { return write((uint8_t)n); }
+	virtual size_t write(long n)            { return write((uint8_t)n); }
+	virtual size_t write(unsigned int n)    { return write((uint8_t)n); }
+	virtual size_t write(int n)             { return write((uint8_t)n); }
+	virtual size_t write(const uint8_t *buffer, size_t size)
+					{ serial5_write(buffer, size); return size; }
+        virtual size_t write(const char *str)	{ size_t len = strlen(str);
+					  serial5_write((const uint8_t *)str, len);
+					  return len; }
+	virtual size_t write9bit(uint32_t c)	{ serial5_putchar(c); return 1; }
+	operator bool()			{ return true; }
+};
+extern HardwareSerial5 Serial5;
+extern void serialEvent5(void);
+
+class HardwareSerial6 : public HardwareSerial
+{
+public:
+	virtual void begin(uint32_t baud) { serial6_begin(BAUD2DIV3(baud)); }
+	virtual void begin(uint32_t baud, uint32_t format) {
+					  serial6_begin(BAUD2DIV3(baud));
+					  serial6_format(format); }
+	virtual void end(void)          { serial6_end(); }
+	virtual void transmitterEnable(uint8_t pin) { serial6_set_transmit_pin(pin); }
+	virtual void setRX(uint8_t pin) { serial6_set_rx(pin); }
+	virtual void setTX(uint8_t pin, bool opendrain=false) { serial6_set_tx(pin, opendrain); }
+	virtual bool attachRts(uint8_t pin) { return serial6_set_rts(pin); }
+	virtual bool attachCts(uint8_t pin) { return serial6_set_cts(pin); }
+	virtual int available(void)     { return serial6_available(); }
+	virtual int peek(void)          { return serial6_peek(); }
+	virtual int read(void)          { return serial6_getchar(); }
+	virtual void flush(void)        { serial6_flush(); }
+	virtual void clear(void)	{ serial6_clear(); }
+	virtual int availableForWrite(void) { return serial6_write_buffer_free(); }
+	virtual size_t write(uint8_t c) { serial6_putchar(c); return 1; }
+	virtual size_t write(unsigned long n)   { return write((uint8_t)n); }
+	virtual size_t write(long n)            { return write((uint8_t)n); }
+	virtual size_t write(unsigned int n)    { return write((uint8_t)n); }
+	virtual size_t write(int n)             { return write((uint8_t)n); }
+	virtual size_t write(const uint8_t *buffer, size_t size)
+					{ serial6_write(buffer, size); return size; }
+        virtual size_t write(const char *str)	{ size_t len = strlen(str);
+					  serial6_write((const uint8_t *)str, len);
+					  return len; }
+	virtual size_t write9bit(uint32_t c)	{ serial6_putchar(c); return 1; }
+	operator bool()			{ return true; }
+};
+extern HardwareSerial6 Serial6;
+extern void serialEvent6(void);
+
+
+
+
 #endif
 #endif

teensy3/HardwareSerial4.cpp

+#include "HardwareSerial.h"
+
+#ifdef HAS_KINETISK_UART3
+
+HardwareSerial4 Serial4;
+
+void serialEvent4() __attribute__((weak));
+void serialEvent4() {}
+
+#endif

teensy3/HardwareSerial5.cpp

+#include "HardwareSerial.h"
+
+#ifdef HAS_KINETISK_UART4
+
+HardwareSerial5 Serial5;
+
+void serialEvent5() __attribute__((weak));
+void serialEvent5() {}
+
+#endif

teensy3/serial4.c

+/* Teensyduino Core Library
+ * http://www.pjrc.com/teensy/
+ * Copyright (c) 2013 PJRC.COM, LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * 1. The above copyright notice and this permission notice shall be 
+ * included in all copies or substantial portions of the Software.
+ *
+ * 2. If the Software is incorporated into a build system that allows 
+ * selection among a list of target devices, then similar target
+ * devices manufactured by PJRC.COM must be included in the list of
+ * target devices and selectable in the same manner.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include "kinetis.h"
+#include "core_pins.h"
+#include "HardwareSerial.h"
+
+#ifdef HAS_KINETISK_UART3
+
+////////////////////////////////////////////////////////////////
+// Tunable parameters (relatively safe to edit these numbers)
+////////////////////////////////////////////////////////////////
+
+#define TX_BUFFER_SIZE     40 // number of outgoing bytes to buffer
+#define RX_BUFFER_SIZE     64 // number of incoming bytes to buffer
+#define RTS_HIGH_WATERMARK 40 // RTS requests sender to pause
+#define RTS_LOW_WATERMARK  26 // RTS allows sender to resume
+#define IRQ_PRIORITY  64  // 0 = highest priority, 255 = lowest
+
+
+////////////////////////////////////////////////////////////////
+// changes not recommended below this point....
+////////////////////////////////////////////////////////////////
+
+#ifdef SERIAL_9BIT_SUPPORT
+static uint8_t use9Bits = 0;
+#define BUFTYPE uint16_t
+#else
+#define BUFTYPE uint8_t
+#define use9Bits 0
+#endif
+
+static volatile BUFTYPE tx_buffer[TX_BUFFER_SIZE];
+static volatile BUFTYPE rx_buffer[RX_BUFFER_SIZE];
+static volatile uint8_t transmitting = 0;
+static volatile uint8_t *transmit_pin=NULL;
+#define transmit_assert()   *transmit_pin = 1
+#define transmit_deassert() *transmit_pin = 0
+static volatile uint8_t *rts_pin=NULL;
+#define rts_assert()        *rts_pin = 0
+#define rts_deassert()      *rts_pin = 1
+#if TX_BUFFER_SIZE > 255
+static volatile uint16_t tx_buffer_head = 0;
+static volatile uint16_t tx_buffer_tail = 0;
+#else
+static volatile uint8_t tx_buffer_head = 0;
+static volatile uint8_t tx_buffer_tail = 0;
+#endif
+#if RX_BUFFER_SIZE > 255
+static volatile uint16_t rx_buffer_head = 0;
+static volatile uint16_t rx_buffer_tail = 0;
+#else
+static volatile uint8_t rx_buffer_head = 0;
+static volatile uint8_t rx_buffer_tail = 0;
+#endif
+
+// UART0 and UART1 are clocked by F_CPU, UART2 is clocked by F_BUS
+// UART0 has 8 byte fifo, UART1 and UART2 have 1 byte buffer
+
+#define C2_ENABLE		UART_C2_TE | UART_C2_RE | UART_C2_RIE
+#define C2_TX_ACTIVE		C2_ENABLE | UART_C2_TIE
+#define C2_TX_COMPLETING	C2_ENABLE | UART_C2_TCIE
+#define C2_TX_INACTIVE		C2_ENABLE
+
+void serial4_begin(uint32_t divisor)
+{
+	SIM_SCGC4 |= SIM_SCGC4_UART3;	// turn on clock, TODO: use bitband
+	rx_buffer_head = 0;
+	rx_buffer_tail = 0;
+	tx_buffer_head = 0;
+	tx_buffer_tail = 0;
+	transmitting = 0;
+	CORE_PIN31_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3);
+	CORE_PIN32_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3);
+	UART3_BDH = (divisor >> 13) & 0x1F;
+	UART3_BDL = (divisor >> 5) & 0xFF;
+	UART3_C4 = divisor & 0x1F;
+	UART3_C1 = 0;
+	UART3_PFIFO = 0;
+	UART3_C2 = C2_TX_INACTIVE;
+	NVIC_SET_PRIORITY(IRQ_UART3_STATUS, IRQ_PRIORITY);
+	NVIC_ENABLE_IRQ(IRQ_UART3_STATUS);
+}
+
+void serial4_format(uint32_t format)
+{
+	uint8_t c;
+
+	c = UART3_C1;
+	c = (c & ~0x13) | (format & 0x03);	// configure parity
+	if (format & 0x04) c |= 0x10;		// 9 bits (might include parity)
+	UART3_C1 = c;
+	if ((format & 0x0F) == 0x04) UART3_C3 |= 0x40; // 8N2 is 9 bit with 9th bit always 1
+	c = UART3_S2 & ~0x10;
+	if (format & 0x10) c |= 0x10;		// rx invert
+	UART3_S2 = c;
+	c = UART3_C3 & ~0x10;
+	if (format & 0x20) c |= 0x10;		// tx invert
+	UART3_C3 = c;
+#ifdef SERIAL_9BIT_SUPPORT
+	c = UART3_C4 & 0x1F;
+	if (format & 0x08) c |= 0x20;		// 9 bit mode with parity (requires 10 bits)
+	UART3_C4 = c;
+	use9Bits = format & 0x80;
+#endif
+}
+
+void serial4_end(void)
+{
+	if (!(SIM_SCGC4 & SIM_SCGC4_UART3)) return;
+	while (transmitting) yield();  // wait for buffered data to send
+	NVIC_DISABLE_IRQ(IRQ_UART3_STATUS);
+	UART3_C2 = 0;
+	CORE_PIN31_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1);
+	CORE_PIN32_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1);
+	rx_buffer_head = 0;
+	rx_buffer_tail = 0;
+	if (rts_pin) rts_deassert();
+}
+
+void serial4_set_transmit_pin(uint8_t pin)
+{
+	while (transmitting) ;
+	pinMode(pin, OUTPUT);
+	digitalWrite(pin, LOW);
+	transmit_pin = portOutputRegister(pin);
+}
+
+void serial4_set_tx(uint8_t pin, uint8_t opendrain)
+{
+}
+
+void serial4_set_rx(uint8_t pin)
+{
+}
+
+int serial4_set_rts(uint8_t pin)
+{
+	if (!(SIM_SCGC4 & SIM_SCGC4_UART3)) return 0;
+	if (pin < CORE_NUM_DIGITAL) {
+		rts_pin = portOutputRegister(pin);
+		pinMode(pin, OUTPUT);
+		rts_assert();
+	} else {
+		rts_pin = NULL;
+		return 0;
+	}
+	return 1;
+}
+
+int serial4_set_cts(uint8_t pin)
+{
+	return 0;
+}
+
+void serial4_putchar(uint32_t c)
+{
+	uint32_t head, n;
+
+	if (!(SIM_SCGC4 & SIM_SCGC4_UART3)) return;
+	if (transmit_pin) transmit_assert();
+	head = tx_buffer_head;
+	if (++head >= TX_BUFFER_SIZE) head = 0;
+	while (tx_buffer_tail == head) {
+		int priority = nvic_execution_priority();
+		if (priority <= IRQ_PRIORITY) {
+			if ((UART3_S1 & UART_S1_TDRE)) {
+				uint32_t tail = tx_buffer_tail;
+				if (++tail >= TX_BUFFER_SIZE) tail = 0;
+				n = tx_buffer[tail];
+				if (use9Bits) UART3_C3 = (UART3_C3 & ~0x40) | ((n & 0x100) >> 2);
+				UART3_D = n;
+				tx_buffer_tail = tail;
+			}
+		} else if (priority >= 256) {
+			yield(); // wait
+		}
+	}
+	tx_buffer[head] = c;
+	transmitting = 1;
+	tx_buffer_head = head;
+	UART3_C2 = C2_TX_ACTIVE;
+}
+
+void serial4_write(const void *buf, unsigned int count)
+{
+	const uint8_t *p = (const uint8_t *)buf;
+	while (count-- > 0) serial4_putchar(*p++);
+}
+
+void serial4_flush(void)
+{
+	while (transmitting) yield(); // wait
+}
+
+int serial4_write_buffer_free(void)
+{
+	uint32_t head, tail;
+
+	head = tx_buffer_head;
+	tail = tx_buffer_tail;
+	if (head >= tail) return TX_BUFFER_SIZE - 1 - head + tail;
+	return tail - head - 1;
+}
+
+int serial4_available(void)
+{
+	uint32_t head, tail;
+
+	head = rx_buffer_head;
+	tail = rx_buffer_tail;
+	if (head >= tail) return head - tail;
+	return RX_BUFFER_SIZE + head - tail;
+}
+
+int serial4_getchar(void)
+{
+	uint32_t head, tail;
+	int c;
+
+	head = rx_buffer_head;
+	tail = rx_buffer_tail;
+	if (head == tail) return -1;
+	if (++tail >= RX_BUFFER_SIZE) tail = 0;
+	c = rx_buffer[tail];
+	rx_buffer_tail = tail;
+	if (rts_pin) {
+		int avail;
+		if (head >= tail) avail = head - tail;
+		else avail = RX_BUFFER_SIZE + head - tail;
+		if (avail <= RTS_LOW_WATERMARK) rts_assert();
+	}
+	return c;
+}
+
+int serial4_peek(void)
+{
+	uint32_t head, tail;
+
+	head = rx_buffer_head;
+	tail = rx_buffer_tail;
+	if (head == tail) return -1;
+	if (++tail >= RX_BUFFER_SIZE) tail = 0;
+	return rx_buffer[tail];
+}
+
+void serial4_clear(void)
+{
+	rx_buffer_head = rx_buffer_tail;
+	if (rts_pin) rts_assert();
+}
+
+// status interrupt combines 
+//   Transmit data below watermark  UART_S1_TDRE
+//   Transmit complete		    UART_S1_TC
+//   Idle line			    UART_S1_IDLE
+//   Receive data above watermark   UART_S1_RDRF
+//   LIN break detect		    UART_S2_LBKDIF
+//   RxD pin active edge	    UART_S2_RXEDGIF
+
+void uart3_status_isr(void)
+{
+	uint32_t head, tail, n;
+	uint8_t c;
+
+	if (UART3_S1 & UART_S1_RDRF) {
+		if (use9Bits && (UART3_C3 & 0x80)) {
+			n = UART3_D | 0x100;
+		} else {
+			n = UART3_D;
+		}
+		head = rx_buffer_head + 1;
+		if (head >= RX_BUFFER_SIZE) head = 0;
+		if (head != rx_buffer_tail) {
+			rx_buffer[head] = n;
+			rx_buffer_head = head; 
+		}
+		if (rts_pin) {
+			int avail;
+			tail = tx_buffer_tail;
+			if (head >= tail) avail = head - tail;
+			else avail = RX_BUFFER_SIZE + head - tail;
+			if (avail >= RTS_HIGH_WATERMARK) rts_deassert();
+		}
+	}
+	c = UART3_C2;
+	if ((c & UART_C2_TIE) && (UART3_S1 & UART_S1_TDRE)) {
+		head = tx_buffer_head;
+		tail = tx_buffer_tail;
+		if (head == tail) {
+			UART3_C2 = C2_TX_COMPLETING;
+		} else {
+			if (++tail >= TX_BUFFER_SIZE) tail = 0;
+			n = tx_buffer[tail];
+			if (use9Bits) UART3_C3 = (UART3_C3 & ~0x40) | ((n & 0x100) >> 2);
+			UART3_D = n;
+			tx_buffer_tail = tail;
+		}
+	}
+	if ((c & UART_C2_TCIE) && (UART3_S1 & UART_S1_TC)) {
+		transmitting = 0;
+		if (transmit_pin) transmit_deassert();
+		UART3_C2 = C2_TX_INACTIVE;
+	}
+}
+
+#endif // HAS_KINETISK_UART3

teensy3/serial5.c

+/* Teensyduino Core Library
+ * http://www.pjrc.com/teensy/
+ * Copyright (c) 2013 PJRC.COM, LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * 1. The above copyright notice and this permission notice shall be 
+ * included in all copies or substantial portions of the Software.
+ *
+ * 2. If the Software is incorporated into a build system that allows 
+ * selection among a list of target devices, then similar target
+ * devices manufactured by PJRC.COM must be included in the list of
+ * target devices and selectable in the same manner.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include "kinetis.h"
+#include "core_pins.h"
+#include "HardwareSerial.h"
+
+#ifdef HAS_KINETISK_UART4
+
+////////////////////////////////////////////////////////////////
+// Tunable parameters (relatively safe to edit these numbers)
+////////////////////////////////////////////////////////////////
+
+#define TX_BUFFER_SIZE     40 // number of outgoing bytes to buffer
+#define RX_BUFFER_SIZE     64 // number of incoming bytes to buffer
+#define RTS_HIGH_WATERMARK 40 // RTS requests sender to pause
+#define RTS_LOW_WATERMARK  26 // RTS allows sender to resume
+#define IRQ_PRIORITY  64  // 0 = highest priority, 255 = lowest
+
+
+////////////////////////////////////////////////////////////////
+// changes not recommended below this point....
+////////////////////////////////////////////////////////////////
+
+#ifdef SERIAL_9BIT_SUPPORT
+static uint8_t use9Bits = 0;
+#define BUFTYPE uint16_t
+#else
+#define BUFTYPE uint8_t
+#define use9Bits 0
+#endif
+
+static volatile BUFTYPE tx_buffer[TX_BUFFER_SIZE];
+static volatile BUFTYPE rx_buffer[RX_BUFFER_SIZE];
+static volatile uint8_t transmitting = 0;
+static volatile uint8_t *transmit_pin=NULL;
+#define transmit_assert()   *transmit_pin = 1
+#define transmit_deassert() *transmit_pin = 0
+static volatile uint8_t *rts_pin=NULL;
+#define rts_assert()        *rts_pin = 0
+#define rts_deassert()      *rts_pin = 1
+#if TX_BUFFER_SIZE > 255
+static volatile uint16_t tx_buffer_head = 0;
+static volatile uint16_t tx_buffer_tail = 0;
+#else
+static volatile uint8_t tx_buffer_head = 0;
+static volatile uint8_t tx_buffer_tail = 0;
+#endif
+#if RX_BUFFER_SIZE > 255
+static volatile uint16_t rx_buffer_head = 0;
+static volatile uint16_t rx_buffer_tail = 0;
+#else
+static volatile uint8_t rx_buffer_head = 0;
+static volatile uint8_t rx_buffer_tail = 0;
+#endif
+
+// UART0 and UART1 are clocked by F_CPU, UART2 is clocked by F_BUS
+// UART0 has 8 byte fifo, UART1 and UART2 have 1 byte buffer
+
+#define C2_ENABLE		UART_C2_TE | UART_C2_RE | UART_C2_RIE
+#define C2_TX_ACTIVE		C2_ENABLE | UART_C2_TIE
+#define C2_TX_COMPLETING	C2_ENABLE | UART_C2_TCIE
+#define C2_TX_INACTIVE		C2_ENABLE
+
+void serial5_begin(uint32_t divisor)
+{
+	SIM_SCGC1 |= SIM_SCGC1_UART4;	// turn on clock, TODO: use bitband
+	rx_buffer_head = 0;
+	rx_buffer_tail = 0;
+	tx_buffer_head = 0;
+	tx_buffer_tail = 0;
+	transmitting = 0;
+	CORE_PIN34_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3);
+	CORE_PIN33_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3);
+	UART4_BDH = (divisor >> 13) & 0x1F;
+	UART4_BDL = (divisor >> 5) & 0xFF;
+	UART4_C4 = divisor & 0x1F;
+	UART4_C1 = 0;
+	UART4_PFIFO = 0;
+	UART4_C2 = C2_TX_INACTIVE;
+	NVIC_SET_PRIORITY(IRQ_UART4_STATUS, IRQ_PRIORITY);
+	NVIC_ENABLE_IRQ(IRQ_UART4_STATUS);
+}
+
+void serial5_format(uint32_t format)
+{
+	uint8_t c;
+
+	c = UART4_C1;
+	c = (c & ~0x13) | (format & 0x03);	// configure parity
+	if (format & 0x04) c |= 0x10;		// 9 bits (might include parity)
+	UART4_C1 = c;
+	if ((format & 0x0F) == 0x04) UART4_C3 |= 0x40; // 8N2 is 9 bit with 9th bit always 1
+	c = UART4_S2 & ~0x10;
+	if (format & 0x10) c |= 0x10;		// rx invert
+	UART4_S2 = c;
+	c = UART4_C3 & ~0x10;
+	if (format & 0x20) c |= 0x10;		// tx invert
+	UART4_C3 = c;
+#ifdef SERIAL_9BIT_SUPPORT
+	c = UART4_C4 & 0x1F;
+	if (format & 0x08) c |= 0x20;		// 9 bit mode with parity (requires 10 bits)
+	UART4_C4 = c;
+	use9Bits = format & 0x80;
+#endif
+}
+
+void serial5_end(void)
+{
+	if (!(SIM_SCGC1 & SIM_SCGC1_UART4)) return;
+	while (transmitting) yield();  // wait for buffered data to send
+	NVIC_DISABLE_IRQ(IRQ_UART4_STATUS);
+	UART4_C2 = 0;
+	CORE_PIN34_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1);
+	CORE_PIN33_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1);
+	rx_buffer_head = 0;
+	rx_buffer_tail = 0;
+	if (rts_pin) rts_deassert();
+}
+
+void serial5_set_transmit_pin(uint8_t pin)
+{
+	while (transmitting) ;
+	pinMode(pin, OUTPUT);
+	digitalWrite(pin, LOW);
+	transmit_pin = portOutputRegister(pin);
+}
+
+void serial5_set_tx(uint8_t pin, uint8_t opendrain)
+{
+}
+
+void serial5_set_rx(uint8_t pin)
+{
+}
+
+int serial5_set_rts(uint8_t pin)
+{
+	if (!(SIM_SCGC1 & SIM_SCGC1_UART4)) return 0;
+	if (pin < CORE_NUM_DIGITAL) {
+		rts_pin = portOutputRegister(pin);
+		pinMode(pin, OUTPUT);
+		rts_assert();
+	} else {
+		rts_pin = NULL;
+		return 0;
+	}
+	return 1;
+}
+
+int serial5_set_cts(uint8_t pin)
+{
+	if (!(SIM_SCGC1 & SIM_SCGC1_UART4)) return 0;
+	if (pin == 24) {
+		CORE_PIN24_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_PE; // weak pulldown
+	} else {
+		UART4_MODEM &= ~UART_MODEM_TXCTSE;
+		return 0;
+	}
+	UART4_MODEM |= UART_MODEM_TXCTSE;
+	return 1;
+}
+
+void serial5_putchar(uint32_t c)
+{
+	uint32_t head, n;
+
+	if (!(SIM_SCGC1 & SIM_SCGC1_UART4)) return;
+	if (transmit_pin) transmit_assert();
+	head = tx_buffer_head;
+	if (++head >= TX_BUFFER_SIZE) head = 0;
+	while (tx_buffer_tail == head) {
+		int priority = nvic_execution_priority();
+		if (priority <= IRQ_PRIORITY) {
+			if ((UART4_S1 & UART_S1_TDRE)) {
+				uint32_t tail = tx_buffer_tail;
+				if (++tail >= TX_BUFFER_SIZE) tail = 0;
+				n = tx_buffer[tail];
+				if (use9Bits) UART4_C3 = (UART4_C3 & ~0x40) | ((n & 0x100) >> 2);
+				UART4_D = n;
+				tx_buffer_tail = tail;
+			}
+		} else if (priority >= 256) {
+			yield(); // wait
+		}
+	}
+	tx_buffer[head] = c;
+	transmitting = 1;
+	tx_buffer_head = head;
+	UART4_C2 = C2_TX_ACTIVE;
+}
+
+void serial5_write(const void *buf, unsigned int count)
+{
+	const uint8_t *p = (const uint8_t *)buf;
+	while (count-- > 0) serial5_putchar(*p++);
+}
+
+void serial5_flush(void)
+{
+	while (transmitting) yield(); // wait
+}
+
+int serial5_write_buffer_free(void)
+{
+	uint32_t head, tail;
+
+	head = tx_buffer_head;
+	tail = tx_buffer_tail;
+	if (head >= tail) return TX_BUFFER_SIZE - 1 - head + tail;
+	return tail - head - 1;
+}
+
+int serial5_available(void)
+{
+	uint32_t head, tail;
+
+	head = rx_buffer_head;
+	tail = rx_buffer_tail;
+	if (head >= tail) return head - tail;
+	return RX_BUFFER_SIZE + head - tail;
+}
+
+int serial5_getchar(void)
+{
+	uint32_t head, tail;
+	int c;
+
+	head = rx_buffer_head;
+	tail = rx_buffer_tail;
+	if (head == tail) return -1;
+	if (++tail >= RX_BUFFER_SIZE) tail = 0;
+	c = rx_buffer[tail];
+	rx_buffer_tail = tail;
+	if (rts_pin) {
+		int avail;
+		if (head >= tail) avail = head - tail;
+		else avail = RX_BUFFER_SIZE + head - tail;
+		if (avail <= RTS_LOW_WATERMARK) rts_assert();
+	}
+	return c;
+}
+
+int serial5_peek(void)
+{
+	uint32_t head, tail;
+
+	head = rx_buffer_head;
+	tail = rx_buffer_tail;
+	if (head == tail) return -1;
+	if (++tail >= RX_BUFFER_SIZE) tail = 0;
+	return rx_buffer[tail];
+}
+
+void serial5_clear(void)
+{
+	rx_buffer_head = rx_buffer_tail;
+	if (rts_pin) rts_assert();
+}
+
+// status interrupt combines 
+//   Transmit data below watermark  UART_S1_TDRE
+//   Transmit complete		    UART_S1_TC
+//   Idle line			    UART_S1_IDLE
+//   Receive data above watermark   UART_S1_RDRF
+//   LIN break detect		    UART_S2_LBKDIF
+//   RxD pin active edge	    UART_S2_RXEDGIF
+
+void uart4_status_isr(void)
+{
+	uint32_t head, tail, n;
+	uint8_t c;
+
+	if (UART4_S1 & UART_S1_RDRF) {
+		if (use9Bits && (UART4_C3 & 0x80)) {
+			n = UART4_D | 0x100;
+		} else {
+			n = UART4_D;
+		}
+		head = rx_buffer_head + 1;
+		if (head >= RX_BUFFER_SIZE) head = 0;
+		if (head != rx_buffer_tail) {
+			rx_buffer[head] = n;
+			rx_buffer_head = head; 
+		}
+		if (rts_pin) {
+			int avail;
+			tail = tx_buffer_tail;
+			if (head >= tail) avail = head - tail;
+			else avail = RX_BUFFER_SIZE + head - tail;
+			if (avail >= RTS_HIGH_WATERMARK) rts_deassert();
+		}
+	}
+	c = UART4_C2;
+	if ((c & UART_C2_TIE) && (UART4_S1 & UART_S1_TDRE)) {
+		head = tx_buffer_head;
+		tail = tx_buffer_tail;
+		if (head == tail) {
+			UART4_C2 = C2_TX_COMPLETING;
+		} else {
+			if (++tail >= TX_BUFFER_SIZE) tail = 0;
+			n = tx_buffer[tail];
+			if (use9Bits) UART4_C3 = (UART4_C3 & ~0x40) | ((n & 0x100) >> 2);
+			UART4_D = n;
+			tx_buffer_tail = tail;
+		}
+	}
+	if ((c & UART_C2_TCIE) && (UART4_S1 & UART_S1_TC)) {
+		transmitting = 0;
+		if (transmit_pin) transmit_deassert();
+		UART4_C2 = C2_TX_INACTIVE;
+	}
+}
+
+#endif // HAS_KINETISK_UART4

teensy3/yield.cpp

 	if (Serial1.available()) serialEvent1();
 	if (Serial2.available()) serialEvent2();
 	if (Serial3.available()) serialEvent3();
+#ifdef HAS_KINETISK_UART3
+	if (Serial4.available()) serialEvent4();
+#endif
+#ifdef HAS_KINETISK_UART4
+	if (Serial5.available()) serialEvent5();
+#endif
 	running = 0;
 };