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@@ -2427,90 +2427,114 @@ typedef struct { |
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// 23.7.1: page 1023 |
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#define IMXRT_ENC1 (*(IMXRT_REGISTER16_t *)0x403C8000) |
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#define ENC1_CTRL (IMXRT_ENC1.offset000) |
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#define ENC1_FILT (IMXRT_ENC1.offset002) |
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#define ENC1_WTR (IMXRT_ENC1.offset004) |
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#define ENC1_POSD (IMXRT_ENC1.offset006) |
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#define ENC1_POSDH (IMXRT_ENC1.offset008) |
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#define ENC1_REV (IMXRT_ENC1.offset00A) |
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#define ENC1_REVH (IMXRT_ENC1.offset00C) |
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#define ENC1_UPOS (IMXRT_ENC1.offset00E) |
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#define ENC1_LPOS (IMXRT_ENC1.offset010) |
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#define ENC1_UPOSH (IMXRT_ENC1.offset012) |
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#define ENC1_LPOSH (IMXRT_ENC1.offset014) |
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#define ENC1_UINIT (IMXRT_ENC1.offset016) |
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#define ENC1_LINIT (IMXRT_ENC1.offset018) |
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#define ENC1_IMR (IMXRT_ENC1.offset01A) |
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#define ENC1_TST (IMXRT_ENC1.offset01C) |
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#define ENC1_CTRL2 (IMXRT_ENC1.offset01E) |
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#define ENC1_UMOD (IMXRT_ENC1.offset020) |
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#define ENC1_LMOD (IMXRT_ENC1.offset022) |
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#define ENC1_UCOMP (IMXRT_ENC1.offset024) |
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#define ENC1_LCOMP (IMXRT_ENC1.offset026) |
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#define IMXRT_ENC2 (*(IMXRT_REGISTER16_t *)0x403CC000) |
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#define ENC2_CTRL (IMXRT_ENC2.offset000) |
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#define ENC2_FILT (IMXRT_ENC2.offset002) |
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#define ENC2_WTR (IMXRT_ENC2.offset004) |
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#define ENC2_POSD (IMXRT_ENC2.offset006) |
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#define ENC2_POSDH (IMXRT_ENC2.offset008) |
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#define ENC2_REV (IMXRT_ENC2.offset00A) |
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#define ENC2_REVH (IMXRT_ENC2.offset00C) |
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#define ENC2_UPOS (IMXRT_ENC2.offset00E) |
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#define ENC2_LPOS (IMXRT_ENC2.offset010) |
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#define ENC2_UPOSH (IMXRT_ENC2.offset012) |
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#define ENC2_LPOSH (IMXRT_ENC2.offset014) |
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#define ENC2_UINIT (IMXRT_ENC2.offset016) |
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#define ENC2_LINIT (IMXRT_ENC2.offset018) |
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#define ENC2_IMR (IMXRT_ENC2.offset01A) |
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#define ENC2_TST (IMXRT_ENC2.offset01C) |
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#define ENC2_CTRL2 (IMXRT_ENC2.offset01E) |
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#define ENC2_UMOD (IMXRT_ENC2.offset020) |
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#define ENC2_LMOD (IMXRT_ENC2.offset022) |
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#define ENC2_UCOMP (IMXRT_ENC2.offset024) |
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#define ENC2_LCOMP (IMXRT_ENC2.offset026) |
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#define IMXRT_ENC3 (*(IMXRT_REGISTER16_t *)0x403D0000) |
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#define ENC3_CTRL (IMXRT_ENC3.offset000) |
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#define ENC3_FILT (IMXRT_ENC3.offset002) |
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#define ENC3_WTR (IMXRT_ENC3.offset004) |
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#define ENC3_POSD (IMXRT_ENC3.offset006) |
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#define ENC3_POSDH (IMXRT_ENC3.offset008) |
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#define ENC3_REV (IMXRT_ENC3.offset00A) |
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#define ENC3_REVH (IMXRT_ENC3.offset00C) |
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#define ENC3_UPOS (IMXRT_ENC3.offset00E) |
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#define ENC3_LPOS (IMXRT_ENC3.offset010) |
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#define ENC3_UPOSH (IMXRT_ENC3.offset012) |
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#define ENC3_LPOSH (IMXRT_ENC3.offset014) |
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#define ENC3_UINIT (IMXRT_ENC3.offset016) |
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#define ENC3_LINIT (IMXRT_ENC3.offset018) |
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#define ENC3_IMR (IMXRT_ENC3.offset01A) |
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#define ENC3_TST (IMXRT_ENC3.offset01C) |
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#define ENC3_CTRL2 (IMXRT_ENC3.offset01E) |
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#define ENC3_UMOD (IMXRT_ENC3.offset020) |
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#define ENC3_LMOD (IMXRT_ENC3.offset022) |
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#define ENC3_UCOMP (IMXRT_ENC3.offset024) |
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#define ENC3_LCOMP (IMXRT_ENC3.offset026) |
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#define IMXRT_ENC4 (*(IMXRT_REGISTER16_t *)0x403D4000) |
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#define ENC4_CTRL (IMXRT_ENC4.offset000) |
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#define ENC4_FILT (IMXRT_ENC4.offset002) |
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#define ENC4_WTR (IMXRT_ENC4.offset004) |
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#define ENC4_POSD (IMXRT_ENC4.offset006) |
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#define ENC4_POSDH (IMXRT_ENC4.offset008) |
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#define ENC4_REV (IMXRT_ENC4.offset00A) |
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#define ENC4_REVH (IMXRT_ENC4.offset00C) |
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#define ENC4_UPOS (IMXRT_ENC4.offset00E) |
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#define ENC4_LPOS (IMXRT_ENC4.offset010) |
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#define ENC4_UPOSH (IMXRT_ENC4.offset012) |
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#define ENC4_LPOSH (IMXRT_ENC4.offset014) |
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#define ENC4_UINIT (IMXRT_ENC4.offset016) |
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#define ENC4_LINIT (IMXRT_ENC4.offset018) |
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#define ENC4_IMR (IMXRT_ENC4.offset01A) |
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#define ENC4_TST (IMXRT_ENC4.offset01C) |
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#define ENC4_CTRL2 (IMXRT_ENC4.offset01E) |
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#define ENC4_UMOD (IMXRT_ENC4.offset020) |
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#define ENC4_LMOD (IMXRT_ENC4.offset022) |
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#define ENC4_UCOMP (IMXRT_ENC4.offset024) |
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#define ENC4_LCOMP (IMXRT_ENC4.offset026) |
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typedef struct { |
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volatile uint16_t CTRL; /**< Control Register, offset: 0x0 */ |
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volatile uint16_t FILT; /**< Input Filter Register, offset: 0x2 */ |
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volatile uint16_t WTR; /**< Watchdog Timeout Register, offset: 0x4 */ |
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volatile uint16_t POSD; /**< Position Difference Counter Register, offset: 0x6 */ |
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volatile uint16_t POSDH; /**< Position Difference Hold Register, offset: 0x8 */ |
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volatile uint16_t REV; /**< Revolution Counter Register, offset: 0xA */ |
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volatile uint16_t REVH; /**< Revolution Hold Register, offset: 0xC */ |
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volatile uint16_t UPOS; /**< Upper Position Counter Register, offset: 0xE */ |
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volatile uint16_t LPOS; /**< Lower Position Counter Register, offset: 0x10 */ |
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volatile uint16_t UPOSH; /**< Upper Position Hold Register, offset: 0x12 */ |
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volatile uint16_t LPOSH; /**< Lower Position Hold Register, offset: 0x14 */ |
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volatile uint16_t UINIT; /**< Upper Initialization Register, offset: 0x16 */ |
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volatile uint16_t LINIT; /**< Lower Initialization Register, offset: 0x18 */ |
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volatile uint16_t IMR; /**< Input Monitor Register, offset: 0x1A */ |
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volatile uint16_t TST; /**< Test Register, offset: 0x1C */ |
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volatile uint16_t CTRL2; /**< Control 2 Register, offset: 0x1E */ |
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volatile uint16_t UMOD; /**< Upper Modulus Register, offset: 0x20 */ |
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volatile uint16_t LMOD; /**< Lower Modulus Register, offset: 0x22 */ |
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volatile uint16_t UCOMP; /**< Upper Position Compare Register, offset: 0x24 */ |
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volatile uint16_t LCOMP; /**< Lower Position Compare Register, offset: 0x26 */ |
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} IMXRT_ENC_t; |
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#define IMXRT_ENC1 (*(IMXRT_ENC_t *)0x403C8000) |
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#define ENC1_CTRL (IMXRT_ENC1.CTRL) |
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#define ENC1_FILT (IMXRT_ENC1.FILT) |
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#define ENC1_WTR (IMXRT_ENC1.WTR) |
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#define ENC1_POSD (IMXRT_ENC1.POSD) |
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#define ENC1_POSDH (IMXRT_ENC1.POSDH) |
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#define ENC1_REV (IMXRT_ENC1.REV) |
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#define ENC1_REVH (IMXRT_ENC1.REVH) |
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#define ENC1_UPOS (IMXRT_ENC1.UPOS) |
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#define ENC1_LPOS (IMXRT_ENC1.LPOS) |
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#define ENC1_UPOSH (IMXRT_ENC1.UPOSH) |
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#define ENC1_LPOSH (IMXRT_ENC1.LPOSH) |
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#define ENC1_UINIT (IMXRT_ENC1.UINIT) |
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#define ENC1_LINIT (IMXRT_ENC1.LINIT) |
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#define ENC1_IMR (IMXRT_ENC1.IMR) |
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#define ENC1_TST (IMXRT_ENC1.TST) |
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#define ENC1_CTRL2 (IMXRT_ENC1.CTRL2) |
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#define ENC1_UMOD (IMXRT_ENC1.UMOD) |
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#define ENC1_LMOD (IMXRT_ENC1.LMOD) |
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#define ENC1_UCOMP (IMXRT_ENC1.UCOMP) |
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#define ENC1_LCOMP (IMXRT_ENC1.LCOMP) |
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#define IMXRT_ENC2 (*(IMXRT_ENC_t *)0x403CC000) |
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#define ENC2_CTRL (IMXRT_ENC2.CTRL) |
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#define ENC2_FILT (IMXRT_ENC2.FILT) |
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#define ENC2_WTR (IMXRT_ENC2.WTR) |
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#define ENC2_POSD (IMXRT_ENC2.POSD) |
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#define ENC2_POSDH (IMXRT_ENC2.POSDH) |
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#define ENC2_REV (IMXRT_ENC2.REV) |
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#define ENC2_REVH (IMXRT_ENC2.REVH) |
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#define ENC2_UPOS (IMXRT_ENC2.UPOS) |
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#define ENC2_LPOS (IMXRT_ENC2.LPOS) |
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#define ENC2_UPOSH (IMXRT_ENC2.UPOSH) |
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#define ENC2_LPOSH (IMXRT_ENC2.LPOSH) |
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#define ENC2_UINIT (IMXRT_ENC2.UINIT) |
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#define ENC2_LINIT (IMXRT_ENC2.LINIT) |
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#define ENC2_IMR (IMXRT_ENC2.IMR) |
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#define ENC2_TST (IMXRT_ENC2.TST) |
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#define ENC2_CTRL2 (IMXRT_ENC2.CTRL2) |
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#define ENC2_UMOD (IMXRT_ENC2.UMOD) |
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#define ENC2_LMOD (IMXRT_ENC2.LMOD) |
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#define ENC2_UCOMP (IMXRT_ENC2.UCOMP) |
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#define ENC2_LCOMP (IMXRT_ENC2.LCOMP) |
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#define IMXRT_ENC3 (*(IMXRT_ENC_t *)0x403D0000) |
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#define ENC3_CTRL (IMXRT_ENC3.CTRL) |
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#define ENC3_FILT (IMXRT_ENC3.FILT) |
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#define ENC3_WTR (IMXRT_ENC3.WTR) |
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#define ENC3_POSD (IMXRT_ENC3.POSD) |
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#define ENC3_POSDH (IMXRT_ENC3.POSDH) |
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#define ENC3_REV (IMXRT_ENC3.REV) |
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#define ENC3_REVH (IMXRT_ENC3.REVH) |
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#define ENC3_UPOS (IMXRT_ENC3.UPOS) |
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#define ENC3_LPOS (IMXRT_ENC3.LPOS) |
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#define ENC3_UPOSH (IMXRT_ENC3.UPOSH) |
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#define ENC3_LPOSH (IMXRT_ENC3.LPOSH) |
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#define ENC3_UINIT (IMXRT_ENC3.UINIT) |
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#define ENC3_LINIT (IMXRT_ENC3.LINIT) |
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#define ENC3_IMR (IMXRT_ENC3.IMR) |
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#define ENC3_TST (IMXRT_ENC3.TST) |
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#define ENC3_CTRL2 (IMXRT_ENC3.CTRL2) |
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#define ENC3_UMOD (IMXRT_ENC3.UMOD) |
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#define ENC3_LMOD (IMXRT_ENC3.LMOD) |
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#define ENC3_UCOMP (IMXRT_ENC3.UCOMP) |
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#define ENC3_LCOMP (IMXRT_ENC3.LCOMP) |
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#define IMXRT_ENC4 (*(IMXRT_ENC_t *)0x403D4000) |
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#define ENC4_CTRL (IMXRT_ENC4.CTRL) |
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#define ENC4_FILT (IMXRT_ENC4.FILT) |
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#define ENC4_WTR (IMXRT_ENC4.WTR) |
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#define ENC4_POSD (IMXRT_ENC4.POSD) |
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#define ENC4_POSDH (IMXRT_ENC4.POSDH) |
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#define ENC4_REV (IMXRT_ENC4.REV) |
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#define ENC4_REVH (IMXRT_ENC4.REVH) |
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#define ENC4_UPOS (IMXRT_ENC4.UPOS) |
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#define ENC4_LPOS (IMXRT_ENC4.LPOS) |
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#define ENC4_UPOSH (IMXRT_ENC4.UPOSH) |
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#define ENC4_LPOSH (IMXRT_ENC4.LPOSH) |
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#define ENC4_UINIT (IMXRT_ENC4.UINIT) |
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#define ENC4_LINIT (IMXRT_ENC4.LINIT) |
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#define ENC4_IMR (IMXRT_ENC4.IMR) |
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#define ENC4_TST (IMXRT_ENC4.TST) |
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#define ENC4_CTRL2 (IMXRT_ENC4.CTRL2) |
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#define ENC4_UMOD (IMXRT_ENC4.UMOD) |
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#define ENC4_LMOD (IMXRT_ENC4.LMOD) |
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#define ENC4_UCOMP (IMXRT_ENC4.UCOMP) |
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#define ENC4_LCOMP (IMXRT_ENC4.LCOMP) |
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// 24.5: page 1060 |
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#define IMXRT_ENET (*(IMXRT_REGISTER32_t *)0x402D8000) |
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@@ -8405,4 +8429,4 @@ static inline void arm_dcache_flush_delete(void *addr, uint32_t size) |
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} while (location < end_addr); |
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asm("dsb"); |
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asm("isb"); |
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} |
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} |