fix for flash & bus clocks at F_CPU <= 16MHz · c2ef5b6481 - teensy-cores - gitea: thevis.us

fix for flash & bus clocks at F_CPU <= 16MHz

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duff2013 9 years ago

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0e5922acfb

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c2ef5b6481

1 changed files with 1 additions and 0 deletions

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teensy3/mk20dx128.cView File
								
															#if defined(KINETISK)
															
															#if defined(KINETISK)
														
															    SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(0) |	 SIM_CLKDIV1_OUTDIV4(1);
															
															    SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(0) |	 SIM_CLKDIV1_OUTDIV4(1);
														
															#elif defined(KINETISL)
															
															#elif defined(KINETISL)
														
															    // config divisors: 2 MHz core, 1 MHz bus, 1 MHz flash
														
															    SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV4(1);
															
															    SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV4(1);
														
															#endif
															
															#endif
														
															#else
															
															#else